2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright IBM Corp. 2007
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
20 #include <linux/types.h>
21 #include <linux/string.h>
22 #include <linux/kvm.h>
23 #include <linux/kvm_host.h>
24 #include <linux/highmem.h>
25 #include <asm/mmu-44x.h>
26 #include <asm/kvm_ppc.h>
27 #include <asm/kvm_44x.h>
31 #define PPC44x_TLB_UATTR_MASK \
32 (PPC44x_TLB_U0|PPC44x_TLB_U1|PPC44x_TLB_U2|PPC44x_TLB_U3)
33 #define PPC44x_TLB_USER_PERM_MASK (PPC44x_TLB_UX|PPC44x_TLB_UR|PPC44x_TLB_UW)
34 #define PPC44x_TLB_SUPER_PERM_MASK (PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW)
36 static unsigned int kvmppc_tlb_44x_pos;
39 void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
41 struct kvmppc_44x_tlbe *tlbe;
44 printk("vcpu %d TLB dump:\n", vcpu->vcpu_id);
45 printk("| %2s | %3s | %8s | %8s | %8s |\n",
46 "nr", "tid", "word0", "word1", "word2");
48 for (i = 0; i < PPC44x_TLB_SIZE; i++) {
49 tlbe = &vcpu_44x->guest_tlb[i];
50 if (tlbe->word0 & PPC44x_TLB_VALID)
51 printk(" G%2d | %02X | %08X | %08X | %08X |\n",
52 i, tlbe->tid, tlbe->word0, tlbe->word1,
56 for (i = 0; i < PPC44x_TLB_SIZE; i++) {
57 tlbe = &vcpu_44x->shadow_tlb[i];
58 if (tlbe->word0 & PPC44x_TLB_VALID)
59 printk(" S%2d | %02X | %08X | %08X | %08X |\n",
60 i, tlbe->tid, tlbe->word0, tlbe->word1,
66 static u32 kvmppc_44x_tlb_shadow_attrib(u32 attrib, int usermode)
68 /* We only care about the guest's permission and user bits. */
69 attrib &= PPC44x_TLB_PERM_MASK|PPC44x_TLB_UATTR_MASK;
72 /* Guest is in supervisor mode, so we need to translate guest
73 * supervisor permissions into user permissions. */
74 attrib &= ~PPC44x_TLB_USER_PERM_MASK;
75 attrib |= (attrib & PPC44x_TLB_SUPER_PERM_MASK) << 3;
78 /* Make sure host can always access this memory. */
79 attrib |= PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW;
82 attrib |= PPC44x_TLB_M;
87 /* Search the guest TLB for a matching entry. */
88 int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, unsigned int pid,
91 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
94 /* XXX Replace loop with fancy data structures. */
95 for (i = 0; i < PPC44x_TLB_SIZE; i++) {
96 struct kvmppc_44x_tlbe *tlbe = &vcpu_44x->guest_tlb[i];
99 if (eaddr < get_tlb_eaddr(tlbe))
102 if (eaddr > get_tlb_end(tlbe))
105 tid = get_tlb_tid(tlbe);
106 if (tid && (tid != pid))
109 if (!get_tlb_v(tlbe))
112 if (get_tlb_ts(tlbe) != as)
121 struct kvmppc_44x_tlbe *kvmppc_44x_itlb_search(struct kvm_vcpu *vcpu,
124 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
125 unsigned int as = !!(vcpu->arch.msr & MSR_IS);
128 index = kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
131 return &vcpu_44x->guest_tlb[index];
134 struct kvmppc_44x_tlbe *kvmppc_44x_dtlb_search(struct kvm_vcpu *vcpu,
137 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
138 unsigned int as = !!(vcpu->arch.msr & MSR_DS);
141 index = kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
144 return &vcpu_44x->guest_tlb[index];
147 static int kvmppc_44x_tlbe_is_writable(struct kvmppc_44x_tlbe *tlbe)
149 return tlbe->word2 & (PPC44x_TLB_SW|PPC44x_TLB_UW);
152 static void kvmppc_44x_shadow_release(struct kvm_vcpu *vcpu,
155 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
156 struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[index];
157 struct page *page = vcpu_44x->shadow_pages[index];
159 if (get_tlb_v(stlbe)) {
160 if (kvmppc_44x_tlbe_is_writable(stlbe))
161 kvm_release_page_dirty(page);
163 kvm_release_page_clean(page);
167 void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu)
171 for (i = 0; i <= tlb_44x_hwater; i++)
172 kvmppc_44x_shadow_release(vcpu, i);
175 void kvmppc_tlbe_set_modified(struct kvm_vcpu *vcpu, unsigned int i)
177 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
179 vcpu_44x->shadow_tlb_mod[i] = 1;
182 /* Caller must ensure that the specified guest TLB entry is safe to insert into
184 void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid,
187 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
188 struct page *new_page;
189 struct kvmppc_44x_tlbe *stlbe;
193 /* Future optimization: don't overwrite the TLB entry containing the
194 * current PC (or stack?). */
195 victim = kvmppc_tlb_44x_pos++;
196 if (kvmppc_tlb_44x_pos > tlb_44x_hwater)
197 kvmppc_tlb_44x_pos = 0;
198 stlbe = &vcpu_44x->shadow_tlb[victim];
200 /* Get reference to new page. */
201 new_page = gfn_to_page(vcpu->kvm, gfn);
202 if (is_error_page(new_page)) {
203 printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn);
204 kvm_release_page_clean(new_page);
207 hpaddr = page_to_phys(new_page);
209 /* Drop reference to old page. */
210 kvmppc_44x_shadow_release(vcpu, victim);
212 vcpu_44x->shadow_pages[victim] = new_page;
214 /* XXX Make sure (va, size) doesn't overlap any other
215 * entries. 440x6 user manual says the result would be
218 /* XXX what about AS? */
220 stlbe->tid = !(asid & 0xff);
222 /* Force TS=1 for all guest mappings. */
223 /* For now we hardcode 4KB mappings, but it will be important to
224 * use host large pages in the future. */
225 stlbe->word0 = (gvaddr & PAGE_MASK) | PPC44x_TLB_VALID | PPC44x_TLB_TS
227 stlbe->word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf);
228 stlbe->word2 = kvmppc_44x_tlb_shadow_attrib(flags,
229 vcpu->arch.msr & MSR_PR);
230 kvmppc_tlbe_set_modified(vcpu, victim);
232 KVMTRACE_5D(STLB_WRITE, vcpu, victim,
233 stlbe->tid, stlbe->word0, stlbe->word1, stlbe->word2,
237 static void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr,
238 gva_t eend, u32 asid)
240 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
241 unsigned int pid = !(asid & 0xff);
244 /* XXX Replace loop with fancy data structures. */
245 for (i = 0; i <= tlb_44x_hwater; i++) {
246 struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[i];
249 if (!get_tlb_v(stlbe))
252 if (eend < get_tlb_eaddr(stlbe))
255 if (eaddr > get_tlb_end(stlbe))
258 tid = get_tlb_tid(stlbe);
259 if (tid && (tid != pid))
262 kvmppc_44x_shadow_release(vcpu, i);
264 kvmppc_tlbe_set_modified(vcpu, i);
265 KVMTRACE_5D(STLB_INVAL, vcpu, i,
266 stlbe->tid, stlbe->word0, stlbe->word1,
267 stlbe->word2, handler);
271 /* Invalidate all mappings on the privilege switch after PID has been changed.
272 * The guest always runs with PID=1, so we must clear the entire TLB when
273 * switching address spaces. */
274 void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
276 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
279 if (vcpu->arch.swap_pid) {
280 /* XXX Replace loop with fancy data structures. */
281 for (i = 0; i <= tlb_44x_hwater; i++) {
282 struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[i];
284 /* Future optimization: clear only userspace mappings. */
285 kvmppc_44x_shadow_release(vcpu, i);
287 kvmppc_tlbe_set_modified(vcpu, i);
288 KVMTRACE_5D(STLB_INVAL, vcpu, i,
289 stlbe->tid, stlbe->word0, stlbe->word1,
290 stlbe->word2, handler);
292 vcpu->arch.swap_pid = 0;
295 vcpu->arch.shadow_pid = !usermode;
298 static int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,
299 const struct kvmppc_44x_tlbe *tlbe)
303 if (!get_tlb_v(tlbe))
306 /* Does it match current guest AS? */
307 /* XXX what about IS != DS? */
308 if (get_tlb_ts(tlbe) != !!(vcpu->arch.msr & MSR_IS))
311 gpa = get_tlb_raddr(tlbe);
312 if (!gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT))
313 /* Mapping is not for RAM. */
319 int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws)
321 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
326 struct kvmppc_44x_tlbe *tlbe;
329 index = vcpu->arch.gpr[ra];
330 if (index > PPC44x_TLB_SIZE) {
331 printk("%s: index %d\n", __func__, index);
332 kvmppc_dump_vcpu(vcpu);
336 tlbe = &vcpu_44x->guest_tlb[index];
338 /* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */
339 if (tlbe->word0 & PPC44x_TLB_VALID) {
340 eaddr = get_tlb_eaddr(tlbe);
341 asid = (tlbe->word0 & PPC44x_TLB_TS) | tlbe->tid;
342 kvmppc_mmu_invalidate(vcpu, eaddr, get_tlb_end(tlbe), asid);
346 case PPC44x_TLB_PAGEID:
347 tlbe->tid = get_mmucr_stid(vcpu);
348 tlbe->word0 = vcpu->arch.gpr[rs];
351 case PPC44x_TLB_XLAT:
352 tlbe->word1 = vcpu->arch.gpr[rs];
355 case PPC44x_TLB_ATTRIB:
356 tlbe->word2 = vcpu->arch.gpr[rs];
363 if (tlbe_is_host_safe(vcpu, tlbe)) {
364 eaddr = get_tlb_eaddr(tlbe);
365 raddr = get_tlb_raddr(tlbe);
366 asid = (tlbe->word0 & PPC44x_TLB_TS) | tlbe->tid;
367 flags = tlbe->word2 & 0xffff;
369 /* Create a 4KB mapping on the host. If the guest wanted a
370 * large page, only the first 4KB is mapped here and the rest
371 * are mapped on the fly. */
372 kvmppc_mmu_map(vcpu, eaddr, raddr >> PAGE_SHIFT, asid, flags);
375 KVMTRACE_5D(GTLB_WRITE, vcpu, index,
376 tlbe->tid, tlbe->word0, tlbe->word1, tlbe->word2,
382 int kvmppc_44x_emul_tlbsx(struct kvm_vcpu *vcpu, u8 rt, u8 ra, u8 rb, u8 rc)
386 unsigned int as = get_mmucr_sts(vcpu);
387 unsigned int pid = get_mmucr_stid(vcpu);
389 ea = vcpu->arch.gpr[rb];
391 ea += vcpu->arch.gpr[ra];
393 index = kvmppc_44x_tlb_index(vcpu, ea, pid, as);
396 vcpu->arch.cr &= ~0x20000000;
398 vcpu->arch.cr |= 0x20000000;
400 vcpu->arch.gpr[rt] = index;