2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright IBM Corp. 2007
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
20 #include <linux/types.h>
21 #include <linux/string.h>
22 #include <linux/kvm.h>
23 #include <linux/kvm_host.h>
24 #include <linux/highmem.h>
26 #include <asm/tlbflush.h>
27 #include <asm/mmu-44x.h>
28 #include <asm/kvm_ppc.h>
29 #include <asm/kvm_44x.h>
33 #ifndef PPC44x_TLBE_SIZE
34 #define PPC44x_TLBE_SIZE PPC44x_TLB_4K
37 #define PAGE_SIZE_4K (1<<12)
38 #define PAGE_MASK_4K (~(PAGE_SIZE_4K - 1))
40 #define PPC44x_TLB_UATTR_MASK \
41 (PPC44x_TLB_U0|PPC44x_TLB_U1|PPC44x_TLB_U2|PPC44x_TLB_U3)
42 #define PPC44x_TLB_USER_PERM_MASK (PPC44x_TLB_UX|PPC44x_TLB_UR|PPC44x_TLB_UW)
43 #define PPC44x_TLB_SUPER_PERM_MASK (PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW)
46 void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
48 struct kvmppc_44x_tlbe *tlbe;
51 printk("vcpu %d TLB dump:\n", vcpu->vcpu_id);
52 printk("| %2s | %3s | %8s | %8s | %8s |\n",
53 "nr", "tid", "word0", "word1", "word2");
55 for (i = 0; i < ARRAY_SIZE(vcpu_44x->guest_tlb); i++) {
56 tlbe = &vcpu_44x->guest_tlb[i];
57 if (tlbe->word0 & PPC44x_TLB_VALID)
58 printk(" G%2d | %02X | %08X | %08X | %08X |\n",
59 i, tlbe->tid, tlbe->word0, tlbe->word1,
65 static inline void kvmppc_44x_tlbie(unsigned int index)
67 /* 0 <= index < 64, so the V bit is clear and we can use the index as
70 "tlbwe %[index], %[index], 0\n"
76 static inline void kvmppc_44x_tlbwe(unsigned int index,
77 struct kvmppc_44x_tlbe *stlbe)
82 "mfspr %[tmp], %[sprn_mmucr]\n"
83 "rlwimi %[tmp], %[tid], 0, 0xff\n"
84 "mtspr %[sprn_mmucr], %[tmp]\n"
85 "tlbwe %[word0], %[index], 0\n"
86 "tlbwe %[word1], %[index], 1\n"
87 "tlbwe %[word2], %[index], 2\n"
89 : [word0] "r"(stlbe->word0),
90 [word1] "r"(stlbe->word1),
91 [word2] "r"(stlbe->word2),
92 [tid] "r"(stlbe->tid),
94 [sprn_mmucr] "i"(SPRN_MMUCR)
98 static u32 kvmppc_44x_tlb_shadow_attrib(u32 attrib, int usermode)
100 /* We only care about the guest's permission and user bits. */
101 attrib &= PPC44x_TLB_PERM_MASK|PPC44x_TLB_UATTR_MASK;
104 /* Guest is in supervisor mode, so we need to translate guest
105 * supervisor permissions into user permissions. */
106 attrib &= ~PPC44x_TLB_USER_PERM_MASK;
107 attrib |= (attrib & PPC44x_TLB_SUPER_PERM_MASK) << 3;
110 /* Make sure host can always access this memory. */
111 attrib |= PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW;
113 /* WIMGE = 0b00100 */
114 attrib |= PPC44x_TLB_M;
119 /* Search the guest TLB for a matching entry. */
120 int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, unsigned int pid,
123 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
126 /* XXX Replace loop with fancy data structures. */
127 for (i = 0; i < ARRAY_SIZE(vcpu_44x->guest_tlb); i++) {
128 struct kvmppc_44x_tlbe *tlbe = &vcpu_44x->guest_tlb[i];
131 if (eaddr < get_tlb_eaddr(tlbe))
134 if (eaddr > get_tlb_end(tlbe))
137 tid = get_tlb_tid(tlbe);
138 if (tid && (tid != pid))
141 if (!get_tlb_v(tlbe))
144 if (get_tlb_ts(tlbe) != as)
153 int kvmppc_44x_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
155 unsigned int as = !!(vcpu->arch.msr & MSR_IS);
157 return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
160 int kvmppc_44x_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
162 unsigned int as = !!(vcpu->arch.msr & MSR_DS);
164 return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
167 static void kvmppc_44x_shadow_release(struct kvmppc_vcpu_44x *vcpu_44x,
168 unsigned int stlb_index)
170 struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[stlb_index];
175 /* Discard from the TLB. */
176 /* Note: we could actually invalidate a host mapping, if the host overwrote
177 * this TLB entry since we inserted a guest mapping. */
178 kvmppc_44x_tlbie(stlb_index);
180 /* Now release the page. */
182 kvm_release_page_dirty(ref->page);
184 kvm_release_page_clean(ref->page);
188 /* XXX set tlb_44x_index to stlb_index? */
190 KVMTRACE_1D(STLB_INVAL, &vcpu_44x->vcpu, stlb_index, handler);
193 void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu)
195 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
198 for (i = 0; i <= tlb_44x_hwater; i++)
199 kvmppc_44x_shadow_release(vcpu_44x, i);
203 * kvmppc_mmu_map -- create a host mapping for guest memory
205 * If the guest wanted a larger page than the host supports, only the first
206 * host page is mapped here and the rest are demand faulted.
208 * If the guest wanted a smaller page than the host page size, we map only the
209 * guest-size page (i.e. not a full host page mapping).
211 * Caller must ensure that the specified guest TLB entry is safe to insert into
214 void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr, u64 asid,
215 u32 flags, u32 max_bytes, unsigned int gtlb_index)
217 struct kvmppc_44x_tlbe stlbe;
218 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
219 struct kvmppc_44x_shadow_ref *ref;
220 struct page *new_page;
225 /* Select TLB entry to clobber. Indirectly guard against races with the TLB
226 * miss handler by disabling interrupts. */
228 victim = ++tlb_44x_index;
229 if (victim > tlb_44x_hwater)
231 tlb_44x_index = victim;
234 /* Get reference to new page. */
235 gfn = gpaddr >> PAGE_SHIFT;
236 new_page = gfn_to_page(vcpu->kvm, gfn);
237 if (is_error_page(new_page)) {
238 printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn);
239 kvm_release_page_clean(new_page);
242 hpaddr = page_to_phys(new_page);
244 /* Invalidate any previous shadow mappings. */
245 kvmppc_44x_shadow_release(vcpu_44x, victim);
247 /* XXX Make sure (va, size) doesn't overlap any other
248 * entries. 440x6 user manual says the result would be
251 /* XXX what about AS? */
253 /* Force TS=1 for all guest mappings. */
254 stlbe.word0 = PPC44x_TLB_VALID | PPC44x_TLB_TS;
256 if (max_bytes >= PAGE_SIZE) {
257 /* Guest mapping is larger than or equal to host page size. We can use
258 * a "native" host mapping. */
259 stlbe.word0 |= (gvaddr & PAGE_MASK) | PPC44x_TLBE_SIZE;
261 /* Guest mapping is smaller than host page size. We must restrict the
262 * size of the mapping to be at most the smaller of the two, but for
263 * simplicity we fall back to a 4K mapping (this is probably what the
264 * guest is using anyways). */
265 stlbe.word0 |= (gvaddr & PAGE_MASK_4K) | PPC44x_TLB_4K;
267 /* 'hpaddr' is a host page, which is larger than the mapping we're
268 * inserting here. To compensate, we must add the in-page offset to the
270 hpaddr |= gpaddr & (PAGE_MASK ^ PAGE_MASK_4K);
273 stlbe.word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf);
274 stlbe.word2 = kvmppc_44x_tlb_shadow_attrib(flags,
275 vcpu->arch.msr & MSR_PR);
276 stlbe.tid = !(asid & 0xff);
278 /* Keep track of the reference so we can properly release it later. */
279 ref = &vcpu_44x->shadow_refs[victim];
280 ref->page = new_page;
281 ref->gtlb_index = gtlb_index;
282 ref->writeable = !!(stlbe.word2 & PPC44x_TLB_UW);
283 ref->tid = stlbe.tid;
285 /* Insert shadow mapping into hardware TLB. */
286 kvmppc_44x_tlbwe(victim, &stlbe);
287 KVMTRACE_5D(STLB_WRITE, vcpu, victim, stlbe.tid, stlbe.word0, stlbe.word1,
288 stlbe.word2, handler);
291 /* For a particular guest TLB entry, invalidate the corresponding host TLB
292 * mappings and release the host pages. */
293 static void kvmppc_44x_invalidate(struct kvm_vcpu *vcpu,
294 unsigned int gtlb_index)
296 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
299 for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_refs); i++) {
300 struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[i];
301 if (ref->gtlb_index == gtlb_index)
302 kvmppc_44x_shadow_release(vcpu_44x, i);
306 void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
308 vcpu->arch.shadow_pid = !usermode;
311 void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid)
313 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
316 if (unlikely(vcpu->arch.pid == new_pid))
319 vcpu->arch.pid = new_pid;
321 /* Guest userspace runs with TID=0 mappings and PID=0, to make sure it
322 * can't access guest kernel mappings (TID=1). When we switch to a new
323 * guest PID, which will also use host PID=0, we must discard the old guest
324 * userspace mappings. */
325 for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_refs); i++) {
326 struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[i];
329 kvmppc_44x_shadow_release(vcpu_44x, i);
333 static int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,
334 const struct kvmppc_44x_tlbe *tlbe)
338 if (!get_tlb_v(tlbe))
341 /* Does it match current guest AS? */
342 /* XXX what about IS != DS? */
343 if (get_tlb_ts(tlbe) != !!(vcpu->arch.msr & MSR_IS))
346 gpa = get_tlb_raddr(tlbe);
347 if (!gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT))
348 /* Mapping is not for RAM. */
354 int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws)
356 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
357 struct kvmppc_44x_tlbe *tlbe;
358 unsigned int gtlb_index;
360 gtlb_index = vcpu->arch.gpr[ra];
361 if (gtlb_index > KVM44x_GUEST_TLB_SIZE) {
362 printk("%s: index %d\n", __func__, gtlb_index);
363 kvmppc_dump_vcpu(vcpu);
367 tlbe = &vcpu_44x->guest_tlb[gtlb_index];
369 /* Invalidate shadow mappings for the about-to-be-clobbered TLB entry. */
370 if (tlbe->word0 & PPC44x_TLB_VALID)
371 kvmppc_44x_invalidate(vcpu, gtlb_index);
374 case PPC44x_TLB_PAGEID:
375 tlbe->tid = get_mmucr_stid(vcpu);
376 tlbe->word0 = vcpu->arch.gpr[rs];
379 case PPC44x_TLB_XLAT:
380 tlbe->word1 = vcpu->arch.gpr[rs];
383 case PPC44x_TLB_ATTRIB:
384 tlbe->word2 = vcpu->arch.gpr[rs];
391 if (tlbe_is_host_safe(vcpu, tlbe)) {
398 eaddr = get_tlb_eaddr(tlbe);
399 gpaddr = get_tlb_raddr(tlbe);
401 /* Use the advertised page size to mask effective and real addrs. */
402 bytes = get_tlb_bytes(tlbe);
403 eaddr &= ~(bytes - 1);
404 gpaddr &= ~(bytes - 1);
406 asid = (tlbe->word0 & PPC44x_TLB_TS) | tlbe->tid;
407 flags = tlbe->word2 & 0xffff;
409 kvmppc_mmu_map(vcpu, eaddr, gpaddr, asid, flags, bytes, gtlb_index);
412 KVMTRACE_5D(GTLB_WRITE, vcpu, gtlb_index, tlbe->tid, tlbe->word0,
413 tlbe->word1, tlbe->word2, handler);
418 int kvmppc_44x_emul_tlbsx(struct kvm_vcpu *vcpu, u8 rt, u8 ra, u8 rb, u8 rc)
422 unsigned int as = get_mmucr_sts(vcpu);
423 unsigned int pid = get_mmucr_stid(vcpu);
425 ea = vcpu->arch.gpr[rb];
427 ea += vcpu->arch.gpr[ra];
429 gtlb_index = kvmppc_44x_tlb_index(vcpu, ea, pid, as);
432 vcpu->arch.cr &= ~0x20000000;
434 vcpu->arch.cr |= 0x20000000;
436 vcpu->arch.gpr[rt] = gtlb_index;