2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright IBM Corp. 2007
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
20 #include <linux/types.h>
21 #include <linux/string.h>
22 #include <linux/kvm.h>
23 #include <linux/kvm_host.h>
24 #include <linux/highmem.h>
26 #include <asm/tlbflush.h>
27 #include <asm/mmu-44x.h>
28 #include <asm/kvm_ppc.h>
29 #include <asm/kvm_44x.h>
34 #ifndef PPC44x_TLBE_SIZE
35 #define PPC44x_TLBE_SIZE PPC44x_TLB_4K
38 #define PAGE_SIZE_4K (1<<12)
39 #define PAGE_MASK_4K (~(PAGE_SIZE_4K - 1))
41 #define PPC44x_TLB_UATTR_MASK \
42 (PPC44x_TLB_U0|PPC44x_TLB_U1|PPC44x_TLB_U2|PPC44x_TLB_U3)
43 #define PPC44x_TLB_USER_PERM_MASK (PPC44x_TLB_UX|PPC44x_TLB_UR|PPC44x_TLB_UW)
44 #define PPC44x_TLB_SUPER_PERM_MASK (PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW)
47 void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
49 struct kvmppc_44x_tlbe *tlbe;
52 printk("vcpu %d TLB dump:\n", vcpu->vcpu_id);
53 printk("| %2s | %3s | %8s | %8s | %8s |\n",
54 "nr", "tid", "word0", "word1", "word2");
56 for (i = 0; i < ARRAY_SIZE(vcpu_44x->guest_tlb); i++) {
57 tlbe = &vcpu_44x->guest_tlb[i];
58 if (tlbe->word0 & PPC44x_TLB_VALID)
59 printk(" G%2d | %02X | %08X | %08X | %08X |\n",
60 i, tlbe->tid, tlbe->word0, tlbe->word1,
66 static inline void kvmppc_44x_tlbie(unsigned int index)
68 /* 0 <= index < 64, so the V bit is clear and we can use the index as
71 "tlbwe %[index], %[index], 0\n"
77 static inline void kvmppc_44x_tlbre(unsigned int index,
78 struct kvmppc_44x_tlbe *tlbe)
81 "tlbre %[word0], %[index], 0\n"
82 "mfspr %[tid], %[sprn_mmucr]\n"
83 "andi. %[tid], %[tid], 0xff\n"
84 "tlbre %[word1], %[index], 1\n"
85 "tlbre %[word2], %[index], 2\n"
86 : [word0] "=r"(tlbe->word0),
87 [word1] "=r"(tlbe->word1),
88 [word2] "=r"(tlbe->word2),
91 [sprn_mmucr] "i"(SPRN_MMUCR)
96 static inline void kvmppc_44x_tlbwe(unsigned int index,
97 struct kvmppc_44x_tlbe *stlbe)
102 "mfspr %[tmp], %[sprn_mmucr]\n"
103 "rlwimi %[tmp], %[tid], 0, 0xff\n"
104 "mtspr %[sprn_mmucr], %[tmp]\n"
105 "tlbwe %[word0], %[index], 0\n"
106 "tlbwe %[word1], %[index], 1\n"
107 "tlbwe %[word2], %[index], 2\n"
109 : [word0] "r"(stlbe->word0),
110 [word1] "r"(stlbe->word1),
111 [word2] "r"(stlbe->word2),
112 [tid] "r"(stlbe->tid),
114 [sprn_mmucr] "i"(SPRN_MMUCR)
118 static u32 kvmppc_44x_tlb_shadow_attrib(u32 attrib, int usermode)
120 /* We only care about the guest's permission and user bits. */
121 attrib &= PPC44x_TLB_PERM_MASK|PPC44x_TLB_UATTR_MASK;
124 /* Guest is in supervisor mode, so we need to translate guest
125 * supervisor permissions into user permissions. */
126 attrib &= ~PPC44x_TLB_USER_PERM_MASK;
127 attrib |= (attrib & PPC44x_TLB_SUPER_PERM_MASK) << 3;
130 /* Make sure host can always access this memory. */
131 attrib |= PPC44x_TLB_SX|PPC44x_TLB_SR|PPC44x_TLB_SW;
133 /* WIMGE = 0b00100 */
134 attrib |= PPC44x_TLB_M;
139 /* Load shadow TLB back into hardware. */
140 void kvmppc_44x_tlb_load(struct kvm_vcpu *vcpu)
142 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
145 for (i = 0; i <= tlb_44x_hwater; i++) {
146 struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[i];
148 if (get_tlb_v(stlbe) && get_tlb_ts(stlbe))
149 kvmppc_44x_tlbwe(i, stlbe);
153 static void kvmppc_44x_tlbe_set_modified(struct kvmppc_vcpu_44x *vcpu_44x,
156 vcpu_44x->shadow_tlb_mod[i] = 1;
159 /* Save hardware TLB to the vcpu, and invalidate all guest mappings. */
160 void kvmppc_44x_tlb_put(struct kvm_vcpu *vcpu)
162 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
165 for (i = 0; i <= tlb_44x_hwater; i++) {
166 struct kvmppc_44x_tlbe *stlbe = &vcpu_44x->shadow_tlb[i];
168 if (vcpu_44x->shadow_tlb_mod[i])
169 kvmppc_44x_tlbre(i, stlbe);
171 if (get_tlb_v(stlbe) && get_tlb_ts(stlbe))
177 /* Search the guest TLB for a matching entry. */
178 int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, unsigned int pid,
181 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
184 /* XXX Replace loop with fancy data structures. */
185 for (i = 0; i < ARRAY_SIZE(vcpu_44x->guest_tlb); i++) {
186 struct kvmppc_44x_tlbe *tlbe = &vcpu_44x->guest_tlb[i];
189 if (eaddr < get_tlb_eaddr(tlbe))
192 if (eaddr > get_tlb_end(tlbe))
195 tid = get_tlb_tid(tlbe);
196 if (tid && (tid != pid))
199 if (!get_tlb_v(tlbe))
202 if (get_tlb_ts(tlbe) != as)
211 int kvmppc_44x_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
213 unsigned int as = !!(vcpu->arch.msr & MSR_IS);
215 return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
218 int kvmppc_44x_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
220 unsigned int as = !!(vcpu->arch.msr & MSR_DS);
222 return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
225 static void kvmppc_44x_shadow_release(struct kvmppc_vcpu_44x *vcpu_44x,
226 unsigned int stlb_index)
228 struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[stlb_index];
233 /* Discard from the TLB. */
234 /* Note: we could actually invalidate a host mapping, if the host overwrote
235 * this TLB entry since we inserted a guest mapping. */
236 kvmppc_44x_tlbie(stlb_index);
238 /* Now release the page. */
240 kvm_release_page_dirty(ref->page);
242 kvm_release_page_clean(ref->page);
246 /* XXX set tlb_44x_index to stlb_index? */
248 KVMTRACE_1D(STLB_INVAL, &vcpu_44x->vcpu, stlb_index, handler);
251 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
253 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
256 for (i = 0; i <= tlb_44x_hwater; i++)
257 kvmppc_44x_shadow_release(vcpu_44x, i);
261 * kvmppc_mmu_map -- create a host mapping for guest memory
263 * If the guest wanted a larger page than the host supports, only the first
264 * host page is mapped here and the rest are demand faulted.
266 * If the guest wanted a smaller page than the host page size, we map only the
267 * guest-size page (i.e. not a full host page mapping).
269 * Caller must ensure that the specified guest TLB entry is safe to insert into
272 void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr,
273 unsigned int gtlb_index)
275 struct kvmppc_44x_tlbe stlbe;
276 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
277 struct kvmppc_44x_tlbe *gtlbe = &vcpu_44x->guest_tlb[gtlb_index];
278 struct kvmppc_44x_shadow_ref *ref;
279 struct page *new_page;
282 u32 asid = gtlbe->tid;
283 u32 flags = gtlbe->word2;
284 u32 max_bytes = get_tlb_bytes(gtlbe);
287 /* Select TLB entry to clobber. Indirectly guard against races with the TLB
288 * miss handler by disabling interrupts. */
290 victim = ++tlb_44x_index;
291 if (victim > tlb_44x_hwater)
293 tlb_44x_index = victim;
296 /* Get reference to new page. */
297 gfn = gpaddr >> PAGE_SHIFT;
298 new_page = gfn_to_page(vcpu->kvm, gfn);
299 if (is_error_page(new_page)) {
300 printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn);
301 kvm_release_page_clean(new_page);
304 hpaddr = page_to_phys(new_page);
306 /* Invalidate any previous shadow mappings. */
307 kvmppc_44x_shadow_release(vcpu_44x, victim);
309 /* XXX Make sure (va, size) doesn't overlap any other
310 * entries. 440x6 user manual says the result would be
313 /* XXX what about AS? */
315 /* Force TS=1 for all guest mappings. */
316 stlbe.word0 = PPC44x_TLB_VALID | PPC44x_TLB_TS;
318 if (max_bytes >= PAGE_SIZE) {
319 /* Guest mapping is larger than or equal to host page size. We can use
320 * a "native" host mapping. */
321 stlbe.word0 |= (gvaddr & PAGE_MASK) | PPC44x_TLBE_SIZE;
323 /* Guest mapping is smaller than host page size. We must restrict the
324 * size of the mapping to be at most the smaller of the two, but for
325 * simplicity we fall back to a 4K mapping (this is probably what the
326 * guest is using anyways). */
327 stlbe.word0 |= (gvaddr & PAGE_MASK_4K) | PPC44x_TLB_4K;
329 /* 'hpaddr' is a host page, which is larger than the mapping we're
330 * inserting here. To compensate, we must add the in-page offset to the
332 hpaddr |= gpaddr & (PAGE_MASK ^ PAGE_MASK_4K);
335 stlbe.word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf);
336 stlbe.word2 = kvmppc_44x_tlb_shadow_attrib(flags,
337 vcpu->arch.msr & MSR_PR);
338 stlbe.tid = !(asid & 0xff);
340 /* Keep track of the reference so we can properly release it later. */
341 ref = &vcpu_44x->shadow_refs[victim];
342 ref->page = new_page;
343 ref->gtlb_index = gtlb_index;
344 ref->writeable = !!(stlbe.word2 & PPC44x_TLB_UW);
345 ref->tid = stlbe.tid;
347 /* Insert shadow mapping into hardware TLB. */
348 kvmppc_44x_tlbe_set_modified(vcpu_44x, victim);
349 kvmppc_44x_tlbwe(victim, &stlbe);
350 KVMTRACE_5D(STLB_WRITE, vcpu, victim, stlbe.tid, stlbe.word0, stlbe.word1,
351 stlbe.word2, handler);
354 /* For a particular guest TLB entry, invalidate the corresponding host TLB
355 * mappings and release the host pages. */
356 static void kvmppc_44x_invalidate(struct kvm_vcpu *vcpu,
357 unsigned int gtlb_index)
359 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
362 for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_refs); i++) {
363 struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[i];
364 if (ref->gtlb_index == gtlb_index)
365 kvmppc_44x_shadow_release(vcpu_44x, i);
369 void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
371 vcpu->arch.shadow_pid = !usermode;
374 void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid)
376 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
379 if (unlikely(vcpu->arch.pid == new_pid))
382 vcpu->arch.pid = new_pid;
384 /* Guest userspace runs with TID=0 mappings and PID=0, to make sure it
385 * can't access guest kernel mappings (TID=1). When we switch to a new
386 * guest PID, which will also use host PID=0, we must discard the old guest
387 * userspace mappings. */
388 for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_refs); i++) {
389 struct kvmppc_44x_shadow_ref *ref = &vcpu_44x->shadow_refs[i];
392 kvmppc_44x_shadow_release(vcpu_44x, i);
396 static int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,
397 const struct kvmppc_44x_tlbe *tlbe)
401 if (!get_tlb_v(tlbe))
404 /* Does it match current guest AS? */
405 /* XXX what about IS != DS? */
406 if (get_tlb_ts(tlbe) != !!(vcpu->arch.msr & MSR_IS))
409 gpa = get_tlb_raddr(tlbe);
410 if (!gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT))
411 /* Mapping is not for RAM. */
417 int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws)
419 struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
420 struct kvmppc_44x_tlbe *tlbe;
421 unsigned int gtlb_index;
423 gtlb_index = vcpu->arch.gpr[ra];
424 if (gtlb_index > KVM44x_GUEST_TLB_SIZE) {
425 printk("%s: index %d\n", __func__, gtlb_index);
426 kvmppc_dump_vcpu(vcpu);
430 tlbe = &vcpu_44x->guest_tlb[gtlb_index];
432 /* Invalidate shadow mappings for the about-to-be-clobbered TLB entry. */
433 if (tlbe->word0 & PPC44x_TLB_VALID)
434 kvmppc_44x_invalidate(vcpu, gtlb_index);
437 case PPC44x_TLB_PAGEID:
438 tlbe->tid = get_mmucr_stid(vcpu);
439 tlbe->word0 = vcpu->arch.gpr[rs];
442 case PPC44x_TLB_XLAT:
443 tlbe->word1 = vcpu->arch.gpr[rs];
446 case PPC44x_TLB_ATTRIB:
447 tlbe->word2 = vcpu->arch.gpr[rs];
454 if (tlbe_is_host_safe(vcpu, tlbe)) {
459 eaddr = get_tlb_eaddr(tlbe);
460 gpaddr = get_tlb_raddr(tlbe);
462 /* Use the advertised page size to mask effective and real addrs. */
463 bytes = get_tlb_bytes(tlbe);
464 eaddr &= ~(bytes - 1);
465 gpaddr &= ~(bytes - 1);
467 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
470 KVMTRACE_5D(GTLB_WRITE, vcpu, gtlb_index, tlbe->tid, tlbe->word0,
471 tlbe->word1, tlbe->word2, handler);
473 kvmppc_set_exit_type(vcpu, EMULATED_TLBWE_EXITS);
477 int kvmppc_44x_emul_tlbsx(struct kvm_vcpu *vcpu, u8 rt, u8 ra, u8 rb, u8 rc)
481 unsigned int as = get_mmucr_sts(vcpu);
482 unsigned int pid = get_mmucr_stid(vcpu);
484 ea = vcpu->arch.gpr[rb];
486 ea += vcpu->arch.gpr[ra];
488 gtlb_index = kvmppc_44x_tlb_index(vcpu, ea, pid, as);
491 vcpu->arch.cr &= ~0x20000000;
493 vcpu->arch.cr |= 0x20000000;
495 vcpu->arch.gpr[rt] = gtlb_index;
497 kvmppc_set_exit_type(vcpu, EMULATED_TLBSX_EXITS);