2 * Copyright (c) 2002 Stephen Rothwell, IBM Coproration
3 * Copyright (c) 2007 Benjamin Herrenschmidt, IBM Coproration
4 * Extracted from ptrace.c and ptrace32.c
6 * This file is subject to the terms and conditions of the GNU General
7 * Public License. See the file README.legal in the main directory of
8 * this archive for more details.
11 #ifndef _POWERPC_PTRACE_COMMON_H
12 #define _POWERPC_PTRACE_COMMON_H
15 * Get contents of register REGNO in task TASK.
17 static inline unsigned long get_reg(struct task_struct *task, int regno)
19 unsigned long tmp = 0;
21 if (task->thread.regs == NULL)
24 if (regno == PT_MSR) {
25 tmp = ((unsigned long *)task->thread.regs)[PT_MSR];
26 return PT_MUNGE_MSR(tmp, task);
29 if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
30 return ((unsigned long *)task->thread.regs)[regno];
36 * Write contents of register REGNO in task TASK.
38 static inline int put_reg(struct task_struct *task, int regno,
41 if (task->thread.regs == NULL)
44 if (regno <= PT_MAX_PUT_REG) {
46 data = (data & MSR_DEBUGCHANGE)
47 | (task->thread.regs->msr & ~MSR_DEBUGCHANGE);
48 ((unsigned long *)task->thread.regs)[regno] = data;
57 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
58 * The transfer totals 34 quadword. Quadwords 0-31 contain the
59 * corresponding vector registers. Quadword 32 contains the vscr as the
60 * last word (offset 12) within that quadword. Quadword 33 contains the
61 * vrsave as the first word (offset 0) within the quadword.
63 * This definition of the VMX state is compatible with the current PPC32
64 * ptrace interface. This allows signal handling and ptrace to use the
65 * same structures. This also simplifies the implementation of a bi-arch
66 * (combined (32- and 64-bit) gdb.
70 * Get contents of AltiVec register state in task TASK
72 static inline int get_vrregs(unsigned long __user *data,
73 struct task_struct *task)
75 unsigned long regsize;
77 /* copy AltiVec registers VR[0] .. VR[31] */
78 regsize = 32 * sizeof(vector128);
79 if (copy_to_user(data, task->thread.vr, regsize))
81 data += (regsize / sizeof(unsigned long));
84 regsize = 1 * sizeof(vector128);
85 if (copy_to_user(data, &task->thread.vscr, regsize))
87 data += (regsize / sizeof(unsigned long));
90 if (put_user(task->thread.vrsave, (u32 __user *)data))
97 * Write contents of AltiVec register state into task TASK.
99 static inline int set_vrregs(struct task_struct *task,
100 unsigned long __user *data)
102 unsigned long regsize;
104 /* copy AltiVec registers VR[0] .. VR[31] */
105 regsize = 32 * sizeof(vector128);
106 if (copy_from_user(task->thread.vr, data, regsize))
108 data += (regsize / sizeof(unsigned long));
111 regsize = 1 * sizeof(vector128);
112 if (copy_from_user(&task->thread.vscr, data, regsize))
114 data += (regsize / sizeof(unsigned long));
117 if (get_user(task->thread.vrsave, (u32 __user *)data))
122 #endif /* CONFIG_ALTIVEC */
124 static inline void set_single_step(struct task_struct *task)
126 struct pt_regs *regs = task->thread.regs;
129 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
130 task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC;
136 set_tsk_thread_flag(task, TIF_SINGLESTEP);
139 static inline void clear_single_step(struct task_struct *task)
141 struct pt_regs *regs = task->thread.regs;
144 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
145 task->thread.dbcr0 = 0;
146 regs->msr &= ~MSR_DE;
148 regs->msr &= ~MSR_SE;
151 clear_tsk_thread_flag(task, TIF_SINGLESTEP);
154 #endif /* _POWERPC_PTRACE_COMMON_H */