2 # This file is subject to the terms and conditions of the GNU General Public
3 # License. See the file "COPYING" in the main directory of this archive
6 # Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
7 # DECStation modifications by Paul M. Antoine, 1996
8 # Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
10 # This file is included by the global makefile so that you can add your own
11 # architecture-specific flags and dependencies. Remember to do have actions
12 # for "archclean" cleaning up for this architecture.
15 as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \
16 -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
17 else echo "$(2)"; fi ;)
22 # Select the object file format to substitute into the linker script.
24 ifdef CONFIG_CPU_LITTLE_ENDIAN
25 32bit-tool-prefix = mipsel-linux-
26 64bit-tool-prefix = mips64el-linux-
27 32bit-bfd = elf32-tradlittlemips
28 64bit-bfd = elf64-tradlittlemips
29 32bit-emul = elf32ltsmip
30 64bit-emul = elf64ltsmip
32 32bit-tool-prefix = mips-linux-
33 64bit-tool-prefix = mips64-linux-
34 32bit-bfd = elf32-tradbigmips
35 64bit-bfd = elf64-tradbigmips
36 32bit-emul = elf32btsmip
37 64bit-emul = elf64btsmip
42 tool-prefix = $(32bit-tool-prefix)
47 tool-prefix = $(64bit-tool-prefix)
51 ifdef CONFIG_CROSSCOMPILE
52 CROSS_COMPILE := $(tool-prefix)
55 CHECKFLAGS-y += -D__linux__ -D__mips__ \
60 CHECKFLAGS-$(CONFIG_32BIT) += -D_MIPS_SIM=_ABIO32 \
63 -D__PTRDIFF_TYPE__=int
64 CHECKFLAGS-$(CONFIG_64BIT) += -m64 -D_MIPS_SIM=_ABI64 \
67 -D__PTRDIFF_TYPE__="long int"
68 CHECKFLAGS-$(CONFIG_CPU_BIG_ENDIAN) += -D__MIPSEB__
69 CHECKFLAGS-$(CONFIG_CPU_LITTLE_ENDIAN) += -D__MIPSEL__
71 CHECKFLAGS = $(CHECKFLAGS-y)
75 ld-emul = $(32bit-emul)
77 vmlinux-64 = vmlinux.64
82 ld-emul = $(64bit-emul)
83 vmlinux-32 = vmlinux.32
86 cflags-y += $(call cc-option,-mno-explicit-relocs)
90 # GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
91 # code since it only slows down the whole thing. At some point we might make
92 # use of global pointer optimizations but their use of $28 conflicts with
93 # the current pointer optimization.
95 # The DECStation requires an ECOFF kernel for remote booting, other MIPS
96 # machines may also. Since BFD is incredibly buggy with respect to
97 # crossformat linking we rely on the elf2ecoff tool for format conversion.
99 cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
100 cflags-y += -msoft-float
101 LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
102 MODFLAGS += -mlong-calls
105 # We explicitly add the endianness specifier if needed, this allows
106 # to compile kernels with a toolchain for the other endianness. We
107 # carefully avoid to add it redundantly because gcc 3.3/3.4 complains
108 # when fed the toolchain default!
110 cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB)
111 cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL)
113 cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
114 -fno-omit-frame-pointer
117 # Use: $(call set_gccflags,<cpu0>,<isa0>,<cpu1>,<isa1>,<isa2>)
119 # <cpu0>,<isa0> -- preferred CPU and ISA designations (may require
121 # <cpu1>,<isa1> -- fallback CPU and ISA designations (have to work
122 # with up to the oldest supported tools)
123 # <isa2> -- an ISA designation used as an ABI selector for
124 # gcc versions that do not support "-mabi=32"
125 # (depending on the CPU type, either "mips1" or
128 set_gccflags = $(shell \
130 cpu=$(1); isa=-$(2); \
131 for gcc_opt in -march= -mcpu=; do \
132 $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
133 -xc /dev/null > /dev/null 2>&1 && \
136 cpu=$(3); isa=-$(4); \
137 for gcc_opt in -march= -mcpu=; do \
138 $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
139 -xc /dev/null > /dev/null 2>&1 && \
144 gcc_abi=-mabi=$(gcc-abi); gcc_cpu=$$cpu; \
145 if $(CC) $$gcc_abi -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then \
148 gcc_abi=; gcc_isa=-$(5); \
150 gas_abi=-Wa,-$(gcc-abi); gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \
152 for gas_opt in -Wa,-march= -Wa,-mcpu=; do \
153 $(CC) $$gas_abi $$gas_opt$$cpu $$gas_isa -Wa,-Z -c \
154 -o /dev/null -xassembler /dev/null > /dev/null 2>&1 && \
157 gas_abi=; gas_opt=; gas_cpu=; gas_isa=; \
160 if test "$(gcc-abi)" != "$(gas-abi)"; then \
161 gas_abi="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
163 if test "$$gcc_opt" = -march= && test -n "$$gcc_abi"; then \
164 $(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \
165 -xc /dev/null > /dev/null 2>&1 && \
168 echo $$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_abi $$gas_opt$$gas_cpu $$gas_isa)
171 # CPU-dependent compiler/assembler options for optimization.
173 cflags-$(CONFIG_CPU_R3000) += \
174 $(call set_gccflags,r3000,mips1,r3000,mips1,mips1)
175 CHECKFLAGS-$(CONFIG_CPU_R3000) += -D_MIPS_ISA=_MIPS_ISA_MIPS1
177 cflags-$(CONFIG_CPU_TX39XX) += \
178 $(call set_gccflags,r3900,mips1,r3000,mips1,mips1)
179 CHECKFLAGS-$(CONFIG_CPU_TX39XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS1
181 cflags-$(CONFIG_CPU_R6000) += \
182 $(call set_gccflags,r6000,mips2,r6000,mips2,mips2) \
184 CHECKFLAGS-$(CONFIG_CPU_R6000) += -D_MIPS_ISA=_MIPS_ISA_MIPS2
186 cflags-$(CONFIG_CPU_R4300) += \
187 $(call set_gccflags,r4300,mips3,r4300,mips3,mips2) \
189 CHECKFLAGS-$(CONFIG_CPU_R4300) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
191 cflags-$(CONFIG_CPU_VR41XX) += \
192 $(call set_gccflags,r4100,mips3,r4600,mips3,mips2) \
194 CHECKFLAGS-$(CONFIG_CPU_VR41XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
196 cflags-$(CONFIG_CPU_R4X00) += \
197 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
199 CHECKFLAGS-$(CONFIG_CPU_R4X00) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
201 cflags-$(CONFIG_CPU_TX49XX) += \
202 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
204 CHECKFLAGS-$(CONFIG_CPU_TX49XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
206 cflags-$(CONFIG_CPU_MIPS32_R1) += \
207 $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \
209 CHECKFLAGS-$(CONFIG_CPU_MIPS32_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS32
211 cflags-$(CONFIG_CPU_MIPS32_R2) += \
212 $(call set_gccflags,mips32r2,mips32r2,r4600,mips3,mips2) \
214 CHECKFLAGS-$(CONFIG_CPU_MIPS32_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS32
216 cflags-$(CONFIG_CPU_MIPS64_R1) += \
217 $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \
219 CHECKFLAGS-$(CONFIG_CPU_MIPS64_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
221 cflags-$(CONFIG_CPU_MIPS64_R2) += \
222 $(call set_gccflags,mips64r2,mips64r2,r4600,mips3,mips2) \
224 CHECKFLAGS-$(CONFIG_CPU_MIPS64_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
226 cflags-$(CONFIG_CPU_R5000) += \
227 $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \
229 CHECKFLAGS-$(CONFIG_CPU_R5000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
231 cflags-$(CONFIG_CPU_R5432) += \
232 $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \
234 CHECKFLAGS-$(CONFIG_CPU_R5432) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
236 cflags-$(CONFIG_CPU_NEVADA) += \
237 $(call set_gccflags,rm5200,mips4,r5000,mips4,mips2) \
239 CHECKFLAGS-$(CONFIG_CPU_NEVADA) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
241 cflags-$(CONFIG_CPU_RM7000) += \
242 $(call set_gccflags,rm7000,mips4,r5000,mips4,mips2) \
244 CHECKFLAGS-$(CONFIG_CPU_RM7000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
246 cflags-$(CONFIG_CPU_RM9000) += \
247 $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \
249 CHECKFLAGS-$(CONFIG_CPU_RM9000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
252 cflags-$(CONFIG_CPU_SB1) += \
253 $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \
255 CHECKFLAGS-$(CONFIG_CPU_SB1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
257 cflags-$(CONFIG_CPU_R8000) += \
258 $(call set_gccflags,r8000,mips4,r8000,mips4,mips2) \
260 CHECKFLAGS-$(CONFIG_CPU_R8000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
262 cflags-$(CONFIG_CPU_R10000) += \
263 $(call set_gccflags,r10000,mips4,r8000,mips4,mips2) \
265 CHECKFLAGS-$(CONFIG_CPU_R10000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
268 ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
269 MODFLAGS += -msb1-pass1-workarounds
276 libs-$(CONFIG_ARC) += arch/mips/arc/
277 libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
280 # Board-dependent options and extra files
284 # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
286 core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
287 cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
288 load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
291 # Common Alchemy Au1x00 stuff
293 core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
294 cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
297 # AMD Alchemy Pb1000 eval board
299 libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
300 cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
301 load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
304 # AMD Alchemy Pb1100 eval board
306 libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
307 cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
308 load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
311 # AMD Alchemy Pb1500 eval board
313 libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
314 cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
315 load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
318 # AMD Alchemy Pb1550 eval board
320 libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
321 cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
322 load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
325 # AMD Alchemy Pb1200 eval board
327 libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
328 cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
329 load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
332 # AMD Alchemy Db1000 eval board
334 libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
335 cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
336 load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
339 # AMD Alchemy Db1100 eval board
341 libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
342 cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
343 load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
346 # AMD Alchemy Db1500 eval board
348 libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
349 cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
350 load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
353 # AMD Alchemy Db1550 eval board
355 libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
356 cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
357 load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
360 # AMD Alchemy Db1200 eval board
362 libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
363 cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
364 load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
367 # AMD Alchemy Bosporus eval board
369 libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
370 cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
371 load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
374 # AMD Alchemy Mirage eval board
376 libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
377 cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
378 load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
381 # 4G-Systems eval board
383 libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
384 load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
389 libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
390 load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
395 core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
396 cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
397 load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
402 core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
403 cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
404 libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
405 load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
406 CLEAN_FILES += drivers/tc/lk201-map.c
409 # Galileo EV64120 Board
411 core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
412 core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
413 cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
414 load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
417 # Galileo EV96100 Board
419 core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
420 cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
421 load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000
424 # Globespan IVR eval board with QED 5231 CPU
426 core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/
427 core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/
428 load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000
431 # ITE 8172 eval board with QED 5231 CPU
433 core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/
434 load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000
437 # For all MIPS, Inc. eval boards
439 core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
444 core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
445 cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
446 cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
447 load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
452 core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
453 cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
454 load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
459 core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
460 load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
465 core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
466 cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
467 load-$(CONFIG_MIPS_SIM) += 0x80100000
470 # Momentum Ocelot board
472 # The Ocelot setup.o must be linked early - it does the ioremap() for the
475 core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
476 arch/mips/gt64120/momenco_ocelot/
477 cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
478 load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
481 # Momentum Ocelot-G board
483 # The Ocelot-G setup.o must be linked early - it does the ioremap() for the
486 core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
487 load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000
490 # Momentum Ocelot-C and -CS boards
492 # The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
494 core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
495 load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
498 # PMC-Sierra Yosemite
500 core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
501 cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
502 load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
504 # Qemu simulating MIPS32 4Kc
506 core-$(CONFIG_QEMU) += arch/mips/qemu/
507 cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
508 load-$(CONFIG_QEMU) += 0xffffffff80010000
513 core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
514 cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
515 load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
518 # Momentum Jaguar ATX
520 core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
521 cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja
522 #ifdef CONFIG_JAGUAR_DMALOW
523 #load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
525 load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000
531 core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
536 core-$(CONFIG_DDB5074) += arch/mips/ddb5xxx/ddb5074/
537 load-$(CONFIG_DDB5074) += 0xffffffff80080000
542 core-$(CONFIG_DDB5476) += arch/mips/ddb5xxx/ddb5476/
543 load-$(CONFIG_DDB5476) += 0xffffffff80080000
548 core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
549 load-$(CONFIG_DDB5477) += 0xffffffff80100000
551 core-$(CONFIG_LASAT) += arch/mips/lasat/
552 cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
553 load-$(CONFIG_LASAT) += 0xffffffff80000000
558 core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
559 cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
564 core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
565 load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
568 # ZAO Networks Capcella (VR4131)
570 load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
573 # Victor MP-C303/304 (VR4122)
575 load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
578 # IBM WorkPad z50 (VR4121)
580 core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
581 load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
584 # CASIO CASSIPEIA E-55/65 (VR4111)
586 core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
587 load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
590 # TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
592 load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
595 # Common Philips PNX8550
597 core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
598 cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
601 # Philips PNX8550 JBS board
603 libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
604 #cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
605 load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
608 # SGI IP22 (Indy/Indigo2)
610 # Set the load address to >= 0xffffffff88069000 if you want to leave space for
611 # symmon, 0xffffffff80002000 for production kernels. Note that the value must
612 # be aligned to a multiple of the kernel stack size or the handling of the
613 # current variable will break so for 64-bit kernels we have to raise the start
616 core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
617 cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
619 load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
622 load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
626 # SGI-IP27 (Origin200/2000)
628 # Set the load address to >= 0xc000000000300000 if you want to leave space for
629 # symmon, 0xc00000000001c000 for production kernels. Note that the value must
630 # be 16kb aligned or the handling of the current variable will break.
632 ifdef CONFIG_SGI_IP27
633 core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
634 cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
635 ifdef CONFIG_MAPPED_KERNEL
636 load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
637 OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
638 dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
640 load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
641 OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
648 # Set the load address to >= 80069000 if you want to leave space for symmon,
649 # 0xffffffff80004000 for production kernels. Note that the value must be aligned to
650 # a multiple of the kernel stack size or the handling of the current variable
653 core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
654 cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
655 load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
660 # This is a LIB so that it links at the end, and initcalls are later
661 # the sequence; but it is built as an object so that modules don't get
662 # removed (as happens, even if they have __initcall/module_init)
664 core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
665 cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
666 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
668 core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
669 cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
670 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
672 core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
673 cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
674 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
676 core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
677 cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
678 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
681 # Sibyte BCM91120x (Carmel) board
682 # Sibyte BCM91120C (CRhine) board
683 # Sibyte BCM91125C (CRhone) board
684 # Sibyte BCM91125E (Rhone) board
686 # Sibyte BCM91x80 (BigSur) board
688 libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
689 load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
690 libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
691 load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
692 libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
693 load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
694 libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
695 load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
696 libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
697 load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
698 libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
699 load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
700 libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
701 load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
706 core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
707 cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
708 load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000
711 # Toshiba JMR-TX3927 board
713 core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
714 arch/mips/jmr3927/common/
715 cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
716 load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
719 # Toshiba RBTX4927 board or
720 # Toshiba RBTX4937 board
722 core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
723 core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
724 load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
727 # Toshiba RBTX4938 board
729 core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
730 core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
731 load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
733 cflags-y += -Iinclude/asm-mips/mach-generic
734 drivers-$(CONFIG_PCI) += arch/mips/pci/
737 ifdef CONFIG_CPU_LITTLE_ENDIAN
740 JIFFIES = jiffies_64 + 4
746 AFLAGS += $(cflags-y)
747 CFLAGS += $(cflags-y)
749 LDFLAGS += -m $(ld-emul)
751 OBJCOPYFLAGS += --remove-section=.reginfo
754 # Choosing incompatible machines durings configuration will result in
755 # error messages during linking. Select a default linkscript if
756 # none has been choosen above.
759 CPPFLAGS_vmlinux.lds := \
761 -D"LOADADDR=$(load-y)" \
762 -D"JIFFIES=$(JIFFIES)" \
763 -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
765 head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
767 libs-y += arch/mips/lib/
768 libs-$(CONFIG_32BIT) += arch/mips/lib-32/
769 libs-$(CONFIG_64BIT) += arch/mips/lib-64/
771 core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
773 drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
776 rom.bin rom.sw: vmlinux
777 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
781 # Some machines like the Indy need 32-bit ELF binaries for booting purposes.
782 # Other need ECOFF, so we build a 32-bit ELF binary for them which we then
783 # convert to ECOFF using elf2ecoff.
786 $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
789 # The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
790 # ELF files from 32-bit files by conversion.
793 $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
795 makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
797 ifdef CONFIG_BOOT_ELF32
801 ifdef CONFIG_BOOT_ELF64
805 ifdef CONFIG_MIPS_ATLAS
809 ifdef CONFIG_MIPS_MALTA
813 ifdef CONFIG_MIPS_SEAD
821 ifdef CONFIG_SNI_RM200_PCI
825 vmlinux.bin: $(vmlinux-32)
826 +@$(call makeboot,$@)
828 vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
829 +@$(call makeboot,$@)
831 vmlinux.srec: $(vmlinux-32)
832 +@$(call makeboot,$@)
834 CLEAN_FILES += vmlinux.ecoff \
840 @$(MAKE) $(clean)=arch/mips/boot
841 @$(MAKE) $(clean)=arch/mips/lasat
843 CLEAN_FILES += vmlinux.32 \