SAFE public projects git trees. - safe/jmp/linux-2.6/blob - arch/blackfin/mach-bf548/include/mach/cdefBF54x_base.h

   1 /*
   2  * File:         include/asm-blackfin/mach-bf548/cdefBF54x_base.h
   3  * Based on:
   4  * Author:
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Rev:
  10  *
  11  * Modified:
  12  *
  13  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License as published by
  17  * the Free Software Foundation; either version 2, or (at your option)
  18  * any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; see the file COPYING.
  27  * If not, write to the Free Software Foundation,
  28  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  29  */
  30
  31 #ifndef _CDEF_BF54X_H
  32 #define _CDEF_BF54X_H
  33
  34 #include <asm/blackfin.h>
  35
  36 #include "defBF54x_base.h"
  37
  38 /* ************************************************************** */
  39 /* SYSTEM & MMR ADDRESS DEFINITIONS COMMON TO ALL ADSP-BF54x    */
  40 /* ************************************************************** */
  41
  42 /* PLL Registers */
  43
  44 #define bfin_read_PLL_CTL()             bfin_read16(PLL_CTL)
  45 #define bfin_read_PLL_DIV()             bfin_read16(PLL_DIV)
  46 #define bfin_write_PLL_DIV(val)         bfin_write16(PLL_DIV, val)
  47 #define bfin_read_VR_CTL()              bfin_read16(VR_CTL)
  48 #define bfin_read_PLL_STAT()            bfin_read16(PLL_STAT)
  49 #define bfin_write_PLL_STAT(val)        bfin_write16(PLL_STAT, val)
  50 #define bfin_read_PLL_LOCKCNT()         bfin_read16(PLL_LOCKCNT)
  51 #define bfin_write_PLL_LOCKCNT(val)     bfin_write16(PLL_LOCKCNT, val)
  52
  53 /* Debug/MP/Emulation Registers (0xFFC00014 - 0xFFC00014) */
  54
  55 #define bfin_read_CHIPID()              bfin_read32(CHIPID)
  56 #define bfin_write_CHIPID(val)          bfin_write32(CHIPID, val)
  57
  58 /* System Reset and Interrubfin_read_()t Controller (0xFFC00100 - 0xFFC00104) */
  59
  60 #define bfin_read_SWRST()               bfin_read16(SWRST)
  61 #define bfin_write_SWRST(val)           bfin_write16(SWRST, val)
  62 #define bfin_read_SYSCR()               bfin_read16(SYSCR)
  63 #define bfin_write_SYSCR(val)           bfin_write16(SYSCR, val)
  64
  65 /* SIC Registers */
  66
  67 #define bfin_read_SIC_IMASK0()          bfin_read32(SIC_IMASK0)
  68 #define bfin_write_SIC_IMASK0(val)      bfin_write32(SIC_IMASK0, val)
  69 #define bfin_read_SIC_IMASK1()          bfin_read32(SIC_IMASK1)
  70 #define bfin_write_SIC_IMASK1(val)      bfin_write32(SIC_IMASK1, val)
  71 #define bfin_read_SIC_IMASK2()          bfin_read32(SIC_IMASK2)
  72 #define bfin_write_SIC_IMASK2(val)      bfin_write32(SIC_IMASK2, val)
  73 #define bfin_read_SIC_IMASK(x)          bfin_read32(SIC_IMASK0 + (x << 2))
  74 #define bfin_write_SIC_IMASK(x, val)    bfin_write32((SIC_IMASK0 + (x << 2)), val)
  75
  76 #define bfin_read_SIC_ISR0()            bfin_read32(SIC_ISR0)
  77 #define bfin_write_SIC_ISR0(val)        bfin_write32(SIC_ISR0, val)
  78 #define bfin_read_SIC_ISR1()            bfin_read32(SIC_ISR1)
  79 #define bfin_write_SIC_ISR1(val)        bfin_write32(SIC_ISR1, val)
  80 #define bfin_read_SIC_ISR2()            bfin_read32(SIC_ISR2)
  81 #define bfin_write_SIC_ISR2(val)        bfin_write32(SIC_ISR2, val)
  82 #define bfin_read_SIC_ISR(x)            bfin_read32(SIC_ISR0 + (x << 2))
  83 #define bfin_write_SIC_ISR(x, val)      bfin_write32((SIC_ISR0 + (x << 2)), val)
  84
  85 #define bfin_read_SIC_IWR0()            bfin_read32(SIC_IWR0)
  86 #define bfin_write_SIC_IWR0(val)        bfin_write32(SIC_IWR0, val)
  87 #define bfin_read_SIC_IWR1()            bfin_read32(SIC_IWR1)
  88 #define bfin_write_SIC_IWR1(val)        bfin_write32(SIC_IWR1, val)
  89 #define bfin_read_SIC_IWR2()            bfin_read32(SIC_IWR2)
  90 #define bfin_write_SIC_IWR2(val)        bfin_write32(SIC_IWR2, val)
  91 #define bfin_read_SIC_IAR0()            bfin_read32(SIC_IAR0)
  92 #define bfin_write_SIC_IAR0(val)        bfin_write32(SIC_IAR0, val)
  93 #define bfin_read_SIC_IAR1()            bfin_read32(SIC_IAR1)
  94 #define bfin_write_SIC_IAR1(val)        bfin_write32(SIC_IAR1, val)
  95 #define bfin_read_SIC_IAR2()            bfin_read32(SIC_IAR2)
  96 #define bfin_write_SIC_IAR2(val)        bfin_write32(SIC_IAR2, val)
  97 #define bfin_read_SIC_IAR3()            bfin_read32(SIC_IAR3)
  98 #define bfin_write_SIC_IAR3(val)        bfin_write32(SIC_IAR3, val)
  99 #define bfin_read_SIC_IAR4()            bfin_read32(SIC_IAR4)
 100 #define bfin_write_SIC_IAR4(val)        bfin_write32(SIC_IAR4, val)
 101 #define bfin_read_SIC_IAR5()            bfin_read32(SIC_IAR5)
 102 #define bfin_write_SIC_IAR5(val)        bfin_write32(SIC_IAR5, val)
 103 #define bfin_read_SIC_IAR6()            bfin_read32(SIC_IAR6)
 104 #define bfin_write_SIC_IAR6(val)        bfin_write32(SIC_IAR6, val)
 105 #define bfin_read_SIC_IAR7()            bfin_read32(SIC_IAR7)
 106 #define bfin_write_SIC_IAR7(val)        bfin_write32(SIC_IAR7, val)
 107 #define bfin_read_SIC_IAR8()            bfin_read32(SIC_IAR8)
 108 #define bfin_write_SIC_IAR8(val)        bfin_write32(SIC_IAR8, val)
 109 #define bfin_read_SIC_IAR9()            bfin_read32(SIC_IAR9)
 110 #define bfin_write_SIC_IAR9(val)        bfin_write32(SIC_IAR9, val)
 111 #define bfin_read_SIC_IAR10()           bfin_read32(SIC_IAR10)
 112 #define bfin_write_SIC_IAR10(val)       bfin_write32(SIC_IAR10, val)
 113 #define bfin_read_SIC_IAR11()           bfin_read32(SIC_IAR11)
 114 #define bfin_write_SIC_IAR11(val)       bfin_write32(SIC_IAR11, val)
 115
 116 /* Watchdog Timer Registers */
 117
 118 #define bfin_read_WDOG_CTL()            bfin_read16(WDOG_CTL)
 119 #define bfin_write_WDOG_CTL(val)        bfin_write16(WDOG_CTL, val)
 120 #define bfin_read_WDOG_CNT()            bfin_read32(WDOG_CNT)
 121 #define bfin_write_WDOG_CNT(val)        bfin_write32(WDOG_CNT, val)
 122 #define bfin_read_WDOG_STAT()           bfin_read32(WDOG_STAT)
 123 #define bfin_write_WDOG_STAT(val)       bfin_write32(WDOG_STAT, val)
 124
 125 /* RTC Registers */
 126
 127 #define bfin_read_RTC_STAT()            bfin_read32(RTC_STAT)
 128 #define bfin_write_RTC_STAT(val)        bfin_write32(RTC_STAT, val)
 129 #define bfin_read_RTC_ICTL()            bfin_read16(RTC_ICTL)
 130 #define bfin_write_RTC_ICTL(val)        bfin_write16(RTC_ICTL, val)
 131 #define bfin_read_RTC_ISTAT()           bfin_read16(RTC_ISTAT)
 132 #define bfin_write_RTC_ISTAT(val)       bfin_write16(RTC_ISTAT, val)
 133 #define bfin_read_RTC_SWCNT()           bfin_read16(RTC_SWCNT)
 134 #define bfin_write_RTC_SWCNT(val)       bfin_write16(RTC_SWCNT, val)
 135 #define bfin_read_RTC_ALARM()           bfin_read32(RTC_ALARM)
 136 #define bfin_write_RTC_ALARM(val)       bfin_write32(RTC_ALARM, val)
 137 #define bfin_read_RTC_PREN()            bfin_read16(RTC_PREN)
 138 #define bfin_write_RTC_PREN(val)        bfin_write16(RTC_PREN, val)
 139
 140 /* UART0 Registers */
 141
 142 #define bfin_read_UART0_DLL()           bfin_read16(UART0_DLL)
 143 #define bfin_write_UART0_DLL(val)       bfin_write16(UART0_DLL, val)
 144 #define bfin_read_UART0_DLH()           bfin_read16(UART0_DLH)
 145 #define bfin_write_UART0_DLH(val)       bfin_write16(UART0_DLH, val)
 146 #define bfin_read_UART0_GCTL()          bfin_read16(UART0_GCTL)
 147 #define bfin_write_UART0_GCTL(val)      bfin_write16(UART0_GCTL, val)
 148 #define bfin_read_UART0_LCR()           bfin_read16(UART0_LCR)
 149 #define bfin_write_UART0_LCR(val)       bfin_write16(UART0_LCR, val)
 150 #define bfin_read_UART0_MCR()           bfin_read16(UART0_MCR)
 151 #define bfin_write_UART0_MCR(val)       bfin_write16(UART0_MCR, val)
 152 #define bfin_read_UART0_LSR()           bfin_read16(UART0_LSR)
 153 #define bfin_write_UART0_LSR(val)       bfin_write16(UART0_LSR, val)
 154 #define bfin_read_UART0_MSR()           bfin_read16(UART0_MSR)
 155 #define bfin_write_UART0_MSR(val)       bfin_write16(UART0_MSR, val)
 156 #define bfin_read_UART0_SCR()           bfin_read16(UART0_SCR)
 157 #define bfin_write_UART0_SCR(val)       bfin_write16(UART0_SCR, val)
 158 #define bfin_read_UART0_IER_SET()       bfin_read16(UART0_IER_SET)
 159 #define bfin_write_UART0_IER_SET(val)   bfin_write16(UART0_IER_SET, val)
 160 #define bfin_read_UART0_IER_CLEAR()     bfin_read16(UART0_IER_CLEAR)
 161 #define bfin_write_UART0_IER_CLEAR(val) bfin_write16(UART0_IER_CLEAR, val)
 162 #define bfin_read_UART0_THR()           bfin_read16(UART0_THR)
 163 #define bfin_write_UART0_THR(val)       bfin_write16(UART0_THR, val)
 164 #define bfin_read_UART0_RBR()           bfin_read16(UART0_RBR)
 165 #define bfin_write_UART0_RBR(val)       bfin_write16(UART0_RBR, val)
 166
 167 /* SPI0 Registers */
 168
 169 #define bfin_read_SPI0_CTL()            bfin_read16(SPI0_CTL)
 170 #define bfin_write_SPI0_CTL(val)        bfin_write16(SPI0_CTL, val)
 171 #define bfin_read_SPI0_FLG()            bfin_read16(SPI0_FLG)
 172 #define bfin_write_SPI0_FLG(val)        bfin_write16(SPI0_FLG, val)
 173 #define bfin_read_SPI0_STAT()           bfin_read16(SPI0_STAT)
 174 #define bfin_write_SPI0_STAT(val)       bfin_write16(SPI0_STAT, val)
 175 #define bfin_read_SPI0_TDBR()           bfin_read16(SPI0_TDBR)
 176 #define bfin_write_SPI0_TDBR(val)       bfin_write16(SPI0_TDBR, val)
 177 #define bfin_read_SPI0_RDBR()           bfin_read16(SPI0_RDBR)
 178 #define bfin_write_SPI0_RDBR(val)       bfin_write16(SPI0_RDBR, val)
 179 #define bfin_read_SPI0_BAUD()           bfin_read16(SPI0_BAUD)
 180 #define bfin_write_SPI0_BAUD(val)       bfin_write16(SPI0_BAUD, val)
 181 #define bfin_read_SPI0_SHADOW()         bfin_read16(SPI0_SHADOW)
 182 #define bfin_write_SPI0_SHADOW(val)     bfin_write16(SPI0_SHADOW, val)
 183
 184 /* Timer Groubfin_read_() of 3 registers are not defined in the shared file because they are not available on the ADSP-BF542 processor */
 185
 186 /* Two Wire Interface Registers (TWI0) */
 187
 188 /* SPORT0 is not defined in the shared file because it is not available on the ADSP-BF542 and ADSP-BF544 bfin_read_()rocessors */
 189
 190 /* SPORT1 Registers */
 191
 192 #define bfin_read_SPORT1_TCR1()         bfin_read16(SPORT1_TCR1)
 193 #define bfin_write_SPORT1_TCR1(val)     bfin_write16(SPORT1_TCR1, val)
 194 #define bfin_read_SPORT1_TCR2()         bfin_read16(SPORT1_TCR2)
 195 #define bfin_write_SPORT1_TCR2(val)     bfin_write16(SPORT1_TCR2, val)
 196 #define bfin_read_SPORT1_TCLKDIV()      bfin_read16(SPORT1_TCLKDIV)
 197 #define bfin_write_SPORT1_TCLKDIV(val)  bfin_write16(SPORT1_TCLKDIV, val)
 198 #define bfin_read_SPORT1_TFSDIV()       bfin_read16(SPORT1_TFSDIV)
 199 #define bfin_write_SPORT1_TFSDIV(val)   bfin_write16(SPORT1_TFSDIV, val)
 200 #define bfin_read_SPORT1_TX()           bfin_read32(SPORT1_TX)
 201 #define bfin_write_SPORT1_TX(val)       bfin_write32(SPORT1_TX, val)
 202 #define bfin_read_SPORT1_RX()           bfin_read32(SPORT1_RX)
 203 #define bfin_write_SPORT1_RX(val)       bfin_write32(SPORT1_RX, val)
 204 #define bfin_read_SPORT1_RCR1()         bfin_read16(SPORT1_RCR1)
 205 #define bfin_write_SPORT1_RCR1(val)     bfin_write16(SPORT1_RCR1, val)
 206 #define bfin_read_SPORT1_RCR2()         bfin_read16(SPORT1_RCR2)
 207 #define bfin_write_SPORT1_RCR2(val)     bfin_write16(SPORT1_RCR2, val)
 208 #define bfin_read_SPORT1_RCLKDIV()      bfin_read16(SPORT1_RCLKDIV)
 209 #define bfin_write_SPORT1_RCLKDIV(val)  bfin_write16(SPORT1_RCLKDIV, val)
 210 #define bfin_read_SPORT1_RFSDIV()       bfin_read16(SPORT1_RFSDIV)
 211 #define bfin_write_SPORT1_RFSDIV(val)   bfin_write16(SPORT1_RFSDIV, val)
 212 #define bfin_read_SPORT1_STAT()         bfin_read16(SPORT1_STAT)
 213 #define bfin_write_SPORT1_STAT(val)     bfin_write16(SPORT1_STAT, val)
 214 #define bfin_read_SPORT1_CHNL()         bfin_read16(SPORT1_CHNL)
 215 #define bfin_write_SPORT1_CHNL(val)     bfin_write16(SPORT1_CHNL, val)
 216 #define bfin_read_SPORT1_MCMC1()        bfin_read16(SPORT1_MCMC1)
 217 #define bfin_write_SPORT1_MCMC1(val)    bfin_write16(SPORT1_MCMC1, val)
 218 #define bfin_read_SPORT1_MCMC2()        bfin_read16(SPORT1_MCMC2)
 219 #define bfin_write_SPORT1_MCMC2(val)    bfin_write16(SPORT1_MCMC2, val)
 220 #define bfin_read_SPORT1_MTCS0()        bfin_read32(SPORT1_MTCS0)
 221 #define bfin_write_SPORT1_MTCS0(val)    bfin_write32(SPORT1_MTCS0, val)
 222 #define bfin_read_SPORT1_MTCS1()        bfin_read32(SPORT1_MTCS1)
 223 #define bfin_write_SPORT1_MTCS1(val)    bfin_write32(SPORT1_MTCS1, val)
 224 #define bfin_read_SPORT1_MTCS2()        bfin_read32(SPORT1_MTCS2)
 225 #define bfin_write_SPORT1_MTCS2(val)    bfin_write32(SPORT1_MTCS2, val)
 226 #define bfin_read_SPORT1_MTCS3()        bfin_read32(SPORT1_MTCS3)
 227 #define bfin_write_SPORT1_MTCS3(val)    bfin_write32(SPORT1_MTCS3, val)
 228 #define bfin_read_SPORT1_MRCS0()        bfin_read32(SPORT1_MRCS0)
 229 #define bfin_write_SPORT1_MRCS0(val)    bfin_write32(SPORT1_MRCS0, val)
 230 #define bfin_read_SPORT1_MRCS1()        bfin_read32(SPORT1_MRCS1)
 231 #define bfin_write_SPORT1_MRCS1(val)    bfin_write32(SPORT1_MRCS1, val)
 232 #define bfin_read_SPORT1_MRCS2()        bfin_read32(SPORT1_MRCS2)
 233 #define bfin_write_SPORT1_MRCS2(val)    bfin_write32(SPORT1_MRCS2, val)
 234 #define bfin_read_SPORT1_MRCS3()        bfin_read32(SPORT1_MRCS3)
 235 #define bfin_write_SPORT1_MRCS3(val)    bfin_write32(SPORT1_MRCS3, val)
 236
 237 /* Asynchronous Memory Control Registers */
 238
 239 #define bfin_read_EBIU_AMGCTL()         bfin_read16(EBIU_AMGCTL)
 240 #define bfin_write_EBIU_AMGCTL(val)     bfin_write16(EBIU_AMGCTL, val)
 241 #define bfin_read_EBIU_AMBCTL0()        bfin_read32(EBIU_AMBCTL0)
 242 #define bfin_write_EBIU_AMBCTL0(val)    bfin_write32(EBIU_AMBCTL0, val)
 243 #define bfin_read_EBIU_AMBCTL1()        bfin_read32(EBIU_AMBCTL1)
 244 #define bfin_write_EBIU_AMBCTL1(val)    bfin_write32(EBIU_AMBCTL1, val)
 245 #define bfin_read_EBIU_MBSCTL()         bfin_read16(EBIU_MBSCTL)
 246 #define bfin_write_EBIU_MBSCTL(val)     bfin_write16(EBIU_MBSCTL, val)
 247 #define bfin_read_EBIU_ARBSTAT()        bfin_read32(EBIU_ARBSTAT)
 248 #define bfin_write_EBIU_ARBSTAT(val)    bfin_write32(EBIU_ARBSTAT, val)
 249 #define bfin_read_EBIU_MODE()           bfin_read32(EBIU_MODE)
 250 #define bfin_write_EBIU_MODE(val)       bfin_write32(EBIU_MODE, val)
 251 #define bfin_read_EBIU_FCTL()           bfin_read16(EBIU_FCTL)
 252 #define bfin_write_EBIU_FCTL(val)       bfin_write16(EBIU_FCTL, val)
 253
 254 /* DDR Memory Control Registers */
 255
 256 #define bfin_read_EBIU_DDRCTL0()        bfin_read32(EBIU_DDRCTL0)
 257 #define bfin_write_EBIU_DDRCTL0(val)    bfin_write32(EBIU_DDRCTL0, val)
 258 #define bfin_read_EBIU_DDRCTL1()        bfin_read32(EBIU_DDRCTL1)
 259 #define bfin_write_EBIU_DDRCTL1(val)    bfin_write32(EBIU_DDRCTL1, val)
 260 #define bfin_read_EBIU_DDRCTL2()        bfin_read32(EBIU_DDRCTL2)
 261 #define bfin_write_EBIU_DDRCTL2(val)    bfin_write32(EBIU_DDRCTL2, val)
 262 #define bfin_read_EBIU_DDRCTL3()        bfin_read32(EBIU_DDRCTL3)
 263 #define bfin_write_EBIU_DDRCTL3(val)    bfin_write32(EBIU_DDRCTL3, val)
 264 #define bfin_read_EBIU_DDRQUE()         bfin_read32(EBIU_DDRQUE)
 265 #define bfin_write_EBIU_DDRQUE(val)     bfin_write32(EBIU_DDRQUE, val)
 266 #define bfin_read_EBIU_ERRADD()         bfin_read32(EBIU_ERRADD)
 267 #define bfin_write_EBIU_ERRADD(val)     bfin_write32(EBIU_ERRADD, val)
 268 #define bfin_read_EBIU_ERRMST()         bfin_read16(EBIU_ERRMST)
 269 #define bfin_write_EBIU_ERRMST(val)     bfin_write16(EBIU_ERRMST, val)
 270 #define bfin_read_EBIU_RSTCTL()         bfin_read16(EBIU_RSTCTL)
 271 #define bfin_write_EBIU_RSTCTL(val)     bfin_write16(EBIU_RSTCTL, val)
 272
 273 /* DDR BankRead and Write Count Registers */
 274
 275 #define bfin_read_EBIU_DDRBRC0()        bfin_read32(EBIU_DDRBRC0)
 276 #define bfin_write_EBIU_DDRBRC0(val)    bfin_write32(EBIU_DDRBRC0, val)
 277 #define bfin_read_EBIU_DDRBRC1()        bfin_read32(EBIU_DDRBRC1)
 278 #define bfin_write_EBIU_DDRBRC1(val)    bfin_write32(EBIU_DDRBRC1, val)
 279 #define bfin_read_EBIU_DDRBRC2()        bfin_read32(EBIU_DDRBRC2)
 280 #define bfin_write_EBIU_DDRBRC2(val)    bfin_write32(EBIU_DDRBRC2, val)
 281 #define bfin_read_EBIU_DDRBRC3()        bfin_read32(EBIU_DDRBRC3)
 282 #define bfin_write_EBIU_DDRBRC3(val)    bfin_write32(EBIU_DDRBRC3, val)
 283 #define bfin_read_EBIU_DDRBRC4()        bfin_read32(EBIU_DDRBRC4)
 284 #define bfin_write_EBIU_DDRBRC4(val)    bfin_write32(EBIU_DDRBRC4, val)
 285 #define bfin_read_EBIU_DDRBRC5()        bfin_read32(EBIU_DDRBRC5)
 286 #define bfin_write_EBIU_DDRBRC5(val)    bfin_write32(EBIU_DDRBRC5, val)
 287 #define bfin_read_EBIU_DDRBRC6()        bfin_read32(EBIU_DDRBRC6)
 288 #define bfin_write_EBIU_DDRBRC6(val)    bfin_write32(EBIU_DDRBRC6, val)
 289 #define bfin_read_EBIU_DDRBRC7()        bfin_read32(EBIU_DDRBRC7)
 290 #define bfin_write_EBIU_DDRBRC7(val)    bfin_write32(EBIU_DDRBRC7, val)
 291 #define bfin_read_EBIU_DDRBWC0()        bfin_read32(EBIU_DDRBWC0)
 292 #define bfin_write_EBIU_DDRBWC0(val)    bfin_write32(EBIU_DDRBWC0, val)
 293 #define bfin_read_EBIU_DDRBWC1()        bfin_read32(EBIU_DDRBWC1)
 294 #define bfin_write_EBIU_DDRBWC1(val)    bfin_write32(EBIU_DDRBWC1, val)
 295 #define bfin_read_EBIU_DDRBWC2()        bfin_read32(EBIU_DDRBWC2)
 296 #define bfin_write_EBIU_DDRBWC2(val)    bfin_write32(EBIU_DDRBWC2, val)
 297 #define bfin_read_EBIU_DDRBWC3()        bfin_read32(EBIU_DDRBWC3)
 298 #define bfin_write_EBIU_DDRBWC3(val)    bfin_write32(EBIU_DDRBWC3, val)
 299 #define bfin_read_EBIU_DDRBWC4()        bfin_read32(EBIU_DDRBWC4)
 300 #define bfin_write_EBIU_DDRBWC4(val)    bfin_write32(EBIU_DDRBWC4, val)
 301 #define bfin_read_EBIU_DDRBWC5()        bfin_read32(EBIU_DDRBWC5)
 302 #define bfin_write_EBIU_DDRBWC5(val)    bfin_write32(EBIU_DDRBWC5, val)
 303 #define bfin_read_EBIU_DDRBWC6()        bfin_read32(EBIU_DDRBWC6)
 304 #define bfin_write_EBIU_DDRBWC6(val)    bfin_write32(EBIU_DDRBWC6, val)
 305 #define bfin_read_EBIU_DDRBWC7()        bfin_read32(EBIU_DDRBWC7)
 306 #define bfin_write_EBIU_DDRBWC7(val)    bfin_write32(EBIU_DDRBWC7, val)
 307 #define bfin_read_EBIU_DDRACCT()        bfin_read32(EBIU_DDRACCT)
 308 #define bfin_write_EBIU_DDRACCT(val)    bfin_write32(EBIU_DDRACCT, val)
 309 #define bfin_read_EBIU_DDRTACT()        bfin_read32(EBIU_DDRTACT)
 310 #define bfin_write_EBIU_DDRTACT(val)    bfin_write32(EBIU_DDRTACT, val)
 311 #define bfin_read_EBIU_DDRARCT()        bfin_read32(EBIU_DDRARCT)
 312 #define bfin_write_EBIU_DDRARCT(val)    bfin_write32(EBIU_DDRARCT, val)
 313 #define bfin_read_EBIU_DDRGC0()         bfin_read32(EBIU_DDRGC0)
 314 #define bfin_write_EBIU_DDRGC0(val)     bfin_write32(EBIU_DDRGC0, val)
 315 #define bfin_read_EBIU_DDRGC1()         bfin_read32(EBIU_DDRGC1)
 316 #define bfin_write_EBIU_DDRGC1(val)     bfin_write32(EBIU_DDRGC1, val)
 317 #define bfin_read_EBIU_DDRGC2()         bfin_read32(EBIU_DDRGC2)
 318 #define bfin_write_EBIU_DDRGC2(val)     bfin_write32(EBIU_DDRGC2, val)
 319 #define bfin_read_EBIU_DDRGC3()         bfin_read32(EBIU_DDRGC3)
 320 #define bfin_write_EBIU_DDRGC3(val)     bfin_write32(EBIU_DDRGC3, val)
 321 #define bfin_read_EBIU_DDRMCEN()        bfin_read32(EBIU_DDRMCEN)
 322 #define bfin_write_EBIU_DDRMCEN(val)    bfin_write32(EBIU_DDRMCEN, val)
 323 #define bfin_read_EBIU_DDRMCCL()        bfin_read32(EBIU_DDRMCCL)
 324 #define bfin_write_EBIU_DDRMCCL(val)    bfin_write32(EBIU_DDRMCCL, val)
 325
 326 /* DMAC0 Registers */
 327
 328 #define bfin_read_DMAC0_TCPER()         bfin_read16(DMAC0_TCPER)
 329 #define bfin_write_DMAC0_TCPER(val)     bfin_write16(DMAC0_TCPER, val)
 330 #define bfin_read_DMAC0_TCCNT()         bfin_read16(DMAC0_TCCNT)
 331 #define bfin_write_DMAC0_TCCNT(val)     bfin_write16(DMAC0_TCCNT, val)
 332
 333 /* DMA Channel 0 Registers */
 334
 335 #define bfin_read_DMA0_NEXT_DESC_PTR()          bfin_read32(DMA0_NEXT_DESC_PTR)
 336 #define bfin_write_DMA0_NEXT_DESC_PTR(val)      bfin_write32(DMA0_NEXT_DESC_PTR, val)
 337 #define bfin_read_DMA0_START_ADDR()             bfin_read32(DMA0_START_ADDR)
 338 #define bfin_write_DMA0_START_ADDR(val)         bfin_write32(DMA0_START_ADDR, val)
 339 #define bfin_read_DMA0_CONFIG()                 bfin_read16(DMA0_CONFIG)
 340 #define bfin_write_DMA0_CONFIG(val)             bfin_write16(DMA0_CONFIG, val)
 341 #define bfin_read_DMA0_X_COUNT()                bfin_read16(DMA0_X_COUNT)
 342 #define bfin_write_DMA0_X_COUNT(val)            bfin_write16(DMA0_X_COUNT, val)
 343 #define bfin_read_DMA0_X_MODIFY()               bfin_read16(DMA0_X_MODIFY)
 344 #define bfin_write_DMA0_X_MODIFY(val)           bfin_write16(DMA0_X_MODIFY, val)
 345 #define bfin_read_DMA0_Y_COUNT()                bfin_read16(DMA0_Y_COUNT)
 346 #define bfin_write_DMA0_Y_COUNT(val)            bfin_write16(DMA0_Y_COUNT, val)
 347 #define bfin_read_DMA0_Y_MODIFY()               bfin_read16(DMA0_Y_MODIFY)
 348 #define bfin_write_DMA0_Y_MODIFY(val)           bfin_write16(DMA0_Y_MODIFY, val)
 349 #define bfin_read_DMA0_CURR_DESC_PTR()          bfin_read32(DMA0_CURR_DESC_PTR)
 350 #define bfin_write_DMA0_CURR_DESC_PTR(val)      bfin_write32(DMA0_CURR_DESC_PTR, val)
 351 #define bfin_read_DMA0_CURR_ADDR()              bfin_read32(DMA0_CURR_ADDR)
 352 #define bfin_write_DMA0_CURR_ADDR(val)          bfin_write32(DMA0_CURR_ADDR, val)
 353 #define bfin_read_DMA0_IRQ_STATUS()             bfin_read16(DMA0_IRQ_STATUS)
 354 #define bfin_write_DMA0_IRQ_STATUS(val)         bfin_write16(DMA0_IRQ_STATUS, val)
 355 #define bfin_read_DMA0_PERIPHERAL_MAP()         bfin_read16(DMA0_PERIPHERAL_MAP)
 356 #define bfin_write_DMA0_PERIPHERAL_MAP(val)     bfin_write16(DMA0_PERIPHERAL_MAP, val)
 357 #define bfin_read_DMA0_CURR_X_COUNT()           bfin_read16(DMA0_CURR_X_COUNT)
 358 #define bfin_write_DMA0_CURR_X_COUNT(val)       bfin_write16(DMA0_CURR_X_COUNT, val)
 359 #define bfin_read_DMA0_CURR_Y_COUNT()           bfin_read16(DMA0_CURR_Y_COUNT)
 360 #define bfin_write_DMA0_CURR_Y_COUNT(val)       bfin_write16(DMA0_CURR_Y_COUNT, val)
 361
 362 /* DMA Channel 1 Registers */
 363
 364 #define bfin_read_DMA1_NEXT_DESC_PTR()          bfin_read32(DMA1_NEXT_DESC_PTR)
 365 #define bfin_write_DMA1_NEXT_DESC_PTR(val)      bfin_write32(DMA1_NEXT_DESC_PTR, val)
 366 #define bfin_read_DMA1_START_ADDR()             bfin_read32(DMA1_START_ADDR)
 367 #define bfin_write_DMA1_START_ADDR(val)         bfin_write32(DMA1_START_ADDR, val)
 368 #define bfin_read_DMA1_CONFIG()                 bfin_read16(DMA1_CONFIG)
 369 #define bfin_write_DMA1_CONFIG(val)             bfin_write16(DMA1_CONFIG, val)
 370 #define bfin_read_DMA1_X_COUNT()                bfin_read16(DMA1_X_COUNT)
 371 #define bfin_write_DMA1_X_COUNT(val)            bfin_write16(DMA1_X_COUNT, val)
 372 #define bfin_read_DMA1_X_MODIFY()               bfin_read16(DMA1_X_MODIFY)
 373 #define bfin_write_DMA1_X_MODIFY(val)           bfin_write16(DMA1_X_MODIFY, val)
 374 #define bfin_read_DMA1_Y_COUNT()                bfin_read16(DMA1_Y_COUNT)
 375 #define bfin_write_DMA1_Y_COUNT(val)            bfin_write16(DMA1_Y_COUNT, val)
 376 #define bfin_read_DMA1_Y_MODIFY()               bfin_read16(DMA1_Y_MODIFY)
 377 #define bfin_write_DMA1_Y_MODIFY(val)           bfin_write16(DMA1_Y_MODIFY, val)
 378 #define bfin_read_DMA1_CURR_DESC_PTR()          bfin_read32(DMA1_CURR_DESC_PTR)
 379 #define bfin_write_DMA1_CURR_DESC_PTR(val)      bfin_write32(DMA1_CURR_DESC_PTR, val)
 380 #define bfin_read_DMA1_CURR_ADDR()              bfin_read32(DMA1_CURR_ADDR)
 381 #define bfin_write_DMA1_CURR_ADDR(val)          bfin_write32(DMA1_CURR_ADDR, val)
 382 #define bfin_read_DMA1_IRQ_STATUS()             bfin_read16(DMA1_IRQ_STATUS)
 383 #define bfin_write_DMA1_IRQ_STATUS(val)         bfin_write16(DMA1_IRQ_STATUS, val)
 384 #define bfin_read_DMA1_PERIPHERAL_MAP()         bfin_read16(DMA1_PERIPHERAL_MAP)
 385 #define bfin_write_DMA1_PERIPHERAL_MAP(val)     bfin_write16(DMA1_PERIPHERAL_MAP, val)
 386 #define bfin_read_DMA1_CURR_X_COUNT()           bfin_read16(DMA1_CURR_X_COUNT)
 387 #define bfin_write_DMA1_CURR_X_COUNT(val)       bfin_write16(DMA1_CURR_X_COUNT, val)
 388 #define bfin_read_DMA1_CURR_Y_COUNT()           bfin_read16(DMA1_CURR_Y_COUNT)
 389 #define bfin_write_DMA1_CURR_Y_COUNT(val)       bfin_write16(DMA1_CURR_Y_COUNT, val)
 390
 391 /* DMA Channel 2 Registers */
 392
 393 #define bfin_read_DMA2_NEXT_DESC_PTR()          bfin_read32(DMA2_NEXT_DESC_PTR)
 394 #define bfin_write_DMA2_NEXT_DESC_PTR(val)      bfin_write32(DMA2_NEXT_DESC_PTR, val)
 395 #define bfin_read_DMA2_START_ADDR()             bfin_read32(DMA2_START_ADDR)
 396 #define bfin_write_DMA2_START_ADDR(val)         bfin_write32(DMA2_START_ADDR, val)
 397 #define bfin_read_DMA2_CONFIG()                 bfin_read16(DMA2_CONFIG)
 398 #define bfin_write_DMA2_CONFIG(val)             bfin_write16(DMA2_CONFIG, val)
 399 #define bfin_read_DMA2_X_COUNT()                bfin_read16(DMA2_X_COUNT)
 400 #define bfin_write_DMA2_X_COUNT(val)            bfin_write16(DMA2_X_COUNT, val)
 401 #define bfin_read_DMA2_X_MODIFY()               bfin_read16(DMA2_X_MODIFY)
 402 #define bfin_write_DMA2_X_MODIFY(val)           bfin_write16(DMA2_X_MODIFY, val)
 403 #define bfin_read_DMA2_Y_COUNT()                bfin_read16(DMA2_Y_COUNT)
 404 #define bfin_write_DMA2_Y_COUNT(val)            bfin_write16(DMA2_Y_COUNT, val)
 405 #define bfin_read_DMA2_Y_MODIFY()               bfin_read16(DMA2_Y_MODIFY)
 406 #define bfin_write_DMA2_Y_MODIFY(val)           bfin_write16(DMA2_Y_MODIFY, val)
 407 #define bfin_read_DMA2_CURR_DESC_PTR()          bfin_read32(DMA2_CURR_DESC_PTR)
 408 #define bfin_write_DMA2_CURR_DESC_PTR(val)      bfin_write32(DMA2_CURR_DESC_PTR, val)
 409 #define bfin_read_DMA2_CURR_ADDR()              bfin_read32(DMA2_CURR_ADDR)
 410 #define bfin_write_DMA2_CURR_ADDR(val)          bfin_write32(DMA2_CURR_ADDR, val)
 411 #define bfin_read_DMA2_IRQ_STATUS()             bfin_read16(DMA2_IRQ_STATUS)
 412 #define bfin_write_DMA2_IRQ_STATUS(val)         bfin_write16(DMA2_IRQ_STATUS, val)
 413 #define bfin_read_DMA2_PERIPHERAL_MAP()         bfin_read16(DMA2_PERIPHERAL_MAP)
 414 #define bfin_write_DMA2_PERIPHERAL_MAP(val)     bfin_write16(DMA2_PERIPHERAL_MAP, val)
 415 #define bfin_read_DMA2_CURR_X_COUNT()           bfin_read16(DMA2_CURR_X_COUNT)
 416 #define bfin_write_DMA2_CURR_X_COUNT(val)       bfin_write16(DMA2_CURR_X_COUNT, val)
 417 #define bfin_read_DMA2_CURR_Y_COUNT()           bfin_read16(DMA2_CURR_Y_COUNT)
 418 #define bfin_write_DMA2_CURR_Y_COUNT(val)       bfin_write16(DMA2_CURR_Y_COUNT, val)
 419
 420 /* DMA Channel 3 Registers */
 421
 422 #define bfin_read_DMA3_NEXT_DESC_PTR()          bfin_read32(DMA3_NEXT_DESC_PTR)
 423 #define bfin_write_DMA3_NEXT_DESC_PTR(val)      bfin_write32(DMA3_NEXT_DESC_PTR, val)
 424 #define bfin_read_DMA3_START_ADDR()             bfin_read32(DMA3_START_ADDR)
 425 #define bfin_write_DMA3_START_ADDR(val)         bfin_write32(DMA3_START_ADDR, val)
 426 #define bfin_read_DMA3_CONFIG()                 bfin_read16(DMA3_CONFIG)
 427 #define bfin_write_DMA3_CONFIG(val)             bfin_write16(DMA3_CONFIG, val)
 428 #define bfin_read_DMA3_X_COUNT()                bfin_read16(DMA3_X_COUNT)
 429 #define bfin_write_DMA3_X_COUNT(val)            bfin_write16(DMA3_X_COUNT, val)
 430 #define bfin_read_DMA3_X_MODIFY()               bfin_read16(DMA3_X_MODIFY)
 431 #define bfin_write_DMA3_X_MODIFY(val)           bfin_write16(DMA3_X_MODIFY, val)
 432 #define bfin_read_DMA3_Y_COUNT()                bfin_read16(DMA3_Y_COUNT)
 433 #define bfin_write_DMA3_Y_COUNT(val)            bfin_write16(DMA3_Y_COUNT, val)
 434 #define bfin_read_DMA3_Y_MODIFY()               bfin_read16(DMA3_Y_MODIFY)
 435 #define bfin_write_DMA3_Y_MODIFY(val)           bfin_write16(DMA3_Y_MODIFY, val)
 436 #define bfin_read_DMA3_CURR_DESC_PTR()          bfin_read32(DMA3_CURR_DESC_PTR)
 437 #define bfin_write_DMA3_CURR_DESC_PTR(val)      bfin_write32(DMA3_CURR_DESC_PTR, val)
 438 #define bfin_read_DMA3_CURR_ADDR()              bfin_read32(DMA3_CURR_ADDR)
 439 #define bfin_write_DMA3_CURR_ADDR(val)          bfin_write32(DMA3_CURR_ADDR, val)
 440 #define bfin_read_DMA3_IRQ_STATUS()             bfin_read16(DMA3_IRQ_STATUS)
 441 #define bfin_write_DMA3_IRQ_STATUS(val)         bfin_write16(DMA3_IRQ_STATUS, val)
 442 #define bfin_read_DMA3_PERIPHERAL_MAP()         bfin_read16(DMA3_PERIPHERAL_MAP)
 443 #define bfin_write_DMA3_PERIPHERAL_MAP(val)     bfin_write16(DMA3_PERIPHERAL_MAP, val)
 444 #define bfin_read_DMA3_CURR_X_COUNT()           bfin_read16(DMA3_CURR_X_COUNT)
 445 #define bfin_write_DMA3_CURR_X_COUNT(val)       bfin_write16(DMA3_CURR_X_COUNT, val)
 446 #define bfin_read_DMA3_CURR_Y_COUNT()           bfin_read16(DMA3_CURR_Y_COUNT)
 447 #define bfin_write_DMA3_CURR_Y_COUNT(val)       bfin_write16(DMA3_CURR_Y_COUNT, val)
 448
 449 /* DMA Channel 4 Registers */
 450
 451 #define bfin_read_DMA4_NEXT_DESC_PTR()          bfin_read32(DMA4_NEXT_DESC_PTR)
 452 #define bfin_write_DMA4_NEXT_DESC_PTR(val)      bfin_write32(DMA4_NEXT_DESC_PTR, val)
 453 #define bfin_read_DMA4_START_ADDR()             bfin_read32(DMA4_START_ADDR)
 454 #define bfin_write_DMA4_START_ADDR(val)         bfin_write32(DMA4_START_ADDR, val)
 455 #define bfin_read_DMA4_CONFIG()                 bfin_read16(DMA4_CONFIG)
 456 #define bfin_write_DMA4_CONFIG(val)             bfin_write16(DMA4_CONFIG, val)
 457 #define bfin_read_DMA4_X_COUNT()                bfin_read16(DMA4_X_COUNT)
 458 #define bfin_write_DMA4_X_COUNT(val)            bfin_write16(DMA4_X_COUNT, val)
 459 #define bfin_read_DMA4_X_MODIFY()               bfin_read16(DMA4_X_MODIFY)
 460 #define bfin_write_DMA4_X_MODIFY(val)           bfin_write16(DMA4_X_MODIFY, val)
 461 #define bfin_read_DMA4_Y_COUNT()                bfin_read16(DMA4_Y_COUNT)
 462 #define bfin_write_DMA4_Y_COUNT(val)            bfin_write16(DMA4_Y_COUNT, val)
 463 #define bfin_read_DMA4_Y_MODIFY()               bfin_read16(DMA4_Y_MODIFY)
 464 #define bfin_write_DMA4_Y_MODIFY(val)           bfin_write16(DMA4_Y_MODIFY, val)
 465 #define bfin_read_DMA4_CURR_DESC_PTR()          bfin_read32(DMA4_CURR_DESC_PTR)
 466 #define bfin_write_DMA4_CURR_DESC_PTR(val)      bfin_write32(DMA4_CURR_DESC_PTR, val)
 467 #define bfin_read_DMA4_CURR_ADDR()              bfin_read32(DMA4_CURR_ADDR)
 468 #define bfin_write_DMA4_CURR_ADDR(val)          bfin_write32(DMA4_CURR_ADDR, val)
 469 #define bfin_read_DMA4_IRQ_STATUS()             bfin_read16(DMA4_IRQ_STATUS)
 470 #define bfin_write_DMA4_IRQ_STATUS(val)         bfin_write16(DMA4_IRQ_STATUS, val)
 471 #define bfin_read_DMA4_PERIPHERAL_MAP()         bfin_read16(DMA4_PERIPHERAL_MAP)
 472 #define bfin_write_DMA4_PERIPHERAL_MAP(val)     bfin_write16(DMA4_PERIPHERAL_MAP, val)
 473 #define bfin_read_DMA4_CURR_X_COUNT()           bfin_read16(DMA4_CURR_X_COUNT)
 474 #define bfin_write_DMA4_CURR_X_COUNT(val)       bfin_write16(DMA4_CURR_X_COUNT, val)
 475 #define bfin_read_DMA4_CURR_Y_COUNT()           bfin_read16(DMA4_CURR_Y_COUNT)
 476 #define bfin_write_DMA4_CURR_Y_COUNT(val)       bfin_write16(DMA4_CURR_Y_COUNT, val)
 477
 478 /* DMA Channel 5 Registers */
 479
 480 #define bfin_read_DMA5_NEXT_DESC_PTR()          bfin_read32(DMA5_NEXT_DESC_PTR)
 481 #define bfin_write_DMA5_NEXT_DESC_PTR(val)      bfin_write32(DMA5_NEXT_DESC_PTR, val)
 482 #define bfin_read_DMA5_START_ADDR()             bfin_read32(DMA5_START_ADDR)
 483 #define bfin_write_DMA5_START_ADDR(val)         bfin_write32(DMA5_START_ADDR, val)
 484 #define bfin_read_DMA5_CONFIG()                 bfin_read16(DMA5_CONFIG)
 485 #define bfin_write_DMA5_CONFIG(val)             bfin_write16(DMA5_CONFIG, val)
 486 #define bfin_read_DMA5_X_COUNT()                bfin_read16(DMA5_X_COUNT)
 487 #define bfin_write_DMA5_X_COUNT(val)            bfin_write16(DMA5_X_COUNT, val)
 488 #define bfin_read_DMA5_X_MODIFY()               bfin_read16(DMA5_X_MODIFY)
 489 #define bfin_write_DMA5_X_MODIFY(val)           bfin_write16(DMA5_X_MODIFY, val)
 490 #define bfin_read_DMA5_Y_COUNT()                bfin_read16(DMA5_Y_COUNT)
 491 #define bfin_write_DMA5_Y_COUNT(val)            bfin_write16(DMA5_Y_COUNT, val)
 492 #define bfin_read_DMA5_Y_MODIFY()               bfin_read16(DMA5_Y_MODIFY)
 493 #define bfin_write_DMA5_Y_MODIFY(val)           bfin_write16(DMA5_Y_MODIFY, val)
 494 #define bfin_read_DMA5_CURR_DESC_PTR()          bfin_read32(DMA5_CURR_DESC_PTR)
 495 #define bfin_write_DMA5_CURR_DESC_PTR(val)      bfin_write32(DMA5_CURR_DESC_PTR, val)
 496 #define bfin_read_DMA5_CURR_ADDR()              bfin_read32(DMA5_CURR_ADDR)
 497 #define bfin_write_DMA5_CURR_ADDR(val)          bfin_write32(DMA5_CURR_ADDR, val)
 498 #define bfin_read_DMA5_IRQ_STATUS()             bfin_read16(DMA5_IRQ_STATUS)
 499 #define bfin_write_DMA5_IRQ_STATUS(val)         bfin_write16(DMA5_IRQ_STATUS, val)
 500 #define bfin_read_DMA5_PERIPHERAL_MAP()         bfin_read16(DMA5_PERIPHERAL_MAP)
 501 #define bfin_write_DMA5_PERIPHERAL_MAP(val)     bfin_write16(DMA5_PERIPHERAL_MAP, val)
 502 #define bfin_read_DMA5_CURR_X_COUNT()           bfin_read16(DMA5_CURR_X_COUNT)
 503 #define bfin_write_DMA5_CURR_X_COUNT(val)       bfin_write16(DMA5_CURR_X_COUNT, val)
 504 #define bfin_read_DMA5_CURR_Y_COUNT()           bfin_read16(DMA5_CURR_Y_COUNT)
 505 #define bfin_write_DMA5_CURR_Y_COUNT(val)       bfin_write16(DMA5_CURR_Y_COUNT, val)
 506
 507 /* DMA Channel 6 Registers */
 508
 509 #define bfin_read_DMA6_NEXT_DESC_PTR()          bfin_read32(DMA6_NEXT_DESC_PTR)
 510 #define bfin_write_DMA6_NEXT_DESC_PTR(val)      bfin_write32(DMA6_NEXT_DESC_PTR, val)
 511 #define bfin_read_DMA6_START_ADDR()             bfin_read32(DMA6_START_ADDR)
 512 #define bfin_write_DMA6_START_ADDR(val)         bfin_write32(DMA6_START_ADDR, val)
 513 #define bfin_read_DMA6_CONFIG()                 bfin_read16(DMA6_CONFIG)
 514 #define bfin_write_DMA6_CONFIG(val)             bfin_write16(DMA6_CONFIG, val)
 515 #define bfin_read_DMA6_X_COUNT()                bfin_read16(DMA6_X_COUNT)
 516 #define bfin_write_DMA6_X_COUNT(val)            bfin_write16(DMA6_X_COUNT, val)
 517 #define bfin_read_DMA6_X_MODIFY()               bfin_read16(DMA6_X_MODIFY)
 518 #define bfin_write_DMA6_X_MODIFY(val)           bfin_write16(DMA6_X_MODIFY, val)
 519 #define bfin_read_DMA6_Y_COUNT()                bfin_read16(DMA6_Y_COUNT)
 520 #define bfin_write_DMA6_Y_COUNT(val)            bfin_write16(DMA6_Y_COUNT, val)
 521 #define bfin_read_DMA6_Y_MODIFY()               bfin_read16(DMA6_Y_MODIFY)
 522 #define bfin_write_DMA6_Y_MODIFY(val)           bfin_write16(DMA6_Y_MODIFY, val)
 523 #define bfin_read_DMA6_CURR_DESC_PTR()          bfin_read32(DMA6_CURR_DESC_PTR)
 524 #define bfin_write_DMA6_CURR_DESC_PTR(val)      bfin_write32(DMA6_CURR_DESC_PTR, val)
 525 #define bfin_read_DMA6_CURR_ADDR()              bfin_read32(DMA6_CURR_ADDR)
 526 #define bfin_write_DMA6_CURR_ADDR(val)          bfin_write32(DMA6_CURR_ADDR, val)
 527 #define bfin_read_DMA6_IRQ_STATUS()             bfin_read16(DMA6_IRQ_STATUS)
 528 #define bfin_write_DMA6_IRQ_STATUS(val)         bfin_write16(DMA6_IRQ_STATUS, val)
 529 #define bfin_read_DMA6_PERIPHERAL_MAP()         bfin_read16(DMA6_PERIPHERAL_MAP)
 530 #define bfin_write_DMA6_PERIPHERAL_MAP(val)     bfin_write16(DMA6_PERIPHERAL_MAP, val)
 531 #define bfin_read_DMA6_CURR_X_COUNT()           bfin_read16(DMA6_CURR_X_COUNT)
 532 #define bfin_write_DMA6_CURR_X_COUNT(val)       bfin_write16(DMA6_CURR_X_COUNT, val)
 533 #define bfin_read_DMA6_CURR_Y_COUNT()           bfin_read16(DMA6_CURR_Y_COUNT)
 534 #define bfin_write_DMA6_CURR_Y_COUNT(val)       bfin_write16(DMA6_CURR_Y_COUNT, val)
 535
 536 /* DMA Channel 7 Registers */
 537
 538 #define bfin_read_DMA7_NEXT_DESC_PTR()          bfin_read32(DMA7_NEXT_DESC_PTR)
 539 #define bfin_write_DMA7_NEXT_DESC_PTR(val)      bfin_write32(DMA7_NEXT_DESC_PTR, val)
 540 #define bfin_read_DMA7_START_ADDR()             bfin_read32(DMA7_START_ADDR)
 541 #define bfin_write_DMA7_START_ADDR(val)         bfin_write32(DMA7_START_ADDR, val)
 542 #define bfin_read_DMA7_CONFIG()                 bfin_read16(DMA7_CONFIG)
 543 #define bfin_write_DMA7_CONFIG(val)             bfin_write16(DMA7_CONFIG, val)
 544 #define bfin_read_DMA7_X_COUNT()                bfin_read16(DMA7_X_COUNT)
 545 #define bfin_write_DMA7_X_COUNT(val)            bfin_write16(DMA7_X_COUNT, val)
 546 #define bfin_read_DMA7_X_MODIFY()               bfin_read16(DMA7_X_MODIFY)
 547 #define bfin_write_DMA7_X_MODIFY(val)           bfin_write16(DMA7_X_MODIFY, val)
 548 #define bfin_read_DMA7_Y_COUNT()                bfin_read16(DMA7_Y_COUNT)
 549 #define bfin_write_DMA7_Y_COUNT(val)            bfin_write16(DMA7_Y_COUNT, val)
 550 #define bfin_read_DMA7_Y_MODIFY()               bfin_read16(DMA7_Y_MODIFY)
 551 #define bfin_write_DMA7_Y_MODIFY(val)           bfin_write16(DMA7_Y_MODIFY, val)
 552 #define bfin_read_DMA7_CURR_DESC_PTR()          bfin_read32(DMA7_CURR_DESC_PTR)
 553 #define bfin_write_DMA7_CURR_DESC_PTR(val)      bfin_write32(DMA7_CURR_DESC_PTR, val)
 554 #define bfin_read_DMA7_CURR_ADDR()              bfin_read32(DMA7_CURR_ADDR)
 555 #define bfin_write_DMA7_CURR_ADDR(val)          bfin_write32(DMA7_CURR_ADDR, val)
 556 #define bfin_read_DMA7_IRQ_STATUS()             bfin_read16(DMA7_IRQ_STATUS)
 557 #define bfin_write_DMA7_IRQ_STATUS(val)         bfin_write16(DMA7_IRQ_STATUS, val)
 558 #define bfin_read_DMA7_PERIPHERAL_MAP()         bfin_read16(DMA7_PERIPHERAL_MAP)
 559 #define bfin_write_DMA7_PERIPHERAL_MAP(val)     bfin_write16(DMA7_PERIPHERAL_MAP, val)
 560 #define bfin_read_DMA7_CURR_X_COUNT()           bfin_read16(DMA7_CURR_X_COUNT)
 561 #define bfin_write_DMA7_CURR_X_COUNT(val)       bfin_write16(DMA7_CURR_X_COUNT, val)
 562 #define bfin_read_DMA7_CURR_Y_COUNT()           bfin_read16(DMA7_CURR_Y_COUNT)
 563 #define bfin_write_DMA7_CURR_Y_COUNT(val)       bfin_write16(DMA7_CURR_Y_COUNT, val)
 564
 565 /* DMA Channel 8 Registers */
 566
 567 #define bfin_read_DMA8_NEXT_DESC_PTR()          bfin_read32(DMA8_NEXT_DESC_PTR)
 568 #define bfin_write_DMA8_NEXT_DESC_PTR(val)      bfin_write32(DMA8_NEXT_DESC_PTR, val)
 569 #define bfin_read_DMA8_START_ADDR()             bfin_read32(DMA8_START_ADDR)
 570 #define bfin_write_DMA8_START_ADDR(val)         bfin_write32(DMA8_START_ADDR, val)
 571 #define bfin_read_DMA8_CONFIG()                 bfin_read16(DMA8_CONFIG)
 572 #define bfin_write_DMA8_CONFIG(val)             bfin_write16(DMA8_CONFIG, val)
 573 #define bfin_read_DMA8_X_COUNT()                bfin_read16(DMA8_X_COUNT)
 574 #define bfin_write_DMA8_X_COUNT(val)            bfin_write16(DMA8_X_COUNT, val)
 575 #define bfin_read_DMA8_X_MODIFY()               bfin_read16(DMA8_X_MODIFY)
 576 #define bfin_write_DMA8_X_MODIFY(val)           bfin_write16(DMA8_X_MODIFY, val)
 577 #define bfin_read_DMA8_Y_COUNT()                bfin_read16(DMA8_Y_COUNT)
 578 #define bfin_write_DMA8_Y_COUNT(val)            bfin_write16(DMA8_Y_COUNT, val)
 579 #define bfin_read_DMA8_Y_MODIFY()               bfin_read16(DMA8_Y_MODIFY)
 580 #define bfin_write_DMA8_Y_MODIFY(val)           bfin_write16(DMA8_Y_MODIFY, val)
 581 #define bfin_read_DMA8_CURR_DESC_PTR()          bfin_read32(DMA8_CURR_DESC_PTR)
 582 #define bfin_write_DMA8_CURR_DESC_PTR(val)      bfin_write32(DMA8_CURR_DESC_PTR, val)
 583 #define bfin_read_DMA8_CURR_ADDR()              bfin_read32(DMA8_CURR_ADDR)
 584 #define bfin_write_DMA8_CURR_ADDR(val)          bfin_write32(DMA8_CURR_ADDR, val)
 585 #define bfin_read_DMA8_IRQ_STATUS()             bfin_read16(DMA8_IRQ_STATUS)
 586 #define bfin_write_DMA8_IRQ_STATUS(val)         bfin_write16(DMA8_IRQ_STATUS, val)
 587 #define bfin_read_DMA8_PERIPHERAL_MAP()         bfin_read16(DMA8_PERIPHERAL_MAP)
 588 #define bfin_write_DMA8_PERIPHERAL_MAP(val)     bfin_write16(DMA8_PERIPHERAL_MAP, val)
 589 #define bfin_read_DMA8_CURR_X_COUNT()           bfin_read16(DMA8_CURR_X_COUNT)
 590 #define bfin_write_DMA8_CURR_X_COUNT(val)       bfin_write16(DMA8_CURR_X_COUNT, val)
 591 #define bfin_read_DMA8_CURR_Y_COUNT()           bfin_read16(DMA8_CURR_Y_COUNT)
 592 #define bfin_write_DMA8_CURR_Y_COUNT(val)       bfin_write16(DMA8_CURR_Y_COUNT, val)
 593
 594 /* DMA Channel 9 Registers */
 595
 596 #define bfin_read_DMA9_NEXT_DESC_PTR()          bfin_read32(DMA9_NEXT_DESC_PTR)
 597 #define bfin_write_DMA9_NEXT_DESC_PTR(val)      bfin_write32(DMA9_NEXT_DESC_PTR, val)
 598 #define bfin_read_DMA9_START_ADDR()             bfin_read32(DMA9_START_ADDR)
 599 #define bfin_write_DMA9_START_ADDR(val)         bfin_write32(DMA9_START_ADDR, val)
 600 #define bfin_read_DMA9_CONFIG()                 bfin_read16(DMA9_CONFIG)
 601 #define bfin_write_DMA9_CONFIG(val)             bfin_write16(DMA9_CONFIG, val)
 602 #define bfin_read_DMA9_X_COUNT()                bfin_read16(DMA9_X_COUNT)
 603 #define bfin_write_DMA9_X_COUNT(val)            bfin_write16(DMA9_X_COUNT, val)
 604 #define bfin_read_DMA9_X_MODIFY()               bfin_read16(DMA9_X_MODIFY)
 605 #define bfin_write_DMA9_X_MODIFY(val)           bfin_write16(DMA9_X_MODIFY, val)
 606 #define bfin_read_DMA9_Y_COUNT()                bfin_read16(DMA9_Y_COUNT)
 607 #define bfin_write_DMA9_Y_COUNT(val)            bfin_write16(DMA9_Y_COUNT, val)
 608 #define bfin_read_DMA9_Y_MODIFY()               bfin_read16(DMA9_Y_MODIFY)
 609 #define bfin_write_DMA9_Y_MODIFY(val)           bfin_write16(DMA9_Y_MODIFY, val)
 610 #define bfin_read_DMA9_CURR_DESC_PTR()          bfin_read32(DMA9_CURR_DESC_PTR)
 611 #define bfin_write_DMA9_CURR_DESC_PTR(val)      bfin_write32(DMA9_CURR_DESC_PTR, val)
 612 #define bfin_read_DMA9_CURR_ADDR()              bfin_read32(DMA9_CURR_ADDR)
 613 #define bfin_write_DMA9_CURR_ADDR(val)          bfin_write32(DMA9_CURR_ADDR, val)
 614 #define bfin_read_DMA9_IRQ_STATUS()             bfin_read16(DMA9_IRQ_STATUS)
 615 #define bfin_write_DMA9_IRQ_STATUS(val)         bfin_write16(DMA9_IRQ_STATUS, val)
 616 #define bfin_read_DMA9_PERIPHERAL_MAP()         bfin_read16(DMA9_PERIPHERAL_MAP)
 617 #define bfin_write_DMA9_PERIPHERAL_MAP(val)     bfin_write16(DMA9_PERIPHERAL_MAP, val)
 618 #define bfin_read_DMA9_CURR_X_COUNT()           bfin_read16(DMA9_CURR_X_COUNT)
 619 #define bfin_write_DMA9_CURR_X_COUNT(val)       bfin_write16(DMA9_CURR_X_COUNT, val)
 620 #define bfin_read_DMA9_CURR_Y_COUNT()           bfin_read16(DMA9_CURR_Y_COUNT)
 621 #define bfin_write_DMA9_CURR_Y_COUNT(val)       bfin_write16(DMA9_CURR_Y_COUNT, val)
 622
 623 /* DMA Channel 10 Registers */
 624
 625 #define bfin_read_DMA10_NEXT_DESC_PTR()         bfin_read32(DMA10_NEXT_DESC_PTR)
 626 #define bfin_write_DMA10_NEXT_DESC_PTR(val)     bfin_write32(DMA10_NEXT_DESC_PTR, val)
 627 #define bfin_read_DMA10_START_ADDR()            bfin_read32(DMA10_START_ADDR)
 628 #define bfin_write_DMA10_START_ADDR(val)        bfin_write32(DMA10_START_ADDR, val)
 629 #define bfin_read_DMA10_CONFIG()                bfin_read16(DMA10_CONFIG)
 630 #define bfin_write_DMA10_CONFIG(val)            bfin_write16(DMA10_CONFIG, val)
 631 #define bfin_read_DMA10_X_COUNT()               bfin_read16(DMA10_X_COUNT)
 632 #define bfin_write_DMA10_X_COUNT(val)           bfin_write16(DMA10_X_COUNT, val)
 633 #define bfin_read_DMA10_X_MODIFY()              bfin_read16(DMA10_X_MODIFY)
 634 #define bfin_write_DMA10_X_MODIFY(val)          bfin_write16(DMA10_X_MODIFY, val)
 635 #define bfin_read_DMA10_Y_COUNT()               bfin_read16(DMA10_Y_COUNT)
 636 #define bfin_write_DMA10_Y_COUNT(val)           bfin_write16(DMA10_Y_COUNT, val)
 637 #define bfin_read_DMA10_Y_MODIFY()              bfin_read16(DMA10_Y_MODIFY)
 638 #define bfin_write_DMA10_Y_MODIFY(val)          bfin_write16(DMA10_Y_MODIFY, val)
 639 #define bfin_read_DMA10_CURR_DESC_PTR()         bfin_read32(DMA10_CURR_DESC_PTR)
 640 #define bfin_write_DMA10_CURR_DESC_PTR(val)     bfin_write32(DMA10_CURR_DESC_PTR, val)
 641 #define bfin_read_DMA10_CURR_ADDR()             bfin_read32(DMA10_CURR_ADDR)
 642 #define bfin_write_DMA10_CURR_ADDR(val)         bfin_write32(DMA10_CURR_ADDR, val)
 643 #define bfin_read_DMA10_IRQ_STATUS()            bfin_read16(DMA10_IRQ_STATUS)
 644 #define bfin_write_DMA10_IRQ_STATUS(val)        bfin_write16(DMA10_IRQ_STATUS, val)
 645 #define bfin_read_DMA10_PERIPHERAL_MAP()        bfin_read16(DMA10_PERIPHERAL_MAP)
 646 #define bfin_write_DMA10_PERIPHERAL_MAP(val)    bfin_write16(DMA10_PERIPHERAL_MAP, val)
 647 #define bfin_read_DMA10_CURR_X_COUNT()          bfin_read16(DMA10_CURR_X_COUNT)
 648 #define bfin_write_DMA10_CURR_X_COUNT(val)      bfin_write16(DMA10_CURR_X_COUNT, val)
 649 #define bfin_read_DMA10_CURR_Y_COUNT()          bfin_read16(DMA10_CURR_Y_COUNT)
 650 #define bfin_write_DMA10_CURR_Y_COUNT(val)      bfin_write16(DMA10_CURR_Y_COUNT, val)
 651
 652 /* DMA Channel 11 Registers */
 653
 654 #define bfin_read_DMA11_NEXT_DESC_PTR()         bfin_read32(DMA11_NEXT_DESC_PTR)
 655 #define bfin_write_DMA11_NEXT_DESC_PTR(val)     bfin_write32(DMA11_NEXT_DESC_PTR, val)
 656 #define bfin_read_DMA11_START_ADDR()            bfin_read32(DMA11_START_ADDR)
 657 #define bfin_write_DMA11_START_ADDR(val)        bfin_write32(DMA11_START_ADDR, val)
 658 #define bfin_read_DMA11_CONFIG()                bfin_read16(DMA11_CONFIG)
 659 #define bfin_write_DMA11_CONFIG(val)            bfin_write16(DMA11_CONFIG, val)
 660 #define bfin_read_DMA11_X_COUNT()               bfin_read16(DMA11_X_COUNT)
 661 #define bfin_write_DMA11_X_COUNT(val)           bfin_write16(DMA11_X_COUNT, val)
 662 #define bfin_read_DMA11_X_MODIFY()              bfin_read16(DMA11_X_MODIFY)
 663 #define bfin_write_DMA11_X_MODIFY(val)          bfin_write16(DMA11_X_MODIFY, val)
 664 #define bfin_read_DMA11_Y_COUNT()               bfin_read16(DMA11_Y_COUNT)
 665 #define bfin_write_DMA11_Y_COUNT(val)           bfin_write16(DMA11_Y_COUNT, val)
 666 #define bfin_read_DMA11_Y_MODIFY()              bfin_read16(DMA11_Y_MODIFY)
 667 #define bfin_write_DMA11_Y_MODIFY(val)          bfin_write16(DMA11_Y_MODIFY, val)
 668 #define bfin_read_DMA11_CURR_DESC_PTR()         bfin_read32(DMA11_CURR_DESC_PTR)
 669 #define bfin_write_DMA11_CURR_DESC_PTR(val)     bfin_write32(DMA11_CURR_DESC_PTR, val)
 670 #define bfin_read_DMA11_CURR_ADDR()             bfin_read32(DMA11_CURR_ADDR)
 671 #define bfin_write_DMA11_CURR_ADDR(val)         bfin_write32(DMA11_CURR_ADDR, val)
 672 #define bfin_read_DMA11_IRQ_STATUS()            bfin_read16(DMA11_IRQ_STATUS)
 673 #define bfin_write_DMA11_IRQ_STATUS(val)        bfin_write16(DMA11_IRQ_STATUS, val)
 674 #define bfin_read_DMA11_PERIPHERAL_MAP()        bfin_read16(DMA11_PERIPHERAL_MAP)
 675 #define bfin_write_DMA11_PERIPHERAL_MAP(val)    bfin_write16(DMA11_PERIPHERAL_MAP, val)
 676 #define bfin_read_DMA11_CURR_X_COUNT()          bfin_read16(DMA11_CURR_X_COUNT)
 677 #define bfin_write_DMA11_CURR_X_COUNT(val)      bfin_write16(DMA11_CURR_X_COUNT, val)
 678 #define bfin_read_DMA11_CURR_Y_COUNT()          bfin_read16(DMA11_CURR_Y_COUNT)
 679 #define bfin_write_DMA11_CURR_Y_COUNT(val)      bfin_write16(DMA11_CURR_Y_COUNT, val)
 680
 681 /* MDMA Stream 0 Registers */
 682
 683 #define bfin_read_MDMA_D0_NEXT_DESC_PTR()       bfin_read32(MDMA_D0_NEXT_DESC_PTR)
 684 #define bfin_write_MDMA_D0_NEXT_DESC_PTR(val)   bfin_write32(MDMA_D0_NEXT_DESC_PTR, val)
 685 #define bfin_read_MDMA_D0_START_ADDR()          bfin_read32(MDMA_D0_START_ADDR)
 686 #define bfin_write_MDMA_D0_START_ADDR(val)      bfin_write32(MDMA_D0_START_ADDR, val)
 687 #define bfin_read_MDMA_D0_CONFIG()              bfin_read16(MDMA_D0_CONFIG)
 688 #define bfin_write_MDMA_D0_CONFIG(val)          bfin_write16(MDMA_D0_CONFIG, val)
 689 #define bfin_read_MDMA_D0_X_COUNT()             bfin_read16(MDMA_D0_X_COUNT)
 690 #define bfin_write_MDMA_D0_X_COUNT(val)         bfin_write16(MDMA_D0_X_COUNT, val)
 691 #define bfin_read_MDMA_D0_X_MODIFY()            bfin_read16(MDMA_D0_X_MODIFY)
 692 #define bfin_write_MDMA_D0_X_MODIFY(val)        bfin_write16(MDMA_D0_X_MODIFY, val)
 693 #define bfin_read_MDMA_D0_Y_COUNT()             bfin_read16(MDMA_D0_Y_COUNT)
 694 #define bfin_write_MDMA_D0_Y_COUNT(val)         bfin_write16(MDMA_D0_Y_COUNT, val)
 695 #define bfin_read_MDMA_D0_Y_MODIFY()            bfin_read16(MDMA_D0_Y_MODIFY)
 696 #define bfin_write_MDMA_D0_Y_MODIFY(val)        bfin_write16(MDMA_D0_Y_MODIFY, val)
 697 #define bfin_read_MDMA_D0_CURR_DESC_PTR()       bfin_read32(MDMA_D0_CURR_DESC_PTR)
 698 #define bfin_write_MDMA_D0_CURR_DESC_PTR(val)   bfin_write32(MDMA_D0_CURR_DESC_PTR, val)
 699 #define bfin_read_MDMA_D0_CURR_ADDR()           bfin_read32(MDMA_D0_CURR_ADDR)
 700 #define bfin_write_MDMA_D0_CURR_ADDR(val)       bfin_write32(MDMA_D0_CURR_ADDR, val)
 701 #define bfin_read_MDMA_D0_IRQ_STATUS()          bfin_read16(MDMA_D0_IRQ_STATUS)
 702 #define bfin_write_MDMA_D0_IRQ_STATUS(val)      bfin_write16(MDMA_D0_IRQ_STATUS, val)
 703 #define bfin_read_MDMA_D0_PERIPHERAL_MAP()      bfin_read16(MDMA_D0_PERIPHERAL_MAP)
 704 #define bfin_write_MDMA_D0_PERIPHERAL_MAP(val)  bfin_write16(MDMA_D0_PERIPHERAL_MAP, val)
 705 #define bfin_read_MDMA_D0_CURR_X_COUNT()        bfin_read16(MDMA_D0_CURR_X_COUNT)
 706 #define bfin_write_MDMA_D0_CURR_X_COUNT(val)    bfin_write16(MDMA_D0_CURR_X_COUNT, val)
 707 #define bfin_read_MDMA_D0_CURR_Y_COUNT()        bfin_read16(MDMA_D0_CURR_Y_COUNT)
 708 #define bfin_write_MDMA_D0_CURR_Y_COUNT(val)    bfin_write16(MDMA_D0_CURR_Y_COUNT, val)
 709 #define bfin_read_MDMA_S0_NEXT_DESC_PTR()       bfin_read32(MDMA_S0_NEXT_DESC_PTR)
 710 #define bfin_write_MDMA_S0_NEXT_DESC_PTR(val)   bfin_write32(MDMA_S0_NEXT_DESC_PTR, val)
 711 #define bfin_read_MDMA_S0_START_ADDR()          bfin_read32(MDMA_S0_START_ADDR)
 712 #define bfin_write_MDMA_S0_START_ADDR(val)      bfin_write32(MDMA_S0_START_ADDR, val)
 713 #define bfin_read_MDMA_S0_CONFIG()              bfin_read16(MDMA_S0_CONFIG)
 714 #define bfin_write_MDMA_S0_CONFIG(val)          bfin_write16(MDMA_S0_CONFIG, val)
 715 #define bfin_read_MDMA_S0_X_COUNT()             bfin_read16(MDMA_S0_X_COUNT)
 716 #define bfin_write_MDMA_S0_X_COUNT(val)         bfin_write16(MDMA_S0_X_COUNT, val)
 717 #define bfin_read_MDMA_S0_X_MODIFY()            bfin_read16(MDMA_S0_X_MODIFY)
 718 #define bfin_write_MDMA_S0_X_MODIFY(val)        bfin_write16(MDMA_S0_X_MODIFY, val)
 719 #define bfin_read_MDMA_S0_Y_COUNT()             bfin_read16(MDMA_S0_Y_COUNT)
 720 #define bfin_write_MDMA_S0_Y_COUNT(val)         bfin_write16(MDMA_S0_Y_COUNT, val)
 721 #define bfin_read_MDMA_S0_Y_MODIFY()            bfin_read16(MDMA_S0_Y_MODIFY)
 722 #define bfin_write_MDMA_S0_Y_MODIFY(val)        bfin_write16(MDMA_S0_Y_MODIFY, val)
 723 #define bfin_read_MDMA_S0_CURR_DESC_PTR()       bfin_read32(MDMA_S0_CURR_DESC_PTR)
 724 #define bfin_write_MDMA_S0_CURR_DESC_PTR(val)   bfin_write32(MDMA_S0_CURR_DESC_PTR, val)
 725 #define bfin_read_MDMA_S0_CURR_ADDR()           bfin_read32(MDMA_S0_CURR_ADDR)
 726 #define bfin_write_MDMA_S0_CURR_ADDR(val)       bfin_write32(MDMA_S0_CURR_ADDR, val)
 727 #define bfin_read_MDMA_S0_IRQ_STATUS()          bfin_read16(MDMA_S0_IRQ_STATUS)
 728 #define bfin_write_MDMA_S0_IRQ_STATUS(val)      bfin_write16(MDMA_S0_IRQ_STATUS, val)
 729 #define bfin_read_MDMA_S0_PERIPHERAL_MAP()      bfin_read16(MDMA_S0_PERIPHERAL_MAP)
 730 #define bfin_write_MDMA_S0_PERIPHERAL_MAP(val)  bfin_write16(MDMA_S0_PERIPHERAL_MAP, val)
 731 #define bfin_read_MDMA_S0_CURR_X_COUNT()        bfin_read16(MDMA_S0_CURR_X_COUNT)
 732 #define bfin_write_MDMA_S0_CURR_X_COUNT(val)    bfin_write16(MDMA_S0_CURR_X_COUNT, val)
 733 #define bfin_read_MDMA_S0_CURR_Y_COUNT()        bfin_read16(MDMA_S0_CURR_Y_COUNT)
 734 #define bfin_write_MDMA_S0_CURR_Y_COUNT(val)    bfin_write16(MDMA_S0_CURR_Y_COUNT, val)
 735
 736 /* MDMA Stream 1 Registers */
 737
 738 #define bfin_read_MDMA_D1_NEXT_DESC_PTR()       bfin_read32(MDMA_D1_NEXT_DESC_PTR)
 739 #define bfin_write_MDMA_D1_NEXT_DESC_PTR(val)   bfin_write32(MDMA_D1_NEXT_DESC_PTR, val)
 740 #define bfin_read_MDMA_D1_START_ADDR()          bfin_read32(MDMA_D1_START_ADDR)
 741 #define bfin_write_MDMA_D1_START_ADDR(val)      bfin_write32(MDMA_D1_START_ADDR, val)
 742 #define bfin_read_MDMA_D1_CONFIG()              bfin_read16(MDMA_D1_CONFIG)
 743 #define bfin_write_MDMA_D1_CONFIG(val)          bfin_write16(MDMA_D1_CONFIG, val)
 744 #define bfin_read_MDMA_D1_X_COUNT()             bfin_read16(MDMA_D1_X_COUNT)
 745 #define bfin_write_MDMA_D1_X_COUNT(val)         bfin_write16(MDMA_D1_X_COUNT, val)
 746 #define bfin_read_MDMA_D1_X_MODIFY()            bfin_read16(MDMA_D1_X_MODIFY)
 747 #define bfin_write_MDMA_D1_X_MODIFY(val)        bfin_write16(MDMA_D1_X_MODIFY, val)
 748 #define bfin_read_MDMA_D1_Y_COUNT()             bfin_read16(MDMA_D1_Y_COUNT)
 749 #define bfin_write_MDMA_D1_Y_COUNT(val)         bfin_write16(MDMA_D1_Y_COUNT, val)
 750 #define bfin_read_MDMA_D1_Y_MODIFY()            bfin_read16(MDMA_D1_Y_MODIFY)
 751 #define bfin_write_MDMA_D1_Y_MODIFY(val)        bfin_write16(MDMA_D1_Y_MODIFY, val)
 752 #define bfin_read_MDMA_D1_CURR_DESC_PTR()       bfin_read32(MDMA_D1_CURR_DESC_PTR)
 753 #define bfin_write_MDMA_D1_CURR_DESC_PTR(val)   bfin_write32(MDMA_D1_CURR_DESC_PTR, val)
 754 #define bfin_read_MDMA_D1_CURR_ADDR()           bfin_read32(MDMA_D1_CURR_ADDR)
 755 #define bfin_write_MDMA_D1_CURR_ADDR(val)       bfin_write32(MDMA_D1_CURR_ADDR, val)
 756 #define bfin_read_MDMA_D1_IRQ_STATUS()          bfin_read16(MDMA_D1_IRQ_STATUS)
 757 #define bfin_write_MDMA_D1_IRQ_STATUS(val)      bfin_write16(MDMA_D1_IRQ_STATUS, val)
 758 #define bfin_read_MDMA_D1_PERIPHERAL_MAP()      bfin_read16(MDMA_D1_PERIPHERAL_MAP)
 759 #define bfin_write_MDMA_D1_PERIPHERAL_MAP(val)  bfin_write16(MDMA_D1_PERIPHERAL_MAP, val)
 760 #define bfin_read_MDMA_D1_CURR_X_COUNT()        bfin_read16(MDMA_D1_CURR_X_COUNT)
 761 #define bfin_write_MDMA_D1_CURR_X_COUNT(val)    bfin_write16(MDMA_D1_CURR_X_COUNT, val)
 762 #define bfin_read_MDMA_D1_CURR_Y_COUNT()        bfin_read16(MDMA_D1_CURR_Y_COUNT)
 763 #define bfin_write_MDMA_D1_CURR_Y_COUNT(val)    bfin_write16(MDMA_D1_CURR_Y_COUNT, val)
 764 #define bfin_read_MDMA_S1_NEXT_DESC_PTR()       bfin_read32(MDMA_S1_NEXT_DESC_PTR)
 765 #define bfin_write_MDMA_S1_NEXT_DESC_PTR(val)   bfin_write32(MDMA_S1_NEXT_DESC_PTR, val)
 766 #define bfin_read_MDMA_S1_START_ADDR()          bfin_read32(MDMA_S1_START_ADDR)
 767 #define bfin_write_MDMA_S1_START_ADDR(val)      bfin_write32(MDMA_S1_START_ADDR, val)
 768 #define bfin_read_MDMA_S1_CONFIG()              bfin_read16(MDMA_S1_CONFIG)
 769 #define bfin_write_MDMA_S1_CONFIG(val)          bfin_write16(MDMA_S1_CONFIG, val)
 770 #define bfin_read_MDMA_S1_X_COUNT()             bfin_read16(MDMA_S1_X_COUNT)
 771 #define bfin_write_MDMA_S1_X_COUNT(val)         bfin_write16(MDMA_S1_X_COUNT, val)
 772 #define bfin_read_MDMA_S1_X_MODIFY()            bfin_read16(MDMA_S1_X_MODIFY)
 773 #define bfin_write_MDMA_S1_X_MODIFY(val)        bfin_write16(MDMA_S1_X_MODIFY, val)
 774 #define bfin_read_MDMA_S1_Y_COUNT()             bfin_read16(MDMA_S1_Y_COUNT)
 775 #define bfin_write_MDMA_S1_Y_COUNT(val)         bfin_write16(MDMA_S1_Y_COUNT, val)
 776 #define bfin_read_MDMA_S1_Y_MODIFY()            bfin_read16(MDMA_S1_Y_MODIFY)
 777 #define bfin_write_MDMA_S1_Y_MODIFY(val)        bfin_write16(MDMA_S1_Y_MODIFY, val)
 778 #define bfin_read_MDMA_S1_CURR_DESC_PTR()       bfin_read32(MDMA_S1_CURR_DESC_PTR)
 779 #define bfin_write_MDMA_S1_CURR_DESC_PTR(val)   bfin_write32(MDMA_S1_CURR_DESC_PTR, val)
 780 #define bfin_read_MDMA_S1_CURR_ADDR()           bfin_read32(MDMA_S1_CURR_ADDR)
 781 #define bfin_write_MDMA_S1_CURR_ADDR(val)       bfin_write32(MDMA_S1_CURR_ADDR, val)
 782 #define bfin_read_MDMA_S1_IRQ_STATUS()          bfin_read16(MDMA_S1_IRQ_STATUS)
 783 #define bfin_write_MDMA_S1_IRQ_STATUS(val)      bfin_write16(MDMA_S1_IRQ_STATUS, val)
 784 #define bfin_read_MDMA_S1_PERIPHERAL_MAP()      bfin_read16(MDMA_S1_PERIPHERAL_MAP)
 785 #define bfin_write_MDMA_S1_PERIPHERAL_MAP(val)  bfin_write16(MDMA_S1_PERIPHERAL_MAP, val)
 786 #define bfin_read_MDMA_S1_CURR_X_COUNT()        bfin_read16(MDMA_S1_CURR_X_COUNT)
 787 #define bfin_write_MDMA_S1_CURR_X_COUNT(val)    bfin_write16(MDMA_S1_CURR_X_COUNT, val)
 788 #define bfin_read_MDMA_S1_CURR_Y_COUNT()        bfin_read16(MDMA_S1_CURR_Y_COUNT)
 789 #define bfin_write_MDMA_S1_CURR_Y_COUNT(val)    bfin_write16(MDMA_S1_CURR_Y_COUNT, val)
 790
 791 /* EPPI1 Registers */
 792
 793 #define bfin_read_EPPI1_STATUS()                bfin_read16(EPPI1_STATUS)
 794 #define bfin_write_EPPI1_STATUS(val)            bfin_write16(EPPI1_STATUS, val)
 795 #define bfin_read_EPPI1_HCOUNT()                bfin_read16(EPPI1_HCOUNT)
 796 #define bfin_write_EPPI1_HCOUNT(val)            bfin_write16(EPPI1_HCOUNT, val)
 797 #define bfin_read_EPPI1_HDELAY()                bfin_read16(EPPI1_HDELAY)
 798 #define bfin_write_EPPI1_HDELAY(val)            bfin_write16(EPPI1_HDELAY, val)
 799 #define bfin_read_EPPI1_VCOUNT()                bfin_read16(EPPI1_VCOUNT)
 800 #define bfin_write_EPPI1_VCOUNT(val)            bfin_write16(EPPI1_VCOUNT, val)
 801 #define bfin_read_EPPI1_VDELAY()                bfin_read16(EPPI1_VDELAY)
 802 #define bfin_write_EPPI1_VDELAY(val)            bfin_write16(EPPI1_VDELAY, val)
 803 #define bfin_read_EPPI1_FRAME()                 bfin_read16(EPPI1_FRAME)
 804 #define bfin_write_EPPI1_FRAME(val)             bfin_write16(EPPI1_FRAME, val)
 805 #define bfin_read_EPPI1_LINE()                  bfin_read16(EPPI1_LINE)
 806 #define bfin_write_EPPI1_LINE(val)              bfin_write16(EPPI1_LINE, val)
 807 #define bfin_read_EPPI1_CLKDIV()                bfin_read16(EPPI1_CLKDIV)
 808 #define bfin_write_EPPI1_CLKDIV(val)            bfin_write16(EPPI1_CLKDIV, val)
 809 #define bfin_read_EPPI1_CONTROL()               bfin_read32(EPPI1_CONTROL)
 810 #define bfin_write_EPPI1_CONTROL(val)           bfin_write32(EPPI1_CONTROL, val)
 811 #define bfin_read_EPPI1_FS1W_HBL()              bfin_read32(EPPI1_FS1W_HBL)
 812 #define bfin_write_EPPI1_FS1W_HBL(val)          bfin_write32(EPPI1_FS1W_HBL, val)
 813 #define bfin_read_EPPI1_FS1P_AVPL()             bfin_read32(EPPI1_FS1P_AVPL)
 814 #define bfin_write_EPPI1_FS1P_AVPL(val)         bfin_write32(EPPI1_FS1P_AVPL, val)
 815 #define bfin_read_EPPI1_FS2W_LVB()              bfin_read32(EPPI1_FS2W_LVB)
 816 #define bfin_write_EPPI1_FS2W_LVB(val)          bfin_write32(EPPI1_FS2W_LVB, val)
 817 #define bfin_read_EPPI1_FS2P_LAVF()             bfin_read32(EPPI1_FS2P_LAVF)
 818 #define bfin_write_EPPI1_FS2P_LAVF(val)         bfin_write32(EPPI1_FS2P_LAVF, val)
 819 #define bfin_read_EPPI1_CLIP()                  bfin_read32(EPPI1_CLIP)
 820 #define bfin_write_EPPI1_CLIP(val)              bfin_write32(EPPI1_CLIP, val)
 821
 822 /* Port Interrubfin_read_()t 0 Registers (32-bit) */
 823
 824 #define bfin_read_PINT0_MASK_SET()              bfin_read32(PINT0_MASK_SET)
 825 #define bfin_write_PINT0_MASK_SET(val)          bfin_write32(PINT0_MASK_SET, val)
 826 #define bfin_read_PINT0_MASK_CLEAR()            bfin_read32(PINT0_MASK_CLEAR)
 827 #define bfin_write_PINT0_MASK_CLEAR(val)        bfin_write32(PINT0_MASK_CLEAR, val)
 828 #define bfin_read_PINT0_REQUEST()               bfin_read32(PINT0_REQUEST)
 829 #define bfin_write_PINT0_REQUEST(val)           bfin_write32(PINT0_REQUEST, val)
 830 #define bfin_read_PINT0_ASSIGN()                bfin_read32(PINT0_ASSIGN)
 831 #define bfin_write_PINT0_ASSIGN(val)            bfin_write32(PINT0_ASSIGN, val)
 832 #define bfin_read_PINT0_EDGE_SET()              bfin_read32(PINT0_EDGE_SET)
 833 #define bfin_write_PINT0_EDGE_SET(val)          bfin_write32(PINT0_EDGE_SET, val)
 834 #define bfin_read_PINT0_EDGE_CLEAR()            bfin_read32(PINT0_EDGE_CLEAR)
 835 #define bfin_write_PINT0_EDGE_CLEAR(val)        bfin_write32(PINT0_EDGE_CLEAR, val)
 836 #define bfin_read_PINT0_INVERT_SET()            bfin_read32(PINT0_INVERT_SET)
 837 #define bfin_write_PINT0_INVERT_SET(val)        bfin_write32(PINT0_INVERT_SET, val)
 838 #define bfin_read_PINT0_INVERT_CLEAR()          bfin_read32(PINT0_INVERT_CLEAR)
 839 #define bfin_write_PINT0_INVERT_CLEAR(val)      bfin_write32(PINT0_INVERT_CLEAR, val)
 840 #define bfin_read_PINT0_PINSTATE()              bfin_read32(PINT0_PINSTATE)
 841 #define bfin_write_PINT0_PINSTATE(val)          bfin_write32(PINT0_PINSTATE, val)
 842 #define bfin_read_PINT0_LATCH()                 bfin_read32(PINT0_LATCH)
 843 #define bfin_write_PINT0_LATCH(val)             bfin_write32(PINT0_LATCH, val)
 844
 845 /* Port Interrubfin_read_()t 1 Registers (32-bit) */
 846
 847 #define bfin_read_PINT1_MASK_SET()              bfin_read32(PINT1_MASK_SET)
 848 #define bfin_write_PINT1_MASK_SET(val)          bfin_write32(PINT1_MASK_SET, val)
 849 #define bfin_read_PINT1_MASK_CLEAR()            bfin_read32(PINT1_MASK_CLEAR)
 850 #define bfin_write_PINT1_MASK_CLEAR(val)        bfin_write32(PINT1_MASK_CLEAR, val)
 851 #define bfin_read_PINT1_REQUEST()               bfin_read32(PINT1_REQUEST)
 852 #define bfin_write_PINT1_REQUEST(val)           bfin_write32(PINT1_REQUEST, val)
 853 #define bfin_read_PINT1_ASSIGN()                bfin_read32(PINT1_ASSIGN)
 854 #define bfin_write_PINT1_ASSIGN(val)            bfin_write32(PINT1_ASSIGN, val)
 855 #define bfin_read_PINT1_EDGE_SET()              bfin_read32(PINT1_EDGE_SET)
 856 #define bfin_write_PINT1_EDGE_SET(val)          bfin_write32(PINT1_EDGE_SET, val)
 857 #define bfin_read_PINT1_EDGE_CLEAR()            bfin_read32(PINT1_EDGE_CLEAR)
 858 #define bfin_write_PINT1_EDGE_CLEAR(val)        bfin_write32(PINT1_EDGE_CLEAR, val)
 859 #define bfin_read_PINT1_INVERT_SET()            bfin_read32(PINT1_INVERT_SET)
 860 #define bfin_write_PINT1_INVERT_SET(val)        bfin_write32(PINT1_INVERT_SET, val)
 861 #define bfin_read_PINT1_INVERT_CLEAR()          bfin_read32(PINT1_INVERT_CLEAR)
 862 #define bfin_write_PINT1_INVERT_CLEAR(val)      bfin_write32(PINT1_INVERT_CLEAR, val)
 863 #define bfin_read_PINT1_PINSTATE()              bfin_read32(PINT1_PINSTATE)
 864 #define bfin_write_PINT1_PINSTATE(val)          bfin_write32(PINT1_PINSTATE, val)
 865 #define bfin_read_PINT1_LATCH()                 bfin_read32(PINT1_LATCH)
 866 #define bfin_write_PINT1_LATCH(val)             bfin_write32(PINT1_LATCH, val)
 867
 868 /* Port Interrubfin_read_()t 2 Registers (32-bit) */
 869
 870 #define bfin_read_PINT2_MASK_SET()              bfin_read32(PINT2_MASK_SET)
 871 #define bfin_write_PINT2_MASK_SET(val)          bfin_write32(PINT2_MASK_SET, val)
 872 #define bfin_read_PINT2_MASK_CLEAR()            bfin_read32(PINT2_MASK_CLEAR)
 873 #define bfin_write_PINT2_MASK_CLEAR(val)        bfin_write32(PINT2_MASK_CLEAR, val)
 874 #define bfin_read_PINT2_REQUEST()               bfin_read32(PINT2_REQUEST)
 875 #define bfin_write_PINT2_REQUEST(val)           bfin_write32(PINT2_REQUEST, val)
 876 #define bfin_read_PINT2_ASSIGN()                bfin_read32(PINT2_ASSIGN)
 877 #define bfin_write_PINT2_ASSIGN(val)            bfin_write32(PINT2_ASSIGN, val)
 878 #define bfin_read_PINT2_EDGE_SET()              bfin_read32(PINT2_EDGE_SET)
 879 #define bfin_write_PINT2_EDGE_SET(val)          bfin_write32(PINT2_EDGE_SET, val)
 880 #define bfin_read_PINT2_EDGE_CLEAR()            bfin_read32(PINT2_EDGE_CLEAR)
 881 #define bfin_write_PINT2_EDGE_CLEAR(val)        bfin_write32(PINT2_EDGE_CLEAR, val)
 882 #define bfin_read_PINT2_INVERT_SET()            bfin_read32(PINT2_INVERT_SET)
 883 #define bfin_write_PINT2_INVERT_SET(val)        bfin_write32(PINT2_INVERT_SET, val)
 884 #define bfin_read_PINT2_INVERT_CLEAR()          bfin_read32(PINT2_INVERT_CLEAR)
 885 #define bfin_write_PINT2_INVERT_CLEAR(val)      bfin_write32(PINT2_INVERT_CLEAR, val)
 886 #define bfin_read_PINT2_PINSTATE()              bfin_read32(PINT2_PINSTATE)
 887 #define bfin_write_PINT2_PINSTATE(val)          bfin_write32(PINT2_PINSTATE, val)
 888 #define bfin_read_PINT2_LATCH()                 bfin_read32(PINT2_LATCH)
 889 #define bfin_write_PINT2_LATCH(val)             bfin_write32(PINT2_LATCH, val)
 890
 891 /* Port Interrubfin_read_()t 3 Registers (32-bit) */
 892
 893 #define bfin_read_PINT3_MASK_SET()              bfin_read32(PINT3_MASK_SET)
 894 #define bfin_write_PINT3_MASK_SET(val)          bfin_write32(PINT3_MASK_SET, val)
 895 #define bfin_read_PINT3_MASK_CLEAR()            bfin_read32(PINT3_MASK_CLEAR)
 896 #define bfin_write_PINT3_MASK_CLEAR(val)        bfin_write32(PINT3_MASK_CLEAR, val)
 897 #define bfin_read_PINT3_REQUEST()               bfin_read32(PINT3_REQUEST)
 898 #define bfin_write_PINT3_REQUEST(val)           bfin_write32(PINT3_REQUEST, val)
 899 #define bfin_read_PINT3_ASSIGN()                bfin_read32(PINT3_ASSIGN)
 900 #define bfin_write_PINT3_ASSIGN(val)            bfin_write32(PINT3_ASSIGN, val)
 901 #define bfin_read_PINT3_EDGE_SET()              bfin_read32(PINT3_EDGE_SET)
 902 #define bfin_write_PINT3_EDGE_SET(val)          bfin_write32(PINT3_EDGE_SET, val)
 903 #define bfin_read_PINT3_EDGE_CLEAR()            bfin_read32(PINT3_EDGE_CLEAR)
 904 #define bfin_write_PINT3_EDGE_CLEAR(val)        bfin_write32(PINT3_EDGE_CLEAR, val)
 905 #define bfin_read_PINT3_INVERT_SET()            bfin_read32(PINT3_INVERT_SET)
 906 #define bfin_write_PINT3_INVERT_SET(val)        bfin_write32(PINT3_INVERT_SET, val)
 907 #define bfin_read_PINT3_INVERT_CLEAR()          bfin_read32(PINT3_INVERT_CLEAR)
 908 #define bfin_write_PINT3_INVERT_CLEAR(val)      bfin_write32(PINT3_INVERT_CLEAR, val)
 909 #define bfin_read_PINT3_PINSTATE()              bfin_read32(PINT3_PINSTATE)
 910 #define bfin_write_PINT3_PINSTATE(val)          bfin_write32(PINT3_PINSTATE, val)
 911 #define bfin_read_PINT3_LATCH()                 bfin_read32(PINT3_LATCH)
 912 #define bfin_write_PINT3_LATCH(val)             bfin_write32(PINT3_LATCH, val)
 913
 914 /* Port A Registers */
 915
 916 #define bfin_read_PORTA_FER()           bfin_read16(PORTA_FER)
 917 #define bfin_write_PORTA_FER(val)       bfin_write16(PORTA_FER, val)
 918 #define bfin_read_PORTA()               bfin_read16(PORTA)
 919 #define bfin_write_PORTA(val)           bfin_write16(PORTA, val)
 920 #define bfin_read_PORTA_SET()           bfin_read16(PORTA_SET)
 921 #define bfin_write_PORTA_SET(val)       bfin_write16(PORTA_SET, val)
 922 #define bfin_read_PORTA_CLEAR()         bfin_read16(PORTA_CLEAR)
 923 #define bfin_write_PORTA_CLEAR(val)     bfin_write16(PORTA_CLEAR, val)
 924 #define bfin_read_PORTA_DIR_SET()       bfin_read16(PORTA_DIR_SET)
 925 #define bfin_write_PORTA_DIR_SET(val)   bfin_write16(PORTA_DIR_SET, val)
 926 #define bfin_read_PORTA_DIR_CLEAR()     bfin_read16(PORTA_DIR_CLEAR)
 927 #define bfin_write_PORTA_DIR_CLEAR(val) bfin_write16(PORTA_DIR_CLEAR, val)
 928 #define bfin_read_PORTA_INEN()          bfin_read16(PORTA_INEN)
 929 #define bfin_write_PORTA_INEN(val)      bfin_write16(PORTA_INEN, val)
 930 #define bfin_read_PORTA_MUX()           bfin_read32(PORTA_MUX)
 931 #define bfin_write_PORTA_MUX(val)       bfin_write32(PORTA_MUX, val)
 932
 933 /* Port B Registers */
 934
 935 #define bfin_read_PORTB_FER()           bfin_read16(PORTB_FER)
 936 #define bfin_write_PORTB_FER(val)       bfin_write16(PORTB_FER, val)
 937 #define bfin_read_PORTB()               bfin_read16(PORTB)
 938 #define bfin_write_PORTB(val)           bfin_write16(PORTB, val)
 939 #define bfin_read_PORTB_SET()           bfin_read16(PORTB_SET)
 940 #define bfin_write_PORTB_SET(val)       bfin_write16(PORTB_SET, val)
 941 #define bfin_read_PORTB_CLEAR()         bfin_read16(PORTB_CLEAR)
 942 #define bfin_write_PORTB_CLEAR(val)     bfin_write16(PORTB_CLEAR, val)
 943 #define bfin_read_PORTB_DIR_SET()       bfin_read16(PORTB_DIR_SET)
 944 #define bfin_write_PORTB_DIR_SET(val)   bfin_write16(PORTB_DIR_SET, val)
 945 #define bfin_read_PORTB_DIR_CLEAR()     bfin_read16(PORTB_DIR_CLEAR)
 946 #define bfin_write_PORTB_DIR_CLEAR(val) bfin_write16(PORTB_DIR_CLEAR, val)
 947 #define bfin_read_PORTB_INEN()          bfin_read16(PORTB_INEN)
 948 #define bfin_write_PORTB_INEN(val)      bfin_write16(PORTB_INEN, val)
 949 #define bfin_read_PORTB_MUX()           bfin_read32(PORTB_MUX)
 950 #define bfin_write_PORTB_MUX(val)       bfin_write32(PORTB_MUX, val)
 951
 952 /* Port C Registers */
 953
 954 #define bfin_read_PORTC_FER()           bfin_read16(PORTC_FER)
 955 #define bfin_write_PORTC_FER(val)       bfin_write16(PORTC_FER, val)
 956 #define bfin_read_PORTC()               bfin_read16(PORTC)
 957 #define bfin_write_PORTC(val)           bfin_write16(PORTC, val)
 958 #define bfin_read_PORTC_SET()           bfin_read16(PORTC_SET)
 959 #define bfin_write_PORTC_SET(val)       bfin_write16(PORTC_SET, val)
 960 #define bfin_read_PORTC_CLEAR()         bfin_read16(PORTC_CLEAR)
 961 #define bfin_write_PORTC_CLEAR(val)     bfin_write16(PORTC_CLEAR, val)
 962 #define bfin_read_PORTC_DIR_SET()       bfin_read16(PORTC_DIR_SET)
 963 #define bfin_write_PORTC_DIR_SET(val)   bfin_write16(PORTC_DIR_SET, val)
 964 #define bfin_read_PORTC_DIR_CLEAR()     bfin_read16(PORTC_DIR_CLEAR)
 965 #define bfin_write_PORTC_DIR_CLEAR(val) bfin_write16(PORTC_DIR_CLEAR, val)
 966 #define bfin_read_PORTC_INEN()          bfin_read16(PORTC_INEN)
 967 #define bfin_write_PORTC_INEN(val)      bfin_write16(PORTC_INEN, val)
 968 #define bfin_read_PORTC_MUX()           bfin_read32(PORTC_MUX)
 969 #define bfin_write_PORTC_MUX(val)       bfin_write32(PORTC_MUX, val)
 970
 971 /* Port D Registers */
 972
 973 #define bfin_read_PORTD_FER()           bfin_read16(PORTD_FER)
 974 #define bfin_write_PORTD_FER(val)       bfin_write16(PORTD_FER, val)
 975 #define bfin_read_PORTD()               bfin_read16(PORTD)
 976 #define bfin_write_PORTD(val)           bfin_write16(PORTD, val)
 977 #define bfin_read_PORTD_SET()           bfin_read16(PORTD_SET)
 978 #define bfin_write_PORTD_SET(val)       bfin_write16(PORTD_SET, val)
 979 #define bfin_read_PORTD_CLEAR()         bfin_read16(PORTD_CLEAR)
 980 #define bfin_write_PORTD_CLEAR(val)     bfin_write16(PORTD_CLEAR, val)
 981 #define bfin_read_PORTD_DIR_SET()       bfin_read16(PORTD_DIR_SET)
 982 #define bfin_write_PORTD_DIR_SET(val)   bfin_write16(PORTD_DIR_SET, val)
 983 #define bfin_read_PORTD_DIR_CLEAR()     bfin_read16(PORTD_DIR_CLEAR)
 984 #define bfin_write_PORTD_DIR_CLEAR(val) bfin_write16(PORTD_DIR_CLEAR, val)
 985 #define bfin_read_PORTD_INEN()          bfin_read16(PORTD_INEN)
 986 #define bfin_write_PORTD_INEN(val)      bfin_write16(PORTD_INEN, val)
 987 #define bfin_read_PORTD_MUX()           bfin_read32(PORTD_MUX)
 988 #define bfin_write_PORTD_MUX(val)       bfin_write32(PORTD_MUX, val)
 989
 990 /* Port E Registers */
 991
 992 #define bfin_read_PORTE_FER()           bfin_read16(PORTE_FER)
 993 #define bfin_write_PORTE_FER(val)       bfin_write16(PORTE_FER, val)
 994 #define bfin_read_PORTE()               bfin_read16(PORTE)
 995 #define bfin_write_PORTE(val)           bfin_write16(PORTE, val)
 996 #define bfin_read_PORTE_SET()           bfin_read16(PORTE_SET)
 997 #define bfin_write_PORTE_SET(val)       bfin_write16(PORTE_SET, val)
 998 #define bfin_read_PORTE_CLEAR()         bfin_read16(PORTE_CLEAR)
 999 #define bfin_write_PORTE_CLEAR(val)     bfin_write16(PORTE_CLEAR, val)
1000 #define bfin_read_PORTE_DIR_SET()       bfin_read16(PORTE_DIR_SET)
1001 #define bfin_write_PORTE_DIR_SET(val)   bfin_write16(PORTE_DIR_SET, val)
1002 #define bfin_read_PORTE_DIR_CLEAR()     bfin_read16(PORTE_DIR_CLEAR)
1003 #define bfin_write_PORTE_DIR_CLEAR(val) bfin_write16(PORTE_DIR_CLEAR, val)
1004 #define bfin_read_PORTE_INEN()          bfin_read16(PORTE_INEN)
1005 #define bfin_write_PORTE_INEN(val)      bfin_write16(PORTE_INEN, val)
1006 #define bfin_read_PORTE_MUX()           bfin_read32(PORTE_MUX)
1007 #define bfin_write_PORTE_MUX(val)       bfin_write32(PORTE_MUX, val)
1008
1009 /* Port F Registers */
1010
1011 #define bfin_read_PORTF_FER()           bfin_read16(PORTF_FER)
1012 #define bfin_write_PORTF_FER(val)       bfin_write16(PORTF_FER, val)
1013 #define bfin_read_PORTF()               bfin_read16(PORTF)
1014 #define bfin_write_PORTF(val)           bfin_write16(PORTF, val)
1015 #define bfin_read_PORTF_SET()           bfin_read16(PORTF_SET)
1016 #define bfin_write_PORTF_SET(val)       bfin_write16(PORTF_SET, val)
1017 #define bfin_read_PORTF_CLEAR()         bfin_read16(PORTF_CLEAR)
1018 #define bfin_write_PORTF_CLEAR(val)     bfin_write16(PORTF_CLEAR, val)
1019 #define bfin_read_PORTF_DIR_SET()       bfin_read16(PORTF_DIR_SET)
1020 #define bfin_write_PORTF_DIR_SET(val)   bfin_write16(PORTF_DIR_SET, val)
1021 #define bfin_read_PORTF_DIR_CLEAR()     bfin_read16(PORTF_DIR_CLEAR)
1022 #define bfin_write_PORTF_DIR_CLEAR(val) bfin_write16(PORTF_DIR_CLEAR, val)
1023 #define bfin_read_PORTF_INEN()          bfin_read16(PORTF_INEN)
1024 #define bfin_write_PORTF_INEN(val)      bfin_write16(PORTF_INEN, val)
1025 #define bfin_read_PORTF_MUX()           bfin_read32(PORTF_MUX)
1026 #define bfin_write_PORTF_MUX(val)       bfin_write32(PORTF_MUX, val)
1027
1028 /* Port G Registers */
1029
1030 #define bfin_read_PORTG_FER()           bfin_read16(PORTG_FER)
1031 #define bfin_write_PORTG_FER(val)       bfin_write16(PORTG_FER, val)
1032 #define bfin_read_PORTG()               bfin_read16(PORTG)
1033 #define bfin_write_PORTG(val)           bfin_write16(PORTG, val)
1034 #define bfin_read_PORTG_SET()           bfin_read16(PORTG_SET)
1035 #define bfin_write_PORTG_SET(val)       bfin_write16(PORTG_SET, val)
1036 #define bfin_read_PORTG_CLEAR()         bfin_read16(PORTG_CLEAR)
1037 #define bfin_write_PORTG_CLEAR(val)     bfin_write16(PORTG_CLEAR, val)
1038 #define bfin_read_PORTG_DIR_SET()       bfin_read16(PORTG_DIR_SET)
1039 #define bfin_write_PORTG_DIR_SET(val)   bfin_write16(PORTG_DIR_SET, val)
1040 #define bfin_read_PORTG_DIR_CLEAR()     bfin_read16(PORTG_DIR_CLEAR)
1041 #define bfin_write_PORTG_DIR_CLEAR(val) bfin_write16(PORTG_DIR_CLEAR, val)
1042 #define bfin_read_PORTG_INEN()          bfin_read16(PORTG_INEN)
1043 #define bfin_write_PORTG_INEN(val)      bfin_write16(PORTG_INEN, val)
1044 #define bfin_read_PORTG_MUX()           bfin_read32(PORTG_MUX)
1045 #define bfin_write_PORTG_MUX(val)       bfin_write32(PORTG_MUX, val)
1046
1047 /* Port H Registers */
1048
1049 #define bfin_read_PORTH_FER()           bfin_read16(PORTH_FER)
1050 #define bfin_write_PORTH_FER(val)       bfin_write16(PORTH_FER, val)
1051 #define bfin_read_PORTH()               bfin_read16(PORTH)
1052 #define bfin_write_PORTH(val)           bfin_write16(PORTH, val)
1053 #define bfin_read_PORTH_SET()           bfin_read16(PORTH_SET)
1054 #define bfin_write_PORTH_SET(val)       bfin_write16(PORTH_SET, val)
1055 #define bfin_read_PORTH_CLEAR()         bfin_read16(PORTH_CLEAR)
1056 #define bfin_write_PORTH_CLEAR(val)     bfin_write16(PORTH_CLEAR, val)
1057 #define bfin_read_PORTH_DIR_SET()       bfin_read16(PORTH_DIR_SET)
1058 #define bfin_write_PORTH_DIR_SET(val)   bfin_write16(PORTH_DIR_SET, val)
1059 #define bfin_read_PORTH_DIR_CLEAR()     bfin_read16(PORTH_DIR_CLEAR)
1060 #define bfin_write_PORTH_DIR_CLEAR(val) bfin_write16(PORTH_DIR_CLEAR, val)
1061 #define bfin_read_PORTH_INEN()          bfin_read16(PORTH_INEN)
1062 #define bfin_write_PORTH_INEN(val)      bfin_write16(PORTH_INEN, val)
1063 #define bfin_read_PORTH_MUX()           bfin_read32(PORTH_MUX)
1064 #define bfin_write_PORTH_MUX(val)       bfin_write32(PORTH_MUX, val)
1065
1066 /* Port I Registers */
1067
1068 #define bfin_read_PORTI_FER()           bfin_read16(PORTI_FER)
1069 #define bfin_write_PORTI_FER(val)       bfin_write16(PORTI_FER, val)
1070 #define bfin_read_PORTI()               bfin_read16(PORTI)
1071 #define bfin_write_PORTI(val)           bfin_write16(PORTI, val)
1072 #define bfin_read_PORTI_SET()           bfin_read16(PORTI_SET)
1073 #define bfin_write_PORTI_SET(val)       bfin_write16(PORTI_SET, val)
1074 #define bfin_read_PORTI_CLEAR()         bfin_read16(PORTI_CLEAR)
1075 #define bfin_write_PORTI_CLEAR(val)     bfin_write16(PORTI_CLEAR, val)
1076 #define bfin_read_PORTI_DIR_SET()       bfin_read16(PORTI_DIR_SET)
1077 #define bfin_write_PORTI_DIR_SET(val)   bfin_write16(PORTI_DIR_SET, val)
1078 #define bfin_read_PORTI_DIR_CLEAR()     bfin_read16(PORTI_DIR_CLEAR)
1079 #define bfin_write_PORTI_DIR_CLEAR(val) bfin_write16(PORTI_DIR_CLEAR, val)
1080 #define bfin_read_PORTI_INEN()          bfin_read16(PORTI_INEN)
1081 #define bfin_write_PORTI_INEN(val)      bfin_write16(PORTI_INEN, val)
1082 #define bfin_read_PORTI_MUX()           bfin_read32(PORTI_MUX)
1083 #define bfin_write_PORTI_MUX(val)       bfin_write32(PORTI_MUX, val)
1084
1085 /* Port J Registers */
1086
1087 #define bfin_read_PORTJ_FER()           bfin_read16(PORTJ_FER)
1088 #define bfin_write_PORTJ_FER(val)       bfin_write16(PORTJ_FER, val)
1089 #define bfin_read_PORTJ()               bfin_read16(PORTJ)
1090 #define bfin_write_PORTJ(val)           bfin_write16(PORTJ, val)
1091 #define bfin_read_PORTJ_SET()           bfin_read16(PORTJ_SET)
1092 #define bfin_write_PORTJ_SET(val)       bfin_write16(PORTJ_SET, val)
1093 #define bfin_read_PORTJ_CLEAR()         bfin_read16(PORTJ_CLEAR)
1094 #define bfin_write_PORTJ_CLEAR(val)     bfin_write16(PORTJ_CLEAR, val)
1095 #define bfin_read_PORTJ_DIR_SET()       bfin_read16(PORTJ_DIR_SET)
1096 #define bfin_write_PORTJ_DIR_SET(val)   bfin_write16(PORTJ_DIR_SET, val)
1097 #define bfin_read_PORTJ_DIR_CLEAR()     bfin_read16(PORTJ_DIR_CLEAR)
1098 #define bfin_write_PORTJ_DIR_CLEAR(val) bfin_write16(PORTJ_DIR_CLEAR, val)
1099 #define bfin_read_PORTJ_INEN()          bfin_read16(PORTJ_INEN)
1100 #define bfin_write_PORTJ_INEN(val)      bfin_write16(PORTJ_INEN, val)
1101 #define bfin_read_PORTJ_MUX()           bfin_read32(PORTJ_MUX)
1102 #define bfin_write_PORTJ_MUX(val)       bfin_write32(PORTJ_MUX, val)
1103
1104 /* PWM Timer Registers */
1105
1106 #define bfin_read_TIMER0_CONFIG()               bfin_read16(TIMER0_CONFIG)
1107 #define bfin_write_TIMER0_CONFIG(val)           bfin_write16(TIMER0_CONFIG, val)
1108 #define bfin_read_TIMER0_COUNTER()              bfin_read32(TIMER0_COUNTER)
1109 #define bfin_write_TIMER0_COUNTER(val)          bfin_write32(TIMER0_COUNTER, val)
1110 #define bfin_read_TIMER0_PERIOD()               bfin_read32(TIMER0_PERIOD)
1111 #define bfin_write_TIMER0_PERIOD(val)           bfin_write32(TIMER0_PERIOD, val)
1112 #define bfin_read_TIMER0_WIDTH()                bfin_read32(TIMER0_WIDTH)
1113 #define bfin_write_TIMER0_WIDTH(val)            bfin_write32(TIMER0_WIDTH, val)
1114 #define bfin_read_TIMER1_CONFIG()               bfin_read16(TIMER1_CONFIG)
1115 #define bfin_write_TIMER1_CONFIG(val)           bfin_write16(TIMER1_CONFIG, val)
1116 #define bfin_read_TIMER1_COUNTER()              bfin_read32(TIMER1_COUNTER)
1117 #define bfin_write_TIMER1_COUNTER(val)          bfin_write32(TIMER1_COUNTER, val)
1118 #define bfin_read_TIMER1_PERIOD()               bfin_read32(TIMER1_PERIOD)
1119 #define bfin_write_TIMER1_PERIOD(val)           bfin_write32(TIMER1_PERIOD, val)
1120 #define bfin_read_TIMER1_WIDTH()                bfin_read32(TIMER1_WIDTH)
1121 #define bfin_write_TIMER1_WIDTH(val)            bfin_write32(TIMER1_WIDTH, val)
1122 #define bfin_read_TIMER2_CONFIG()               bfin_read16(TIMER2_CONFIG)
1123 #define bfin_write_TIMER2_CONFIG(val)           bfin_write16(TIMER2_CONFIG, val)
1124 #define bfin_read_TIMER2_COUNTER()              bfin_read32(TIMER2_COUNTER)
1125 #define bfin_write_TIMER2_COUNTER(val)          bfin_write32(TIMER2_COUNTER, val)
1126 #define bfin_read_TIMER2_PERIOD()               bfin_read32(TIMER2_PERIOD)
1127 #define bfin_write_TIMER2_PERIOD(val)           bfin_write32(TIMER2_PERIOD, val)
1128 #define bfin_read_TIMER2_WIDTH()                bfin_read32(TIMER2_WIDTH)
1129 #define bfin_write_TIMER2_WIDTH(val)            bfin_write32(TIMER2_WIDTH, val)
1130 #define bfin_read_TIMER3_CONFIG()               bfin_read16(TIMER3_CONFIG)
1131 #define bfin_write_TIMER3_CONFIG(val)           bfin_write16(TIMER3_CONFIG, val)
1132 #define bfin_read_TIMER3_COUNTER()              bfin_read32(TIMER3_COUNTER)
1133 #define bfin_write_TIMER3_COUNTER(val)          bfin_write32(TIMER3_COUNTER, val)
1134 #define bfin_read_TIMER3_PERIOD()               bfin_read32(TIMER3_PERIOD)
1135 #define bfin_write_TIMER3_PERIOD(val)           bfin_write32(TIMER3_PERIOD, val)
1136 #define bfin_read_TIMER3_WIDTH()                bfin_read32(TIMER3_WIDTH)
1137 #define bfin_write_TIMER3_WIDTH(val)            bfin_write32(TIMER3_WIDTH, val)
1138 #define bfin_read_TIMER4_CONFIG()               bfin_read16(TIMER4_CONFIG)
1139 #define bfin_write_TIMER4_CONFIG(val)           bfin_write16(TIMER4_CONFIG, val)
1140 #define bfin_read_TIMER4_COUNTER()              bfin_read32(TIMER4_COUNTER)
1141 #define bfin_write_TIMER4_COUNTER(val)          bfin_write32(TIMER4_COUNTER, val)
1142 #define bfin_read_TIMER4_PERIOD()               bfin_read32(TIMER4_PERIOD)
1143 #define bfin_write_TIMER4_PERIOD(val)           bfin_write32(TIMER4_PERIOD, val)
1144 #define bfin_read_TIMER4_WIDTH()                bfin_read32(TIMER4_WIDTH)
1145 #define bfin_write_TIMER4_WIDTH(val)            bfin_write32(TIMER4_WIDTH, val)
1146 #define bfin_read_TIMER5_CONFIG()               bfin_read16(TIMER5_CONFIG)
1147 #define bfin_write_TIMER5_CONFIG(val)           bfin_write16(TIMER5_CONFIG, val)
1148 #define bfin_read_TIMER5_COUNTER()              bfin_read32(TIMER5_COUNTER)
1149 #define bfin_write_TIMER5_COUNTER(val)          bfin_write32(TIMER5_COUNTER, val)
1150 #define bfin_read_TIMER5_PERIOD()               bfin_read32(TIMER5_PERIOD)
1151 #define bfin_write_TIMER5_PERIOD(val)           bfin_write32(TIMER5_PERIOD, val)
1152 #define bfin_read_TIMER5_WIDTH()                bfin_read32(TIMER5_WIDTH)
1153 #define bfin_write_TIMER5_WIDTH(val)            bfin_write32(TIMER5_WIDTH, val)
1154 #define bfin_read_TIMER6_CONFIG()               bfin_read16(TIMER6_CONFIG)
1155 #define bfin_write_TIMER6_CONFIG(val)           bfin_write16(TIMER6_CONFIG, val)
1156 #define bfin_read_TIMER6_COUNTER()              bfin_read32(TIMER6_COUNTER)
1157 #define bfin_write_TIMER6_COUNTER(val)          bfin_write32(TIMER6_COUNTER, val)
1158 #define bfin_read_TIMER6_PERIOD()               bfin_read32(TIMER6_PERIOD)
1159 #define bfin_write_TIMER6_PERIOD(val)           bfin_write32(TIMER6_PERIOD, val)
1160 #define bfin_read_TIMER6_WIDTH()                bfin_read32(TIMER6_WIDTH)
1161 #define bfin_write_TIMER6_WIDTH(val)            bfin_write32(TIMER6_WIDTH, val)
1162 #define bfin_read_TIMER7_CONFIG()               bfin_read16(TIMER7_CONFIG)
1163 #define bfin_write_TIMER7_CONFIG(val)           bfin_write16(TIMER7_CONFIG, val)
1164 #define bfin_read_TIMER7_COUNTER()              bfin_read32(TIMER7_COUNTER)
1165 #define bfin_write_TIMER7_COUNTER(val)          bfin_write32(TIMER7_COUNTER, val)
1166 #define bfin_read_TIMER7_PERIOD()               bfin_read32(TIMER7_PERIOD)
1167 #define bfin_write_TIMER7_PERIOD(val)           bfin_write32(TIMER7_PERIOD, val)
1168 #define bfin_read_TIMER7_WIDTH()                bfin_read32(TIMER7_WIDTH)
1169 #define bfin_write_TIMER7_WIDTH(val)            bfin_write32(TIMER7_WIDTH, val)
1170
1171 /* Timer Groubfin_read_() of 8 */
1172
1173 #define bfin_read_TIMER_ENABLE0()               bfin_read16(TIMER_ENABLE0)
1174 #define bfin_write_TIMER_ENABLE0(val)           bfin_write16(TIMER_ENABLE0, val)
1175 #define bfin_read_TIMER_DISABLE0()              bfin_read16(TIMER_DISABLE0)
1176 #define bfin_write_TIMER_DISABLE0(val)          bfin_write16(TIMER_DISABLE0, val)
1177 #define bfin_read_TIMER_STATUS0()               bfin_read32(TIMER_STATUS0)
1178 #define bfin_write_TIMER_STATUS0(val)           bfin_write32(TIMER_STATUS0, val)
1179
1180 /* DMAC1 Registers */
1181
1182 #define bfin_read_DMAC1_TCPER()                 bfin_read16(DMAC1_TCPER)
1183 #define bfin_write_DMAC1_TCPER(val)             bfin_write16(DMAC1_TCPER, val)
1184 #define bfin_read_DMAC1_TCCNT()                 bfin_read16(DMAC1_TCCNT)
1185 #define bfin_write_DMAC1_TCCNT(val)             bfin_write16(DMAC1_TCCNT, val)
1186
1187 /* DMA Channel 12 Registers */
1188
1189 #define bfin_read_DMA12_NEXT_DESC_PTR()         bfin_read32(DMA12_NEXT_DESC_PTR)
1190 #define bfin_write_DMA12_NEXT_DESC_PTR(val)     bfin_write32(DMA12_NEXT_DESC_PTR, val)
1191 #define bfin_read_DMA12_START_ADDR()            bfin_read32(DMA12_START_ADDR)
1192 #define bfin_write_DMA12_START_ADDR(val)        bfin_write32(DMA12_START_ADDR, val)
1193 #define bfin_read_DMA12_CONFIG()                bfin_read16(DMA12_CONFIG)
1194 #define bfin_write_DMA12_CONFIG(val)            bfin_write16(DMA12_CONFIG, val)
1195 #define bfin_read_DMA12_X_COUNT()               bfin_read16(DMA12_X_COUNT)
1196 #define bfin_write_DMA12_X_COUNT(val)           bfin_write16(DMA12_X_COUNT, val)
1197 #define bfin_read_DMA12_X_MODIFY()              bfin_read16(DMA12_X_MODIFY)
1198 #define bfin_write_DMA12_X_MODIFY(val)          bfin_write16(DMA12_X_MODIFY, val)
1199 #define bfin_read_DMA12_Y_COUNT()               bfin_read16(DMA12_Y_COUNT)
1200 #define bfin_write_DMA12_Y_COUNT(val)           bfin_write16(DMA12_Y_COUNT, val)
1201 #define bfin_read_DMA12_Y_MODIFY()              bfin_read16(DMA12_Y_MODIFY)
1202 #define bfin_write_DMA12_Y_MODIFY(val)          bfin_write16(DMA12_Y_MODIFY, val)
1203 #define bfin_read_DMA12_CURR_DESC_PTR()         bfin_read32(DMA12_CURR_DESC_PTR)
1204 #define bfin_write_DMA12_CURR_DESC_PTR(val)     bfin_write32(DMA12_CURR_DESC_PTR, val)
1205 #define bfin_read_DMA12_CURR_ADDR()             bfin_read32(DMA12_CURR_ADDR)
1206 #define bfin_write_DMA12_CURR_ADDR(val)         bfin_write32(DMA12_CURR_ADDR, val)
1207 #define bfin_read_DMA12_IRQ_STATUS()            bfin_read16(DMA12_IRQ_STATUS)
1208 #define bfin_write_DMA12_IRQ_STATUS(val)        bfin_write16(DMA12_IRQ_STATUS, val)
1209 #define bfin_read_DMA12_PERIPHERAL_MAP()        bfin_read16(DMA12_PERIPHERAL_MAP)
1210 #define bfin_write_DMA12_PERIPHERAL_MAP(val)    bfin_write16(DMA12_PERIPHERAL_MAP, val)
1211 #define bfin_read_DMA12_CURR_X_COUNT()          bfin_read16(DMA12_CURR_X_COUNT)
1212 #define bfin_write_DMA12_CURR_X_COUNT(val)      bfin_write16(DMA12_CURR_X_COUNT, val)
1213 #define bfin_read_DMA12_CURR_Y_COUNT()          bfin_read16(DMA12_CURR_Y_COUNT)
1214 #define bfin_write_DMA12_CURR_Y_COUNT(val)      bfin_write16(DMA12_CURR_Y_COUNT, val)
1215
1216 /* DMA Channel 13 Registers */
1217
1218 #define bfin_read_DMA13_NEXT_DESC_PTR()         bfin_read32(DMA13_NEXT_DESC_PTR)
1219 #define bfin_write_DMA13_NEXT_DESC_PTR(val)     bfin_write32(DMA13_NEXT_DESC_PTR, val)
1220 #define bfin_read_DMA13_START_ADDR()            bfin_read32(DMA13_START_ADDR)
1221 #define bfin_write_DMA13_START_ADDR(val)        bfin_write32(DMA13_START_ADDR, val)
1222 #define bfin_read_DMA13_CONFIG()                bfin_read16(DMA13_CONFIG)
1223 #define bfin_write_DMA13_CONFIG(val)            bfin_write16(DMA13_CONFIG, val)
1224 #define bfin_read_DMA13_X_COUNT()               bfin_read16(DMA13_X_COUNT)
1225 #define bfin_write_DMA13_X_COUNT(val)           bfin_write16(DMA13_X_COUNT, val)
1226 #define bfin_read_DMA13_X_MODIFY()              bfin_read16(DMA13_X_MODIFY)
1227 #define bfin_write_DMA13_X_MODIFY(val)          bfin_write16(DMA13_X_MODIFY, val)
1228 #define bfin_read_DMA13_Y_COUNT()               bfin_read16(DMA13_Y_COUNT)
1229 #define bfin_write_DMA13_Y_COUNT(val)           bfin_write16(DMA13_Y_COUNT, val)
1230 #define bfin_read_DMA13_Y_MODIFY()              bfin_read16(DMA13_Y_MODIFY)
1231 #define bfin_write_DMA13_Y_MODIFY(val)          bfin_write16(DMA13_Y_MODIFY, val)
1232 #define bfin_read_DMA13_CURR_DESC_PTR()         bfin_read32(DMA13_CURR_DESC_PTR)
1233 #define bfin_write_DMA13_CURR_DESC_PTR(val)     bfin_write32(DMA13_CURR_DESC_PTR, val)
1234 #define bfin_read_DMA13_CURR_ADDR()             bfin_read32(DMA13_CURR_ADDR)
1235 #define bfin_write_DMA13_CURR_ADDR(val)         bfin_write32(DMA13_CURR_ADDR, val)
1236 #define bfin_read_DMA13_IRQ_STATUS()            bfin_read16(DMA13_IRQ_STATUS)
1237 #define bfin_write_DMA13_IRQ_STATUS(val)        bfin_write16(DMA13_IRQ_STATUS, val)
1238 #define bfin_read_DMA13_PERIPHERAL_MAP()        bfin_read16(DMA13_PERIPHERAL_MAP)
1239 #define bfin_write_DMA13_PERIPHERAL_MAP(val)    bfin_write16(DMA13_PERIPHERAL_MAP, val)
1240 #define bfin_read_DMA13_CURR_X_COUNT()          bfin_read16(DMA13_CURR_X_COUNT)
1241 #define bfin_write_DMA13_CURR_X_COUNT(val)      bfin_write16(DMA13_CURR_X_COUNT, val)
1242 #define bfin_read_DMA13_CURR_Y_COUNT()          bfin_read16(DMA13_CURR_Y_COUNT)
1243 #define bfin_write_DMA13_CURR_Y_COUNT(val)      bfin_write16(DMA13_CURR_Y_COUNT, val)
1244
1245 /* DMA Channel 14 Registers */
1246
1247 #define bfin_read_DMA14_NEXT_DESC_PTR()         bfin_read32(DMA14_NEXT_DESC_PTR)
1248 #define bfin_write_DMA14_NEXT_DESC_PTR(val)     bfin_write32(DMA14_NEXT_DESC_PTR, val)
1249 #define bfin_read_DMA14_START_ADDR()            bfin_read32(DMA14_START_ADDR)
1250 #define bfin_write_DMA14_START_ADDR(val)        bfin_write32(DMA14_START_ADDR, val)
1251 #define bfin_read_DMA14_CONFIG()                bfin_read16(DMA14_CONFIG)
1252 #define bfin_write_DMA14_CONFIG(val)            bfin_write16(DMA14_CONFIG, val)
1253 #define bfin_read_DMA14_X_COUNT()               bfin_read16(DMA14_X_COUNT)
1254 #define bfin_write_DMA14_X_COUNT(val)           bfin_write16(DMA14_X_COUNT, val)
1255 #define bfin_read_DMA14_X_MODIFY()              bfin_read16(DMA14_X_MODIFY)
1256 #define bfin_write_DMA14_X_MODIFY(val)          bfin_write16(DMA14_X_MODIFY, val)
1257 #define bfin_read_DMA14_Y_COUNT()               bfin_read16(DMA14_Y_COUNT)
1258 #define bfin_write_DMA14_Y_COUNT(val)           bfin_write16(DMA14_Y_COUNT, val)
1259 #define bfin_read_DMA14_Y_MODIFY()              bfin_read16(DMA14_Y_MODIFY)
1260 #define bfin_write_DMA14_Y_MODIFY(val)          bfin_write16(DMA14_Y_MODIFY, val)
1261 #define bfin_read_DMA14_CURR_DESC_PTR()         bfin_read32(DMA14_CURR_DESC_PTR)
1262 #define bfin_write_DMA14_CURR_DESC_PTR(val)     bfin_write32(DMA14_CURR_DESC_PTR, val)
1263 #define bfin_read_DMA14_CURR_ADDR()             bfin_read32(DMA14_CURR_ADDR)
1264 #define bfin_write_DMA14_CURR_ADDR(val)         bfin_write32(DMA14_CURR_ADDR, val)
1265 #define bfin_read_DMA14_IRQ_STATUS()            bfin_read16(DMA14_IRQ_STATUS)
1266 #define bfin_write_DMA14_IRQ_STATUS(val)        bfin_write16(DMA14_IRQ_STATUS, val)
1267 #define bfin_read_DMA14_PERIPHERAL_MAP()        bfin_read16(DMA14_PERIPHERAL_MAP)
1268 #define bfin_write_DMA14_PERIPHERAL_MAP(val)    bfin_write16(DMA14_PERIPHERAL_MAP, val)
1269 #define bfin_read_DMA14_CURR_X_COUNT()          bfin_read16(DMA14_CURR_X_COUNT)
1270 #define bfin_write_DMA14_CURR_X_COUNT(val)      bfin_write16(DMA14_CURR_X_COUNT, val)
1271 #define bfin_read_DMA14_CURR_Y_COUNT()          bfin_read16(DMA14_CURR_Y_COUNT)
1272 #define bfin_write_DMA14_CURR_Y_COUNT(val)      bfin_write16(DMA14_CURR_Y_COUNT, val)
1273
1274 /* DMA Channel 15 Registers */
1275
1276 #define bfin_read_DMA15_NEXT_DESC_PTR()         bfin_read32(DMA15_NEXT_DESC_PTR)
1277 #define bfin_write_DMA15_NEXT_DESC_PTR(val)     bfin_write32(DMA15_NEXT_DESC_PTR, val)
1278 #define bfin_read_DMA15_START_ADDR()            bfin_read32(DMA15_START_ADDR)
1279 #define bfin_write_DMA15_START_ADDR(val)        bfin_write32(DMA15_START_ADDR, val)
1280 #define bfin_read_DMA15_CONFIG()                bfin_read16(DMA15_CONFIG)
1281 #define bfin_write_DMA15_CONFIG(val)            bfin_write16(DMA15_CONFIG, val)
1282 #define bfin_read_DMA15_X_COUNT()               bfin_read16(DMA15_X_COUNT)
1283 #define bfin_write_DMA15_X_COUNT(val)           bfin_write16(DMA15_X_COUNT, val)
1284 #define bfin_read_DMA15_X_MODIFY()              bfin_read16(DMA15_X_MODIFY)
1285 #define bfin_write_DMA15_X_MODIFY(val)          bfin_write16(DMA15_X_MODIFY, val)
1286 #define bfin_read_DMA15_Y_COUNT()               bfin_read16(DMA15_Y_COUNT)
1287 #define bfin_write_DMA15_Y_COUNT(val)           bfin_write16(DMA15_Y_COUNT, val)
1288 #define bfin_read_DMA15_Y_MODIFY()              bfin_read16(DMA15_Y_MODIFY)
1289 #define bfin_write_DMA15_Y_MODIFY(val)          bfin_write16(DMA15_Y_MODIFY, val)
1290 #define bfin_read_DMA15_CURR_DESC_PTR()         bfin_read32(DMA15_CURR_DESC_PTR)
1291 #define bfin_write_DMA15_CURR_DESC_PTR(val)     bfin_write32(DMA15_CURR_DESC_PTR, val)
1292 #define bfin_read_DMA15_CURR_ADDR()             bfin_read32(DMA15_CURR_ADDR)
1293 #define bfin_write_DMA15_CURR_ADDR(val)         bfin_write32(DMA15_CURR_ADDR, val)
1294 #define bfin_read_DMA15_IRQ_STATUS()            bfin_read16(DMA15_IRQ_STATUS)
1295 #define bfin_write_DMA15_IRQ_STATUS(val)        bfin_write16(DMA15_IRQ_STATUS, val)
1296 #define bfin_read_DMA15_PERIPHERAL_MAP()        bfin_read16(DMA15_PERIPHERAL_MAP)
1297 #define bfin_write_DMA15_PERIPHERAL_MAP(val)    bfin_write16(DMA15_PERIPHERAL_MAP, val)
1298 #define bfin_read_DMA15_CURR_X_COUNT()          bfin_read16(DMA15_CURR_X_COUNT)
1299 #define bfin_write_DMA15_CURR_X_COUNT(val)      bfin_write16(DMA15_CURR_X_COUNT, val)
1300 #define bfin_read_DMA15_CURR_Y_COUNT()          bfin_read16(DMA15_CURR_Y_COUNT)
1301 #define bfin_write_DMA15_CURR_Y_COUNT(val)      bfin_write16(DMA15_CURR_Y_COUNT, val)
1302
1303 /* DMA Channel 16 Registers */
1304
1305 #define bfin_read_DMA16_NEXT_DESC_PTR()         bfin_read32(DMA16_NEXT_DESC_PTR)
1306 #define bfin_write_DMA16_NEXT_DESC_PTR(val)     bfin_write32(DMA16_NEXT_DESC_PTR, val)
1307 #define bfin_read_DMA16_START_ADDR()            bfin_read32(DMA16_START_ADDR)
1308 #define bfin_write_DMA16_START_ADDR(val)        bfin_write32(DMA16_START_ADDR, val)
1309 #define bfin_read_DMA16_CONFIG()                bfin_read16(DMA16_CONFIG)
1310 #define bfin_write_DMA16_CONFIG(val)            bfin_write16(DMA16_CONFIG, val)
1311 #define bfin_read_DMA16_X_COUNT()               bfin_read16(DMA16_X_COUNT)
1312 #define bfin_write_DMA16_X_COUNT(val)           bfin_write16(DMA16_X_COUNT, val)
1313 #define bfin_read_DMA16_X_MODIFY()              bfin_read16(DMA16_X_MODIFY)
1314 #define bfin_write_DMA16_X_MODIFY(val)          bfin_write16(DMA16_X_MODIFY, val)
1315 #define bfin_read_DMA16_Y_COUNT()               bfin_read16(DMA16_Y_COUNT)
1316 #define bfin_write_DMA16_Y_COUNT(val)           bfin_write16(DMA16_Y_COUNT, val)
1317 #define bfin_read_DMA16_Y_MODIFY()              bfin_read16(DMA16_Y_MODIFY)
1318 #define bfin_write_DMA16_Y_MODIFY(val)          bfin_write16(DMA16_Y_MODIFY, val)
1319 #define bfin_read_DMA16_CURR_DESC_PTR()         bfin_read32(DMA16_CURR_DESC_PTR)
1320 #define bfin_write_DMA16_CURR_DESC_PTR(val)     bfin_write32(DMA16_CURR_DESC_PTR, val)
1321 #define bfin_read_DMA16_CURR_ADDR()             bfin_read32(DMA16_CURR_ADDR)
1322 #define bfin_write_DMA16_CURR_ADDR(val)         bfin_write32(DMA16_CURR_ADDR, val)
1323 #define bfin_read_DMA16_IRQ_STATUS()            bfin_read16(DMA16_IRQ_STATUS)
1324 #define bfin_write_DMA16_IRQ_STATUS(val)        bfin_write16(DMA16_IRQ_STATUS, val)
1325 #define bfin_read_DMA16_PERIPHERAL_MAP()        bfin_read16(DMA16_PERIPHERAL_MAP)
1326 #define bfin_write_DMA16_PERIPHERAL_MAP(val)    bfin_write16(DMA16_PERIPHERAL_MAP, val)
1327 #define bfin_read_DMA16_CURR_X_COUNT()          bfin_read16(DMA16_CURR_X_COUNT)
1328 #define bfin_write_DMA16_CURR_X_COUNT(val)      bfin_write16(DMA16_CURR_X_COUNT, val)
1329 #define bfin_read_DMA16_CURR_Y_COUNT()          bfin_read16(DMA16_CURR_Y_COUNT)
1330 #define bfin_write_DMA16_CURR_Y_COUNT(val)      bfin_write16(DMA16_CURR_Y_COUNT, val)
1331
1332 /* DMA Channel 17 Registers */
1333
1334 #define bfin_read_DMA17_NEXT_DESC_PTR()         bfin_read32(DMA17_NEXT_DESC_PTR)
1335 #define bfin_write_DMA17_NEXT_DESC_PTR(val)     bfin_write32(DMA17_NEXT_DESC_PTR, val)
1336 #define bfin_read_DMA17_START_ADDR()            bfin_read32(DMA17_START_ADDR)
1337 #define bfin_write_DMA17_START_ADDR(val)        bfin_write32(DMA17_START_ADDR, val)
1338 #define bfin_read_DMA17_CONFIG()                bfin_read16(DMA17_CONFIG)
1339 #define bfin_write_DMA17_CONFIG(val)            bfin_write16(DMA17_CONFIG, val)
1340 #define bfin_read_DMA17_X_COUNT()               bfin_read16(DMA17_X_COUNT)
1341 #define bfin_write_DMA17_X_COUNT(val)           bfin_write16(DMA17_X_COUNT, val)
1342 #define bfin_read_DMA17_X_MODIFY()              bfin_read16(DMA17_X_MODIFY)
1343 #define bfin_write_DMA17_X_MODIFY(val)          bfin_write16(DMA17_X_MODIFY, val)
1344 #define bfin_read_DMA17_Y_COUNT()               bfin_read16(DMA17_Y_COUNT)
1345 #define bfin_write_DMA17_Y_COUNT(val)           bfin_write16(DMA17_Y_COUNT, val)
1346 #define bfin_read_DMA17_Y_MODIFY()              bfin_read16(DMA17_Y_MODIFY)
1347 #define bfin_write_DMA17_Y_MODIFY(val)          bfin_write16(DMA17_Y_MODIFY, val)
1348 #define bfin_read_DMA17_CURR_DESC_PTR()         bfin_read32(DMA17_CURR_DESC_PTR)
1349 #define bfin_write_DMA17_CURR_DESC_PTR(val)     bfin_write32(DMA17_CURR_DESC_PTR, val)
1350 #define bfin_read_DMA17_CURR_ADDR()             bfin_read32(DMA17_CURR_ADDR)
1351 #define bfin_write_DMA17_CURR_ADDR(val)         bfin_write32(DMA17_CURR_ADDR, val)
1352 #define bfin_read_DMA17_IRQ_STATUS()            bfin_read16(DMA17_IRQ_STATUS)
1353 #define bfin_write_DMA17_IRQ_STATUS(val)        bfin_write16(DMA17_IRQ_STATUS, val)
1354 #define bfin_read_DMA17_PERIPHERAL_MAP()        bfin_read16(DMA17_PERIPHERAL_MAP)
1355 #define bfin_write_DMA17_PERIPHERAL_MAP(val)    bfin_write16(DMA17_PERIPHERAL_MAP, val)
1356 #define bfin_read_DMA17_CURR_X_COUNT()          bfin_read16(DMA17_CURR_X_COUNT)
1357 #define bfin_write_DMA17_CURR_X_COUNT(val)      bfin_write16(DMA17_CURR_X_COUNT, val)
1358 #define bfin_read_DMA17_CURR_Y_COUNT()          bfin_read16(DMA17_CURR_Y_COUNT)
1359 #define bfin_write_DMA17_CURR_Y_COUNT(val)      bfin_write16(DMA17_CURR_Y_COUNT, val)
1360
1361 /* DMA Channel 18 Registers */
1362
1363 #define bfin_read_DMA18_NEXT_DESC_PTR()         bfin_read32(DMA18_NEXT_DESC_PTR)
1364 #define bfin_write_DMA18_NEXT_DESC_PTR(val)     bfin_write32(DMA18_NEXT_DESC_PTR, val)
1365 #define bfin_read_DMA18_START_ADDR()            bfin_read32(DMA18_START_ADDR)
1366 #define bfin_write_DMA18_START_ADDR(val)        bfin_write32(DMA18_START_ADDR, val)
1367 #define bfin_read_DMA18_CONFIG()                bfin_read16(DMA18_CONFIG)
1368 #define bfin_write_DMA18_CONFIG(val)            bfin_write16(DMA18_CONFIG, val)
1369 #define bfin_read_DMA18_X_COUNT()               bfin_read16(DMA18_X_COUNT)
1370 #define bfin_write_DMA18_X_COUNT(val)           bfin_write16(DMA18_X_COUNT, val)
1371 #define bfin_read_DMA18_X_MODIFY()              bfin_read16(DMA18_X_MODIFY)
1372 #define bfin_write_DMA18_X_MODIFY(val)          bfin_write16(DMA18_X_MODIFY, val)
1373 #define bfin_read_DMA18_Y_COUNT()               bfin_read16(DMA18_Y_COUNT)
1374 #define bfin_write_DMA18_Y_COUNT(val)           bfin_write16(DMA18_Y_COUNT, val)
1375 #define bfin_read_DMA18_Y_MODIFY()              bfin_read16(DMA18_Y_MODIFY)
1376 #define bfin_write_DMA18_Y_MODIFY(val)          bfin_write16(DMA18_Y_MODIFY, val)
1377 #define bfin_read_DMA18_CURR_DESC_PTR()         bfin_read32(DMA18_CURR_DESC_PTR)
1378 #define bfin_write_DMA18_CURR_DESC_PTR(val)     bfin_write32(DMA18_CURR_DESC_PTR, val)
1379 #define bfin_read_DMA18_CURR_ADDR()             bfin_read32(DMA18_CURR_ADDR)
1380 #define bfin_write_DMA18_CURR_ADDR(val)         bfin_write32(DMA18_CURR_ADDR, val)
1381 #define bfin_read_DMA18_IRQ_STATUS()            bfin_read16(DMA18_IRQ_STATUS)
1382 #define bfin_write_DMA18_IRQ_STATUS(val)        bfin_write16(DMA18_IRQ_STATUS, val)
1383 #define bfin_read_DMA18_PERIPHERAL_MAP()        bfin_read16(DMA18_PERIPHERAL_MAP)
1384 #define bfin_write_DMA18_PERIPHERAL_MAP(val)    bfin_write16(DMA18_PERIPHERAL_MAP, val)
1385 #define bfin_read_DMA18_CURR_X_COUNT()          bfin_read16(DMA18_CURR_X_COUNT)
1386 #define bfin_write_DMA18_CURR_X_COUNT(val)      bfin_write16(DMA18_CURR_X_COUNT, val)
1387 #define bfin_read_DMA18_CURR_Y_COUNT()          bfin_read16(DMA18_CURR_Y_COUNT)
1388 #define bfin_write_DMA18_CURR_Y_COUNT(val)      bfin_write16(DMA18_CURR_Y_COUNT, val)
1389
1390 /* DMA Channel 19 Registers */
1391
1392 #define bfin_read_DMA19_NEXT_DESC_PTR()         bfin_read32(DMA19_NEXT_DESC_PTR)
1393 #define bfin_write_DMA19_NEXT_DESC_PTR(val)     bfin_write32(DMA19_NEXT_DESC_PTR, val)
1394 #define bfin_read_DMA19_START_ADDR()            bfin_read32(DMA19_START_ADDR)
1395 #define bfin_write_DMA19_START_ADDR(val)        bfin_write32(DMA19_START_ADDR, val)
1396 #define bfin_read_DMA19_CONFIG()                bfin_read16(DMA19_CONFIG)
1397 #define bfin_write_DMA19_CONFIG(val)            bfin_write16(DMA19_CONFIG, val)
1398 #define bfin_read_DMA19_X_COUNT()               bfin_read16(DMA19_X_COUNT)
1399 #define bfin_write_DMA19_X_COUNT(val)           bfin_write16(DMA19_X_COUNT, val)
1400 #define bfin_read_DMA19_X_MODIFY()              bfin_read16(DMA19_X_MODIFY)
1401 #define bfin_write_DMA19_X_MODIFY(val)          bfin_write16(DMA19_X_MODIFY, val)
1402 #define bfin_read_DMA19_Y_COUNT()               bfin_read16(DMA19_Y_COUNT)
1403 #define bfin_write_DMA19_Y_COUNT(val)           bfin_write16(DMA19_Y_COUNT, val)
1404 #define bfin_read_DMA19_Y_MODIFY()              bfin_read16(DMA19_Y_MODIFY)
1405 #define bfin_write_DMA19_Y_MODIFY(val)          bfin_write16(DMA19_Y_MODIFY, val)
1406 #define bfin_read_DMA19_CURR_DESC_PTR()         bfin_read32(DMA19_CURR_DESC_PTR)
1407 #define bfin_write_DMA19_CURR_DESC_PTR(val)     bfin_write32(DMA19_CURR_DESC_PTR, val)
1408 #define bfin_read_DMA19_CURR_ADDR()             bfin_read32(DMA19_CURR_ADDR)
1409 #define bfin_write_DMA19_CURR_ADDR(val)         bfin_write32(DMA19_CURR_ADDR, val)
1410 #define bfin_read_DMA19_IRQ_STATUS()            bfin_read16(DMA19_IRQ_STATUS)
1411 #define bfin_write_DMA19_IRQ_STATUS(val)        bfin_write16(DMA19_IRQ_STATUS, val)
1412 #define bfin_read_DMA19_PERIPHERAL_MAP()        bfin_read16(DMA19_PERIPHERAL_MAP)
1413 #define bfin_write_DMA19_PERIPHERAL_MAP(val)    bfin_write16(DMA19_PERIPHERAL_MAP, val)
1414 #define bfin_read_DMA19_CURR_X_COUNT()          bfin_read16(DMA19_CURR_X_COUNT)
1415 #define bfin_write_DMA19_CURR_X_COUNT(val)      bfin_write16(DMA19_CURR_X_COUNT, val)
1416 #define bfin_read_DMA19_CURR_Y_COUNT()          bfin_read16(DMA19_CURR_Y_COUNT)
1417 #define bfin_write_DMA19_CURR_Y_COUNT(val)      bfin_write16(DMA19_CURR_Y_COUNT, val)
1418
1419 /* DMA Channel 20 Registers */
1420
1421 #define bfin_read_DMA20_NEXT_DESC_PTR()         bfin_read32(DMA20_NEXT_DESC_PTR)
1422 #define bfin_write_DMA20_NEXT_DESC_PTR(val)     bfin_write32(DMA20_NEXT_DESC_PTR, val)
1423 #define bfin_read_DMA20_START_ADDR()            bfin_read32(DMA20_START_ADDR)
1424 #define bfin_write_DMA20_START_ADDR(val)        bfin_write32(DMA20_START_ADDR, val)
1425 #define bfin_read_DMA20_CONFIG()                bfin_read16(DMA20_CONFIG)
1426 #define bfin_write_DMA20_CONFIG(val)            bfin_write16(DMA20_CONFIG, val)
1427 #define bfin_read_DMA20_X_COUNT()               bfin_read16(DMA20_X_COUNT)
1428 #define bfin_write_DMA20_X_COUNT(val)           bfin_write16(DMA20_X_COUNT, val)
1429 #define bfin_read_DMA20_X_MODIFY()              bfin_read16(DMA20_X_MODIFY)
1430 #define bfin_write_DMA20_X_MODIFY(val)          bfin_write16(DMA20_X_MODIFY, val)
1431 #define bfin_read_DMA20_Y_COUNT()               bfin_read16(DMA20_Y_COUNT)
1432 #define bfin_write_DMA20_Y_COUNT(val)           bfin_write16(DMA20_Y_COUNT, val)
1433 #define bfin_read_DMA20_Y_MODIFY()              bfin_read16(DMA20_Y_MODIFY)
1434 #define bfin_write_DMA20_Y_MODIFY(val)          bfin_write16(DMA20_Y_MODIFY, val)
1435 #define bfin_read_DMA20_CURR_DESC_PTR()         bfin_read32(DMA20_CURR_DESC_PTR)
1436 #define bfin_write_DMA20_CURR_DESC_PTR(val)     bfin_write32(DMA20_CURR_DESC_PTR, val)
1437 #define bfin_read_DMA20_CURR_ADDR()             bfin_read32(DMA20_CURR_ADDR)
1438 #define bfin_write_DMA20_CURR_ADDR(val)         bfin_write32(DMA20_CURR_ADDR, val)
1439 #define bfin_read_DMA20_IRQ_STATUS()            bfin_read16(DMA20_IRQ_STATUS)
1440 #define bfin_write_DMA20_IRQ_STATUS(val)        bfin_write16(DMA20_IRQ_STATUS, val)
1441 #define bfin_read_DMA20_PERIPHERAL_MAP()        bfin_read16(DMA20_PERIPHERAL_MAP)
1442 #define bfin_write_DMA20_PERIPHERAL_MAP(val)    bfin_write16(DMA20_PERIPHERAL_MAP, val)
1443 #define bfin_read_DMA20_CURR_X_COUNT()          bfin_read16(DMA20_CURR_X_COUNT)
1444 #define bfin_write_DMA20_CURR_X_COUNT(val)      bfin_write16(DMA20_CURR_X_COUNT, val)
1445 #define bfin_read_DMA20_CURR_Y_COUNT()          bfin_read16(DMA20_CURR_Y_COUNT)
1446 #define bfin_write_DMA20_CURR_Y_COUNT(val)      bfin_write16(DMA20_CURR_Y_COUNT, val)
1447
1448 /* DMA Channel 21 Registers */
1449
1450 #define bfin_read_DMA21_NEXT_DESC_PTR()         bfin_read32(DMA21_NEXT_DESC_PTR)
1451 #define bfin_write_DMA21_NEXT_DESC_PTR(val)     bfin_write32(DMA21_NEXT_DESC_PTR, val)
1452 #define bfin_read_DMA21_START_ADDR()            bfin_read32(DMA21_START_ADDR)
1453 #define bfin_write_DMA21_START_ADDR(val)        bfin_write32(DMA21_START_ADDR, val)
1454 #define bfin_read_DMA21_CONFIG()                bfin_read16(DMA21_CONFIG)
1455 #define bfin_write_DMA21_CONFIG(val)            bfin_write16(DMA21_CONFIG, val)
1456 #define bfin_read_DMA21_X_COUNT()               bfin_read16(DMA21_X_COUNT)
1457 #define bfin_write_DMA21_X_COUNT(val)           bfin_write16(DMA21_X_COUNT, val)
1458 #define bfin_read_DMA21_X_MODIFY()              bfin_read16(DMA21_X_MODIFY)
1459 #define bfin_write_DMA21_X_MODIFY(val)          bfin_write16(DMA21_X_MODIFY, val)
1460 #define bfin_read_DMA21_Y_COUNT()               bfin_read16(DMA21_Y_COUNT)
1461 #define bfin_write_DMA21_Y_COUNT(val)           bfin_write16(DMA21_Y_COUNT, val)
1462 #define bfin_read_DMA21_Y_MODIFY()              bfin_read16(DMA21_Y_MODIFY)
1463 #define bfin_write_DMA21_Y_MODIFY(val)          bfin_write16(DMA21_Y_MODIFY, val)
1464 #define bfin_read_DMA21_CURR_DESC_PTR()         bfin_read32(DMA21_CURR_DESC_PTR)
1465 #define bfin_write_DMA21_CURR_DESC_PTR(val)     bfin_write32(DMA21_CURR_DESC_PTR, val)
1466 #define bfin_read_DMA21_CURR_ADDR()             bfin_read32(DMA21_CURR_ADDR)
1467 #define bfin_write_DMA21_CURR_ADDR(val)         bfin_write32(DMA21_CURR_ADDR, val)
1468 #define bfin_read_DMA21_IRQ_STATUS()            bfin_read16(DMA21_IRQ_STATUS)
1469 #define bfin_write_DMA21_IRQ_STATUS(val)        bfin_write16(DMA21_IRQ_STATUS, val)
1470 #define bfin_read_DMA21_PERIPHERAL_MAP()        bfin_read16(DMA21_PERIPHERAL_MAP)
1471 #define bfin_write_DMA21_PERIPHERAL_MAP(val)    bfin_write16(DMA21_PERIPHERAL_MAP, val)
1472 #define bfin_read_DMA21_CURR_X_COUNT()          bfin_read16(DMA21_CURR_X_COUNT)
1473 #define bfin_write_DMA21_CURR_X_COUNT(val)      bfin_write16(DMA21_CURR_X_COUNT, val)
1474 #define bfin_read_DMA21_CURR_Y_COUNT()          bfin_read16(DMA21_CURR_Y_COUNT)
1475 #define bfin_write_DMA21_CURR_Y_COUNT(val)      bfin_write16(DMA21_CURR_Y_COUNT, val)
1476
1477 /* DMA Channel 22 Registers */
1478
1479 #define bfin_read_DMA22_NEXT_DESC_PTR()         bfin_read32(DMA22_NEXT_DESC_PTR)
1480 #define bfin_write_DMA22_NEXT_DESC_PTR(val)     bfin_write32(DMA22_NEXT_DESC_PTR, val)
1481 #define bfin_read_DMA22_START_ADDR()            bfin_read32(DMA22_START_ADDR)
1482 #define bfin_write_DMA22_START_ADDR(val)        bfin_write32(DMA22_START_ADDR, val)
1483 #define bfin_read_DMA22_CONFIG()                bfin_read16(DMA22_CONFIG)
1484 #define bfin_write_DMA22_CONFIG(val)            bfin_write16(DMA22_CONFIG, val)
1485 #define bfin_read_DMA22_X_COUNT()               bfin_read16(DMA22_X_COUNT)
1486 #define bfin_write_DMA22_X_COUNT(val)           bfin_write16(DMA22_X_COUNT, val)
1487 #define bfin_read_DMA22_X_MODIFY()              bfin_read16(DMA22_X_MODIFY)
1488 #define bfin_write_DMA22_X_MODIFY(val)          bfin_write16(DMA22_X_MODIFY, val)
1489 #define bfin_read_DMA22_Y_COUNT()               bfin_read16(DMA22_Y_COUNT)
1490 #define bfin_write_DMA22_Y_COUNT(val)           bfin_write16(DMA22_Y_COUNT, val)
1491 #define bfin_read_DMA22_Y_MODIFY()              bfin_read16(DMA22_Y_MODIFY)
1492 #define bfin_write_DMA22_Y_MODIFY(val)          bfin_write16(DMA22_Y_MODIFY, val)
1493 #define bfin_read_DMA22_CURR_DESC_PTR()         bfin_read32(DMA22_CURR_DESC_PTR)
1494 #define bfin_write_DMA22_CURR_DESC_PTR(val)     bfin_write32(DMA22_CURR_DESC_PTR, val)
1495 #define bfin_read_DMA22_CURR_ADDR()             bfin_read32(DMA22_CURR_ADDR)
1496 #define bfin_write_DMA22_CURR_ADDR(val)         bfin_write32(DMA22_CURR_ADDR, val)
1497 #define bfin_read_DMA22_IRQ_STATUS()            bfin_read16(DMA22_IRQ_STATUS)
1498 #define bfin_write_DMA22_IRQ_STATUS(val)        bfin_write16(DMA22_IRQ_STATUS, val)
1499 #define bfin_read_DMA22_PERIPHERAL_MAP()        bfin_read16(DMA22_PERIPHERAL_MAP)
1500 #define bfin_write_DMA22_PERIPHERAL_MAP(val)    bfin_write16(DMA22_PERIPHERAL_MAP, val)
1501 #define bfin_read_DMA22_CURR_X_COUNT()          bfin_read16(DMA22_CURR_X_COUNT)
1502 #define bfin_write_DMA22_CURR_X_COUNT(val)      bfin_write16(DMA22_CURR_X_COUNT, val)
1503 #define bfin_read_DMA22_CURR_Y_COUNT()          bfin_read16(DMA22_CURR_Y_COUNT)
1504 #define bfin_write_DMA22_CURR_Y_COUNT(val)      bfin_write16(DMA22_CURR_Y_COUNT, val)
1505
1506 /* DMA Channel 23 Registers */
1507
1508 #define bfin_read_DMA23_NEXT_DESC_PTR()                 bfin_read32(DMA23_NEXT_DESC_PTR)
1509 #define bfin_write_DMA23_NEXT_DESC_PTR(val)             bfin_write32(DMA23_NEXT_DESC_PTR, val)
1510 #define bfin_read_DMA23_START_ADDR()                    bfin_read32(DMA23_START_ADDR)
1511 #define bfin_write_DMA23_START_ADDR(val)                bfin_write32(DMA23_START_ADDR, val)
1512 #define bfin_read_DMA23_CONFIG()                        bfin_read16(DMA23_CONFIG)
1513 #define bfin_write_DMA23_CONFIG(val)                    bfin_write16(DMA23_CONFIG, val)
1514 #define bfin_read_DMA23_X_COUNT()                       bfin_read16(DMA23_X_COUNT)
1515 #define bfin_write_DMA23_X_COUNT(val)                   bfin_write16(DMA23_X_COUNT, val)
1516 #define bfin_read_DMA23_X_MODIFY()                      bfin_read16(DMA23_X_MODIFY)
1517 #define bfin_write_DMA23_X_MODIFY(val)                  bfin_write16(DMA23_X_MODIFY, val)
1518 #define bfin_read_DMA23_Y_COUNT()                       bfin_read16(DMA23_Y_COUNT)
1519 #define bfin_write_DMA23_Y_COUNT(val)                   bfin_write16(DMA23_Y_COUNT, val)
1520 #define bfin_read_DMA23_Y_MODIFY()                      bfin_read16(DMA23_Y_MODIFY)
1521 #define bfin_write_DMA23_Y_MODIFY(val)                  bfin_write16(DMA23_Y_MODIFY, val)
1522 #define bfin_read_DMA23_CURR_DESC_PTR()                 bfin_read32(DMA23_CURR_DESC_PTR)
1523 #define bfin_write_DMA23_CURR_DESC_PTR(val)             bfin_write32(DMA23_CURR_DESC_PTR, val)
1524 #define bfin_read_DMA23_CURR_ADDR()                     bfin_read32(DMA23_CURR_ADDR)
1525 #define bfin_write_DMA23_CURR_ADDR(val)                 bfin_write32(DMA23_CURR_ADDR, val)
1526 #define bfin_read_DMA23_IRQ_STATUS()                    bfin_read16(DMA23_IRQ_STATUS)
1527 #define bfin_write_DMA23_IRQ_STATUS(val)                bfin_write16(DMA23_IRQ_STATUS, val)
1528 #define bfin_read_DMA23_PERIPHERAL_MAP()                bfin_read16(DMA23_PERIPHERAL_MAP)
1529 #define bfin_write_DMA23_PERIPHERAL_MAP(val)            bfin_write16(DMA23_PERIPHERAL_MAP, val)
1530 #define bfin_read_DMA23_CURR_X_COUNT()                  bfin_read16(DMA23_CURR_X_COUNT)
1531 #define bfin_write_DMA23_CURR_X_COUNT(val)              bfin_write16(DMA23_CURR_X_COUNT, val)
1532 #define bfin_read_DMA23_CURR_Y_COUNT()                  bfin_read16(DMA23_CURR_Y_COUNT)
1533 #define bfin_write_DMA23_CURR_Y_COUNT(val)              bfin_write16(DMA23_CURR_Y_COUNT, val)
1534
1535 /* MDMA Stream 2 Registers */
1536
1537 #define bfin_read_MDMA_D2_NEXT_DESC_PTR()               bfin_read32(MDMA_D2_NEXT_DESC_PTR)
1538 #define bfin_write_MDMA_D2_NEXT_DESC_PTR(val)           bfin_write32(MDMA_D2_NEXT_DESC_PTR, val)
1539 #define bfin_read_MDMA_D2_START_ADDR()                  bfin_read32(MDMA_D2_START_ADDR)
1540 #define bfin_write_MDMA_D2_START_ADDR(val)              bfin_write32(MDMA_D2_START_ADDR, val)
1541 #define bfin_read_MDMA_D2_CONFIG()                      bfin_read16(MDMA_D2_CONFIG)
1542 #define bfin_write_MDMA_D2_CONFIG(val)                  bfin_write16(MDMA_D2_CONFIG, val)
1543 #define bfin_read_MDMA_D2_X_COUNT()                     bfin_read16(MDMA_D2_X_COUNT)
1544 #define bfin_write_MDMA_D2_X_COUNT(val)                 bfin_write16(MDMA_D2_X_COUNT, val)
1545 #define bfin_read_MDMA_D2_X_MODIFY()                    bfin_read16(MDMA_D2_X_MODIFY)
1546 #define bfin_write_MDMA_D2_X_MODIFY(val)                bfin_write16(MDMA_D2_X_MODIFY, val)
1547 #define bfin_read_MDMA_D2_Y_COUNT()                     bfin_read16(MDMA_D2_Y_COUNT)
1548 #define bfin_write_MDMA_D2_Y_COUNT(val)                 bfin_write16(MDMA_D2_Y_COUNT, val)
1549 #define bfin_read_MDMA_D2_Y_MODIFY()                    bfin_read16(MDMA_D2_Y_MODIFY)
1550 #define bfin_write_MDMA_D2_Y_MODIFY(val)                bfin_write16(MDMA_D2_Y_MODIFY, val)
1551 #define bfin_read_MDMA_D2_CURR_DESC_PTR()               bfin_read32(MDMA_D2_CURR_DESC_PTR)
1552 #define bfin_write_MDMA_D2_CURR_DESC_PTR(val)           bfin_write32(MDMA_D2_CURR_DESC_PTR, val)
1553 #define bfin_read_MDMA_D2_CURR_ADDR()                   bfin_read32(MDMA_D2_CURR_ADDR)
1554 #define bfin_write_MDMA_D2_CURR_ADDR(val)               bfin_write32(MDMA_D2_CURR_ADDR, val)
1555 #define bfin_read_MDMA_D2_IRQ_STATUS()                  bfin_read16(MDMA_D2_IRQ_STATUS)
1556 #define bfin_write_MDMA_D2_IRQ_STATUS(val)              bfin_write16(MDMA_D2_IRQ_STATUS, val)
1557 #define bfin_read_MDMA_D2_PERIPHERAL_MAP()              bfin_read16(MDMA_D2_PERIPHERAL_MAP)
1558 #define bfin_write_MDMA_D2_PERIPHERAL_MAP(val)          bfin_write16(MDMA_D2_PERIPHERAL_MAP, val)
1559 #define bfin_read_MDMA_D2_CURR_X_COUNT()                bfin_read16(MDMA_D2_CURR_X_COUNT)
1560 #define bfin_write_MDMA_D2_CURR_X_COUNT(val)            bfin_write16(MDMA_D2_CURR_X_COUNT, val)
1561 #define bfin_read_MDMA_D2_CURR_Y_COUNT()                bfin_read16(MDMA_D2_CURR_Y_COUNT)
1562 #define bfin_write_MDMA_D2_CURR_Y_COUNT(val)            bfin_write16(MDMA_D2_CURR_Y_COUNT, val)
1563 #define bfin_read_MDMA_S2_NEXT_DESC_PTR()               bfin_read32(MDMA_S2_NEXT_DESC_PTR)
1564 #define bfin_write_MDMA_S2_NEXT_DESC_PTR(val)           bfin_write32(MDMA_S2_NEXT_DESC_PTR, val)
1565 #define bfin_read_MDMA_S2_START_ADDR()                  bfin_read32(MDMA_S2_START_ADDR)
1566 #define bfin_write_MDMA_S2_START_ADDR(val)              bfin_write32(MDMA_S2_START_ADDR, val)
1567 #define bfin_read_MDMA_S2_CONFIG()                      bfin_read16(MDMA_S2_CONFIG)
1568 #define bfin_write_MDMA_S2_CONFIG(val)                  bfin_write16(MDMA_S2_CONFIG, val)
1569 #define bfin_read_MDMA_S2_X_COUNT()                     bfin_read16(MDMA_S2_X_COUNT)
1570 #define bfin_write_MDMA_S2_X_COUNT(val)                 bfin_write16(MDMA_S2_X_COUNT, val)
1571 #define bfin_read_MDMA_S2_X_MODIFY()                    bfin_read16(MDMA_S2_X_MODIFY)
1572 #define bfin_write_MDMA_S2_X_MODIFY(val)                bfin_write16(MDMA_S2_X_MODIFY, val)
1573 #define bfin_read_MDMA_S2_Y_COUNT()                     bfin_read16(MDMA_S2_Y_COUNT)
1574 #define bfin_write_MDMA_S2_Y_COUNT(val)                 bfin_write16(MDMA_S2_Y_COUNT, val)
1575 #define bfin_read_MDMA_S2_Y_MODIFY()                    bfin_read16(MDMA_S2_Y_MODIFY)
1576 #define bfin_write_MDMA_S2_Y_MODIFY(val)                bfin_write16(MDMA_S2_Y_MODIFY, val)
1577 #define bfin_read_MDMA_S2_CURR_DESC_PTR()               bfin_read32(MDMA_S2_CURR_DESC_PTR)
1578 #define bfin_write_MDMA_S2_CURR_DESC_PTR(val)           bfin_write32(MDMA_S2_CURR_DESC_PTR, val)
1579 #define bfin_read_MDMA_S2_CURR_ADDR()                   bfin_read32(MDMA_S2_CURR_ADDR)
1580 #define bfin_write_MDMA_S2_CURR_ADDR(val)               bfin_write32(MDMA_S2_CURR_ADDR, val)
1581 #define bfin_read_MDMA_S2_IRQ_STATUS()                  bfin_read16(MDMA_S2_IRQ_STATUS)
1582 #define bfin_write_MDMA_S2_IRQ_STATUS(val)              bfin_write16(MDMA_S2_IRQ_STATUS, val)
1583 #define bfin_read_MDMA_S2_PERIPHERAL_MAP()              bfin_read16(MDMA_S2_PERIPHERAL_MAP)
1584 #define bfin_write_MDMA_S2_PERIPHERAL_MAP(val)          bfin_write16(MDMA_S2_PERIPHERAL_MAP, val)
1585 #define bfin_read_MDMA_S2_CURR_X_COUNT()                bfin_read16(MDMA_S2_CURR_X_COUNT)
1586 #define bfin_write_MDMA_S2_CURR_X_COUNT(val)            bfin_write16(MDMA_S2_CURR_X_COUNT, val)
1587 #define bfin_read_MDMA_S2_CURR_Y_COUNT()                bfin_read16(MDMA_S2_CURR_Y_COUNT)
1588 #define bfin_write_MDMA_S2_CURR_Y_COUNT(val)            bfin_write16(MDMA_S2_CURR_Y_COUNT, val)
1589
1590 /* MDMA Stream 3 Registers */
1591
1592 #define bfin_read_MDMA_D3_NEXT_DESC_PTR()               bfin_read32(MDMA_D3_NEXT_DESC_PTR)
1593 #define bfin_write_MDMA_D3_NEXT_DESC_PTR(val)           bfin_write32(MDMA_D3_NEXT_DESC_PTR, val)
1594 #define bfin_read_MDMA_D3_START_ADDR()                  bfin_read32(MDMA_D3_START_ADDR)
1595 #define bfin_write_MDMA_D3_START_ADDR(val)              bfin_write32(MDMA_D3_START_ADDR, val)
1596 #define bfin_read_MDMA_D3_CONFIG()                      bfin_read16(MDMA_D3_CONFIG)
1597 #define bfin_write_MDMA_D3_CONFIG(val)                  bfin_write16(MDMA_D3_CONFIG, val)
1598 #define bfin_read_MDMA_D3_X_COUNT()                     bfin_read16(MDMA_D3_X_COUNT)
1599 #define bfin_write_MDMA_D3_X_COUNT(val)                 bfin_write16(MDMA_D3_X_COUNT, val)
1600 #define bfin_read_MDMA_D3_X_MODIFY()                    bfin_read16(MDMA_D3_X_MODIFY)
1601 #define bfin_write_MDMA_D3_X_MODIFY(val)                bfin_write16(MDMA_D3_X_MODIFY, val)
1602 #define bfin_read_MDMA_D3_Y_COUNT()                     bfin_read16(MDMA_D3_Y_COUNT)
1603 #define bfin_write_MDMA_D3_Y_COUNT(val)                 bfin_write16(MDMA_D3_Y_COUNT, val)
1604 #define bfin_read_MDMA_D3_Y_MODIFY()                    bfin_read16(MDMA_D3_Y_MODIFY)
1605 #define bfin_write_MDMA_D3_Y_MODIFY(val)                bfin_write16(MDMA_D3_Y_MODIFY, val)
1606 #define bfin_read_MDMA_D3_CURR_DESC_PTR()               bfin_read32(MDMA_D3_CURR_DESC_PTR)
1607 #define bfin_write_MDMA_D3_CURR_DESC_PTR(val)           bfin_write32(MDMA_D3_CURR_DESC_PTR, val)
1608 #define bfin_read_MDMA_D3_CURR_ADDR()                   bfin_read32(MDMA_D3_CURR_ADDR)
1609 #define bfin_write_MDMA_D3_CURR_ADDR(val)               bfin_write32(MDMA_D3_CURR_ADDR, val)
1610 #define bfin_read_MDMA_D3_IRQ_STATUS()                  bfin_read16(MDMA_D3_IRQ_STATUS)
1611 #define bfin_write_MDMA_D3_IRQ_STATUS(val)              bfin_write16(MDMA_D3_IRQ_STATUS, val)
1612 #define bfin_read_MDMA_D3_PERIPHERAL_MAP()              bfin_read16(MDMA_D3_PERIPHERAL_MAP)
1613 #define bfin_write_MDMA_D3_PERIPHERAL_MAP(val)          bfin_write16(MDMA_D3_PERIPHERAL_MAP, val)
1614 #define bfin_read_MDMA_D3_CURR_X_COUNT()                bfin_read16(MDMA_D3_CURR_X_COUNT)
1615 #define bfin_write_MDMA_D3_CURR_X_COUNT(val)            bfin_write16(MDMA_D3_CURR_X_COUNT, val)
1616 #define bfin_read_MDMA_D3_CURR_Y_COUNT()                bfin_read16(MDMA_D3_CURR_Y_COUNT)
1617 #define bfin_write_MDMA_D3_CURR_Y_COUNT(val)            bfin_write16(MDMA_D3_CURR_Y_COUNT, val)
1618 #define bfin_read_MDMA_S3_NEXT_DESC_PTR()               bfin_read32(MDMA_S3_NEXT_DESC_PTR)
1619 #define bfin_write_MDMA_S3_NEXT_DESC_PTR(val)           bfin_write32(MDMA_S3_NEXT_DESC_PTR, val)
1620 #define bfin_read_MDMA_S3_START_ADDR()                  bfin_read32(MDMA_S3_START_ADDR)
1621 #define bfin_write_MDMA_S3_START_ADDR(val)              bfin_write32(MDMA_S3_START_ADDR, val)
1622 #define bfin_read_MDMA_S3_CONFIG()                      bfin_read16(MDMA_S3_CONFIG)
1623 #define bfin_write_MDMA_S3_CONFIG(val)                  bfin_write16(MDMA_S3_CONFIG, val)
1624 #define bfin_read_MDMA_S3_X_COUNT()                     bfin_read16(MDMA_S3_X_COUNT)
1625 #define bfin_write_MDMA_S3_X_COUNT(val)                 bfin_write16(MDMA_S3_X_COUNT, val)
1626 #define bfin_read_MDMA_S3_X_MODIFY()                    bfin_read16(MDMA_S3_X_MODIFY)
1627 #define bfin_write_MDMA_S3_X_MODIFY(val)                bfin_write16(MDMA_S3_X_MODIFY, val)
1628 #define bfin_read_MDMA_S3_Y_COUNT()                     bfin_read16(MDMA_S3_Y_COUNT)
1629 #define bfin_write_MDMA_S3_Y_COUNT(val)                 bfin_write16(MDMA_S3_Y_COUNT, val)
1630 #define bfin_read_MDMA_S3_Y_MODIFY()                    bfin_read16(MDMA_S3_Y_MODIFY)
1631 #define bfin_write_MDMA_S3_Y_MODIFY(val)                bfin_write16(MDMA_S3_Y_MODIFY, val)
1632 #define bfin_read_MDMA_S3_CURR_DESC_PTR()               bfin_read32(MDMA_S3_CURR_DESC_PTR)
1633 #define bfin_write_MDMA_S3_CURR_DESC_PTR(val)           bfin_write32(MDMA_S3_CURR_DESC_PTR, val)
1634 #define bfin_read_MDMA_S3_CURR_ADDR()                   bfin_read32(MDMA_S3_CURR_ADDR)
1635 #define bfin_write_MDMA_S3_CURR_ADDR(val)               bfin_write32(MDMA_S3_CURR_ADDR, val)
1636 #define bfin_read_MDMA_S3_IRQ_STATUS()                  bfin_read16(MDMA_S3_IRQ_STATUS)
1637 #define bfin_write_MDMA_S3_IRQ_STATUS(val)              bfin_write16(MDMA_S3_IRQ_STATUS, val)
1638 #define bfin_read_MDMA_S3_PERIPHERAL_MAP()              bfin_read16(MDMA_S3_PERIPHERAL_MAP)
1639 #define bfin_write_MDMA_S3_PERIPHERAL_MAP(val)          bfin_write16(MDMA_S3_PERIPHERAL_MAP, val)
1640 #define bfin_read_MDMA_S3_CURR_X_COUNT()                bfin_read16(MDMA_S3_CURR_X_COUNT)
1641 #define bfin_write_MDMA_S3_CURR_X_COUNT(val)            bfin_write16(MDMA_S3_CURR_X_COUNT, val)
1642 #define bfin_read_MDMA_S3_CURR_Y_COUNT()                bfin_read16(MDMA_S3_CURR_Y_COUNT)
1643 #define bfin_write_MDMA_S3_CURR_Y_COUNT(val)            bfin_write16(MDMA_S3_CURR_Y_COUNT, val)
1644
1645 /* UART1 Registers */
1646
1647 #define bfin_read_UART1_DLL()                   bfin_read16(UART1_DLL)
1648 #define bfin_write_UART1_DLL(val)               bfin_write16(UART1_DLL, val)
1649 #define bfin_read_UART1_DLH()                   bfin_read16(UART1_DLH)
1650 #define bfin_write_UART1_DLH(val)               bfin_write16(UART1_DLH, val)
1651 #define bfin_read_UART1_GCTL()                  bfin_read16(UART1_GCTL)
1652 #define bfin_write_UART1_GCTL(val)              bfin_write16(UART1_GCTL, val)
1653 #define bfin_read_UART1_LCR()                   bfin_read16(UART1_LCR)
1654 #define bfin_write_UART1_LCR(val)               bfin_write16(UART1_LCR, val)
1655 #define bfin_read_UART1_MCR()                   bfin_read16(UART1_MCR)
1656 #define bfin_write_UART1_MCR(val)               bfin_write16(UART1_MCR, val)
1657 #define bfin_read_UART1_LSR()                   bfin_read16(UART1_LSR)
1658 #define bfin_write_UART1_LSR(val)               bfin_write16(UART1_LSR, val)
1659 #define bfin_read_UART1_MSR()                   bfin_read16(UART1_MSR)
1660 #define bfin_write_UART1_MSR(val)               bfin_write16(UART1_MSR, val)
1661 #define bfin_read_UART1_SCR()                   bfin_read16(UART1_SCR)
1662 #define bfin_write_UART1_SCR(val)               bfin_write16(UART1_SCR, val)
1663 #define bfin_read_UART1_IER_SET()               bfin_read16(UART1_IER_SET)
1664 #define bfin_write_UART1_IER_SET(val)           bfin_write16(UART1_IER_SET, val)
1665 #define bfin_read_UART1_IER_CLEAR()             bfin_read16(UART1_IER_CLEAR)
1666 #define bfin_write_UART1_IER_CLEAR(val)         bfin_write16(UART1_IER_CLEAR, val)
1667 #define bfin_read_UART1_THR()                   bfin_read16(UART1_THR)
1668 #define bfin_write_UART1_THR(val)               bfin_write16(UART1_THR, val)
1669 #define bfin_read_UART1_RBR()                   bfin_read16(UART1_RBR)
1670 #define bfin_write_UART1_RBR(val)               bfin_write16(UART1_RBR, val)
1671
1672 /* UART2 is not defined in the shared file because it is not available on the ADSP-BF542 and ADSP-BF544 bfin_read_()rocessors */
1673
1674 /* SPI1 Registers */
1675
1676 #define bfin_read_SPI1_CTL()                    bfin_read16(SPI1_CTL)
1677 #define bfin_write_SPI1_CTL(val)                bfin_write16(SPI1_CTL, val)
1678 #define bfin_read_SPI1_FLG()                    bfin_read16(SPI1_FLG)
1679 #define bfin_write_SPI1_FLG(val)                bfin_write16(SPI1_FLG, val)
1680 #define bfin_read_SPI1_STAT()                   bfin_read16(SPI1_STAT)
1681 #define bfin_write_SPI1_STAT(val)               bfin_write16(SPI1_STAT, val)
1682 #define bfin_read_SPI1_TDBR()                   bfin_read16(SPI1_TDBR)
1683 #define bfin_write_SPI1_TDBR(val)               bfin_write16(SPI1_TDBR, val)
1684 #define bfin_read_SPI1_RDBR()                   bfin_read16(SPI1_RDBR)
1685 #define bfin_write_SPI1_RDBR(val)               bfin_write16(SPI1_RDBR, val)
1686 #define bfin_read_SPI1_BAUD()                   bfin_read16(SPI1_BAUD)
1687 #define bfin_write_SPI1_BAUD(val)               bfin_write16(SPI1_BAUD, val)
1688 #define bfin_read_SPI1_SHADOW()                 bfin_read16(SPI1_SHADOW)
1689 #define bfin_write_SPI1_SHADOW(val)             bfin_write16(SPI1_SHADOW, val)
1690
1691 /* SPORT2 Registers */
1692
1693 #define bfin_read_SPORT2_TCR1()                 bfin_read16(SPORT2_TCR1)
1694 #define bfin_write_SPORT2_TCR1(val)             bfin_write16(SPORT2_TCR1, val)
1695 #define bfin_read_SPORT2_TCR2()                 bfin_read16(SPORT2_TCR2)
1696 #define bfin_write_SPORT2_TCR2(val)             bfin_write16(SPORT2_TCR2, val)
1697 #define bfin_read_SPORT2_TCLKDIV()              bfin_read16(SPORT2_TCLKDIV)
1698 #define bfin_write_SPORT2_TCLKDIV(val)          bfin_write16(SPORT2_TCLKDIV, val)
1699 #define bfin_read_SPORT2_TFSDIV()               bfin_read16(SPORT2_TFSDIV)
1700 #define bfin_write_SPORT2_TFSDIV(val)           bfin_write16(SPORT2_TFSDIV, val)
1701 #define bfin_read_SPORT2_TX()                   bfin_read32(SPORT2_TX)
1702 #define bfin_write_SPORT2_TX(val)               bfin_write32(SPORT2_TX, val)
1703 #define bfin_read_SPORT2_RX()                   bfin_read32(SPORT2_RX)
1704 #define bfin_write_SPORT2_RX(val)               bfin_write32(SPORT2_RX, val)
1705 #define bfin_read_SPORT2_RCR1()                 bfin_read16(SPORT2_RCR1)
1706 #define bfin_write_SPORT2_RCR1(val)             bfin_write16(SPORT2_RCR1, val)
1707 #define bfin_read_SPORT2_RCR2()                 bfin_read16(SPORT2_RCR2)
1708 #define bfin_write_SPORT2_RCR2(val)             bfin_write16(SPORT2_RCR2, val)
1709 #define bfin_read_SPORT2_RCLKDIV()              bfin_read16(SPORT2_RCLKDIV)
1710 #define bfin_write_SPORT2_RCLKDIV(val)          bfin_write16(SPORT2_RCLKDIV, val)
1711 #define bfin_read_SPORT2_RFSDIV()               bfin_read16(SPORT2_RFSDIV)
1712 #define bfin_write_SPORT2_RFSDIV(val)           bfin_write16(SPORT2_RFSDIV, val)
1713 #define bfin_read_SPORT2_STAT()                 bfin_read16(SPORT2_STAT)
1714 #define bfin_write_SPORT2_STAT(val)             bfin_write16(SPORT2_STAT, val)
1715 #define bfin_read_SPORT2_CHNL()                 bfin_read16(SPORT2_CHNL)
1716 #define bfin_write_SPORT2_CHNL(val)             bfin_write16(SPORT2_CHNL, val)
1717 #define bfin_read_SPORT2_MCMC1()                bfin_read16(SPORT2_MCMC1)
1718 #define bfin_write_SPORT2_MCMC1(val)            bfin_write16(SPORT2_MCMC1, val)
1719 #define bfin_read_SPORT2_MCMC2()                bfin_read16(SPORT2_MCMC2)
1720 #define bfin_write_SPORT2_MCMC2(val)            bfin_write16(SPORT2_MCMC2, val)
1721 #define bfin_read_SPORT2_MTCS0()                bfin_read32(SPORT2_MTCS0)
1722 #define bfin_write_SPORT2_MTCS0(val)            bfin_write32(SPORT2_MTCS0, val)
1723 #define bfin_read_SPORT2_MTCS1()                bfin_read32(SPORT2_MTCS1)
1724 #define bfin_write_SPORT2_MTCS1(val)            bfin_write32(SPORT2_MTCS1, val)
1725 #define bfin_read_SPORT2_MTCS2()                bfin_read32(SPORT2_MTCS2)
1726 #define bfin_write_SPORT2_MTCS2(val)            bfin_write32(SPORT2_MTCS2, val)
1727 #define bfin_read_SPORT2_MTCS3()                bfin_read32(SPORT2_MTCS3)
1728 #define bfin_write_SPORT2_MTCS3(val)            bfin_write32(SPORT2_MTCS3, val)
1729 #define bfin_read_SPORT2_MRCS0()                bfin_read32(SPORT2_MRCS0)
1730 #define bfin_write_SPORT2_MRCS0(val)            bfin_write32(SPORT2_MRCS0, val)
1731 #define bfin_read_SPORT2_MRCS1()                bfin_read32(SPORT2_MRCS1)
1732 #define bfin_write_SPORT2_MRCS1(val)            bfin_write32(SPORT2_MRCS1, val)
1733 #define bfin_read_SPORT2_MRCS2()                bfin_read32(SPORT2_MRCS2)
1734 #define bfin_write_SPORT2_MRCS2(val)            bfin_write32(SPORT2_MRCS2, val)
1735 #define bfin_read_SPORT2_MRCS3()                bfin_read32(SPORT2_MRCS3)
1736 #define bfin_write_SPORT2_MRCS3(val)            bfin_write32(SPORT2_MRCS3, val)
1737
1738 /* SPORT3 Registers */
1739
1740 #define bfin_read_SPORT3_TCR1()                 bfin_read16(SPORT3_TCR1)
1741 #define bfin_write_SPORT3_TCR1(val)             bfin_write16(SPORT3_TCR1, val)
1742 #define bfin_read_SPORT3_TCR2()                 bfin_read16(SPORT3_TCR2)
1743 #define bfin_write_SPORT3_TCR2(val)             bfin_write16(SPORT3_TCR2, val)
1744 #define bfin_read_SPORT3_TCLKDIV()              bfin_read16(SPORT3_TCLKDIV)
1745 #define bfin_write_SPORT3_TCLKDIV(val)          bfin_write16(SPORT3_TCLKDIV, val)
1746 #define bfin_read_SPORT3_TFSDIV()               bfin_read16(SPORT3_TFSDIV)
1747 #define bfin_write_SPORT3_TFSDIV(val)           bfin_write16(SPORT3_TFSDIV, val)
1748 #define bfin_read_SPORT3_TX()                   bfin_read32(SPORT3_TX)
1749 #define bfin_write_SPORT3_TX(val)               bfin_write32(SPORT3_TX, val)
1750 #define bfin_read_SPORT3_RX()                   bfin_read32(SPORT3_RX)
1751 #define bfin_write_SPORT3_RX(val)               bfin_write32(SPORT3_RX, val)
1752 #define bfin_read_SPORT3_RCR1()                 bfin_read16(SPORT3_RCR1)
1753 #define bfin_write_SPORT3_RCR1(val)             bfin_write16(SPORT3_RCR1, val)
1754 #define bfin_read_SPORT3_RCR2()                 bfin_read16(SPORT3_RCR2)
1755 #define bfin_write_SPORT3_RCR2(val)             bfin_write16(SPORT3_RCR2, val)
1756 #define bfin_read_SPORT3_RCLKDIV()              bfin_read16(SPORT3_RCLKDIV)
1757 #define bfin_write_SPORT3_RCLKDIV(val)          bfin_write16(SPORT3_RCLKDIV, val)
1758 #define bfin_read_SPORT3_RFSDIV()               bfin_read16(SPORT3_RFSDIV)
1759 #define bfin_write_SPORT3_RFSDIV(val)           bfin_write16(SPORT3_RFSDIV, val)
1760 #define bfin_read_SPORT3_STAT()                 bfin_read16(SPORT3_STAT)
1761 #define bfin_write_SPORT3_STAT(val)             bfin_write16(SPORT3_STAT, val)
1762 #define bfin_read_SPORT3_CHNL()                 bfin_read16(SPORT3_CHNL)
1763 #define bfin_write_SPORT3_CHNL(val)             bfin_write16(SPORT3_CHNL, val)
1764 #define bfin_read_SPORT3_MCMC1()                bfin_read16(SPORT3_MCMC1)
1765 #define bfin_write_SPORT3_MCMC1(val)            bfin_write16(SPORT3_MCMC1, val)
1766 #define bfin_read_SPORT3_MCMC2()                bfin_read16(SPORT3_MCMC2)
1767 #define bfin_write_SPORT3_MCMC2(val)            bfin_write16(SPORT3_MCMC2, val)
1768 #define bfin_read_SPORT3_MTCS0()                bfin_read32(SPORT3_MTCS0)
1769 #define bfin_write_SPORT3_MTCS0(val)            bfin_write32(SPORT3_MTCS0, val)
1770 #define bfin_read_SPORT3_MTCS1()                bfin_read32(SPORT3_MTCS1)
1771 #define bfin_write_SPORT3_MTCS1(val)            bfin_write32(SPORT3_MTCS1, val)
1772 #define bfin_read_SPORT3_MTCS2()                bfin_read32(SPORT3_MTCS2)
1773 #define bfin_write_SPORT3_MTCS2(val)            bfin_write32(SPORT3_MTCS2, val)
1774 #define bfin_read_SPORT3_MTCS3()                bfin_read32(SPORT3_MTCS3)
1775 #define bfin_write_SPORT3_MTCS3(val)            bfin_write32(SPORT3_MTCS3, val)
1776 #define bfin_read_SPORT3_MRCS0()                bfin_read32(SPORT3_MRCS0)
1777 #define bfin_write_SPORT3_MRCS0(val)            bfin_write32(SPORT3_MRCS0, val)
1778 #define bfin_read_SPORT3_MRCS1()                bfin_read32(SPORT3_MRCS1)
1779 #define bfin_write_SPORT3_MRCS1(val)            bfin_write32(SPORT3_MRCS1, val)
1780 #define bfin_read_SPORT3_MRCS2()                bfin_read32(SPORT3_MRCS2)
1781 #define bfin_write_SPORT3_MRCS2(val)            bfin_write32(SPORT3_MRCS2, val)
1782 #define bfin_read_SPORT3_MRCS3()                bfin_read32(SPORT3_MRCS3)
1783 #define bfin_write_SPORT3_MRCS3(val)            bfin_write32(SPORT3_MRCS3, val)
1784
1785 /* EPPI2 Registers */
1786
1787 #define bfin_read_EPPI2_STATUS()                bfin_read16(EPPI2_STATUS)
1788 #define bfin_write_EPPI2_STATUS(val)            bfin_write16(EPPI2_STATUS, val)
1789 #define bfin_read_EPPI2_HCOUNT()                bfin_read16(EPPI2_HCOUNT)
1790 #define bfin_write_EPPI2_HCOUNT(val)            bfin_write16(EPPI2_HCOUNT, val)
1791 #define bfin_read_EPPI2_HDELAY()                bfin_read16(EPPI2_HDELAY)
1792 #define bfin_write_EPPI2_HDELAY(val)            bfin_write16(EPPI2_HDELAY, val)
1793 #define bfin_read_EPPI2_VCOUNT()                bfin_read16(EPPI2_VCOUNT)
1794 #define bfin_write_EPPI2_VCOUNT(val)            bfin_write16(EPPI2_VCOUNT, val)
1795 #define bfin_read_EPPI2_VDELAY()                bfin_read16(EPPI2_VDELAY)
1796 #define bfin_write_EPPI2_VDELAY(val)            bfin_write16(EPPI2_VDELAY, val)
1797 #define bfin_read_EPPI2_FRAME()                 bfin_read16(EPPI2_FRAME)
1798 #define bfin_write_EPPI2_FRAME(val)             bfin_write16(EPPI2_FRAME, val)
1799 #define bfin_read_EPPI2_LINE()                  bfin_read16(EPPI2_LINE)
1800 #define bfin_write_EPPI2_LINE(val)              bfin_write16(EPPI2_LINE, val)
1801 #define bfin_read_EPPI2_CLKDIV()                bfin_read16(EPPI2_CLKDIV)
1802 #define bfin_write_EPPI2_CLKDIV(val)            bfin_write16(EPPI2_CLKDIV, val)
1803 #define bfin_read_EPPI2_CONTROL()               bfin_read32(EPPI2_CONTROL)
1804 #define bfin_write_EPPI2_CONTROL(val)           bfin_write32(EPPI2_CONTROL, val)
1805 #define bfin_read_EPPI2_FS1W_HBL()              bfin_read32(EPPI2_FS1W_HBL)
1806 #define bfin_write_EPPI2_FS1W_HBL(val)          bfin_write32(EPPI2_FS1W_HBL, val)
1807 #define bfin_read_EPPI2_FS1P_AVPL()             bfin_read32(EPPI2_FS1P_AVPL)
1808 #define bfin_write_EPPI2_FS1P_AVPL(val)         bfin_write32(EPPI2_FS1P_AVPL, val)
1809 #define bfin_read_EPPI2_FS2W_LVB()              bfin_read32(EPPI2_FS2W_LVB)
1810 #define bfin_write_EPPI2_FS2W_LVB(val)          bfin_write32(EPPI2_FS2W_LVB, val)
1811 #define bfin_read_EPPI2_FS2P_LAVF()             bfin_read32(EPPI2_FS2P_LAVF)
1812 #define bfin_write_EPPI2_FS2P_LAVF(val)         bfin_write32(EPPI2_FS2P_LAVF, val)
1813 #define bfin_read_EPPI2_CLIP()                  bfin_read32(EPPI2_CLIP)
1814 #define bfin_write_EPPI2_CLIP(val)              bfin_write32(EPPI2_CLIP, val)
1815
1816 /* CAN Controller 0 Config 1 Registers */
1817
1818 #define bfin_read_CAN0_MC1()            bfin_read16(CAN0_MC1)
1819 #define bfin_write_CAN0_MC1(val)        bfin_write16(CAN0_MC1, val)
1820 #define bfin_read_CAN0_MD1()            bfin_read16(CAN0_MD1)
1821 #define bfin_write_CAN0_MD1(val)        bfin_write16(CAN0_MD1, val)
1822 #define bfin_read_CAN0_TRS1()           bfin_read16(CAN0_TRS1)
1823 #define bfin_write_CAN0_TRS1(val)       bfin_write16(CAN0_TRS1, val)
1824 #define bfin_read_CAN0_TRR1()           bfin_read16(CAN0_TRR1)
1825 #define bfin_write_CAN0_TRR1(val)       bfin_write16(CAN0_TRR1, val)
1826 #define bfin_read_CAN0_TA1()            bfin_read16(CAN0_TA1)
1827 #define bfin_write_CAN0_TA1(val)        bfin_write16(CAN0_TA1, val)
1828 #define bfin_read_CAN0_AA1()            bfin_read16(CAN0_AA1)
1829 #define bfin_write_CAN0_AA1(val)        bfin_write16(CAN0_AA1, val)
1830 #define bfin_read_CAN0_RMP1()           bfin_read16(CAN0_RMP1)
1831 #define bfin_write_CAN0_RMP1(val)       bfin_write16(CAN0_RMP1, val)
1832 #define bfin_read_CAN0_RML1()           bfin_read16(CAN0_RML1)
1833 #define bfin_write_CAN0_RML1(val)       bfin_write16(CAN0_RML1, val)
1834 #define bfin_read_CAN0_MBTIF1()         bfin_read16(CAN0_MBTIF1)
1835 #define bfin_write_CAN0_MBTIF1(val)     bfin_write16(CAN0_MBTIF1, val)
1836 #define bfin_read_CAN0_MBRIF1()         bfin_read16(CAN0_MBRIF1)
1837 #define bfin_write_CAN0_MBRIF1(val)     bfin_write16(CAN0_MBRIF1, val)
1838 #define bfin_read_CAN0_MBIM1()          bfin_read16(CAN0_MBIM1)
1839 #define bfin_write_CAN0_MBIM1(val)      bfin_write16(CAN0_MBIM1, val)
1840 #define bfin_read_CAN0_RFH1()           bfin_read16(CAN0_RFH1)
1841 #define bfin_write_CAN0_RFH1(val)       bfin_write16(CAN0_RFH1, val)
1842 #define bfin_read_CAN0_OPSS1()          bfin_read16(CAN0_OPSS1)
1843 #define bfin_write_CAN0_OPSS1(val)      bfin_write16(CAN0_OPSS1, val)
1844
1845 /* CAN Controller 0 Config 2 Registers */
1846
1847 #define bfin_read_CAN0_MC2()            bfin_read16(CAN0_MC2)
1848 #define bfin_write_CAN0_MC2(val)        bfin_write16(CAN0_MC2, val)
1849 #define bfin_read_CAN0_MD2()            bfin_read16(CAN0_MD2)
1850 #define bfin_write_CAN0_MD2(val)        bfin_write16(CAN0_MD2, val)
1851 #define bfin_read_CAN0_TRS2()           bfin_read16(CAN0_TRS2)
1852 #define bfin_write_CAN0_TRS2(val)       bfin_write16(CAN0_TRS2, val)
1853 #define bfin_read_CAN0_TRR2()           bfin_read16(CAN0_TRR2)
1854 #define bfin_write_CAN0_TRR2(val)       bfin_write16(CAN0_TRR2, val)
1855 #define bfin_read_CAN0_TA2()            bfin_read16(CAN0_TA2)
1856 #define bfin_write_CAN0_TA2(val)        bfin_write16(CAN0_TA2, val)
1857 #define bfin_read_CAN0_AA2()            bfin_read16(CAN0_AA2)
1858 #define bfin_write_CAN0_AA2(val)        bfin_write16(CAN0_AA2, val)
1859 #define bfin_read_CAN0_RMP2()           bfin_read16(CAN0_RMP2)
1860 #define bfin_write_CAN0_RMP2(val)       bfin_write16(CAN0_RMP2, val)
1861 #define bfin_read_CAN0_RML2()           bfin_read16(CAN0_RML2)
1862 #define bfin_write_CAN0_RML2(val)       bfin_write16(CAN0_RML2, val)
1863 #define bfin_read_CAN0_MBTIF2()         bfin_read16(CAN0_MBTIF2)
1864 #define bfin_write_CAN0_MBTIF2(val)     bfin_write16(CAN0_MBTIF2, val)
1865 #define bfin_read_CAN0_MBRIF2()         bfin_read16(CAN0_MBRIF2)
1866 #define bfin_write_CAN0_MBRIF2(val)     bfin_write16(CAN0_MBRIF2, val)
1867 #define bfin_read_CAN0_MBIM2()          bfin_read16(CAN0_MBIM2)
1868 #define bfin_write_CAN0_MBIM2(val)      bfin_write16(CAN0_MBIM2, val)
1869 #define bfin_read_CAN0_RFH2()           bfin_read16(CAN0_RFH2)
1870 #define bfin_write_CAN0_RFH2(val)       bfin_write16(CAN0_RFH2, val)
1871 #define bfin_read_CAN0_OPSS2()          bfin_read16(CAN0_OPSS2)
1872 #define bfin_write_CAN0_OPSS2(val)      bfin_write16(CAN0_OPSS2, val)
1873
1874 /* CAN Controller 0 Clock/Interrubfin_read_()t/Counter Registers */
1875
1876 #define bfin_read_CAN0_CLOCK()          bfin_read16(CAN0_CLOCK)
1877 #define bfin_write_CAN0_CLOCK(val)      bfin_write16(CAN0_CLOCK, val)
1878 #define bfin_read_CAN0_TIMING()         bfin_read16(CAN0_TIMING)
1879 #define bfin_write_CAN0_TIMING(val)     bfin_write16(CAN0_TIMING, val)
1880 #define bfin_read_CAN0_DEBUG()          bfin_read16(CAN0_DEBUG)
1881 #define bfin_write_CAN0_DEBUG(val)      bfin_write16(CAN0_DEBUG, val)
1882 #define bfin_read_CAN0_STATUS()         bfin_read16(CAN0_STATUS)
1883 #define bfin_write_CAN0_STATUS(val)     bfin_write16(CAN0_STATUS, val)
1884 #define bfin_read_CAN0_CEC()            bfin_read16(CAN0_CEC)
1885 #define bfin_write_CAN0_CEC(val)        bfin_write16(CAN0_CEC, val)
1886 #define bfin_read_CAN0_GIS()            bfin_read16(CAN0_GIS)
1887 #define bfin_write_CAN0_GIS(val)        bfin_write16(CAN0_GIS, val)
1888 #define bfin_read_CAN0_GIM()            bfin_read16(CAN0_GIM)
1889 #define bfin_write_CAN0_GIM(val)        bfin_write16(CAN0_GIM, val)
1890 #define bfin_read_CAN0_GIF()            bfin_read16(CAN0_GIF)
1891 #define bfin_write_CAN0_GIF(val)        bfin_write16(CAN0_GIF, val)
1892 #define bfin_read_CAN0_CONTROL()        bfin_read16(CAN0_CONTROL)
1893 #define bfin_write_CAN0_CONTROL(val)    bfin_write16(CAN0_CONTROL, val)
1894 #define bfin_read_CAN0_INTR()           bfin_read16(CAN0_INTR)
1895 #define bfin_write_CAN0_INTR(val)       bfin_write16(CAN0_INTR, val)
1896 #define bfin_read_CAN0_MBTD()           bfin_read16(CAN0_MBTD)
1897 #define bfin_write_CAN0_MBTD(val)       bfin_write16(CAN0_MBTD, val)
1898 #define bfin_read_CAN0_EWR()            bfin_read16(CAN0_EWR)
1899 #define bfin_write_CAN0_EWR(val)        bfin_write16(CAN0_EWR, val)
1900 #define bfin_read_CAN0_ESR()            bfin_read16(CAN0_ESR)
1901 #define bfin_write_CAN0_ESR(val)        bfin_write16(CAN0_ESR, val)
1902 #define bfin_read_CAN0_UCCNT()          bfin_read16(CAN0_UCCNT)
1903 #define bfin_write_CAN0_UCCNT(val)      bfin_write16(CAN0_UCCNT, val)
1904 #define bfin_read_CAN0_UCRC()           bfin_read16(CAN0_UCRC)
1905 #define bfin_write_CAN0_UCRC(val)       bfin_write16(CAN0_UCRC, val)
1906 #define bfin_read_CAN0_UCCNF()          bfin_read16(CAN0_UCCNF)
1907 #define bfin_write_CAN0_UCCNF(val)      bfin_write16(CAN0_UCCNF, val)
1908
1909 /* CAN Controller 0 Accebfin_read_()tance Registers */
1910
1911 #define bfin_read_CAN0_AM00L()          bfin_read16(CAN0_AM00L)
1912 #define bfin_write_CAN0_AM00L(val)      bfin_write16(CAN0_AM00L, val)
1913 #define bfin_read_CAN0_AM00H()          bfin_read16(CAN0_AM00H)
1914 #define bfin_write_CAN0_AM00H(val)      bfin_write16(CAN0_AM00H, val)
1915 #define bfin_read_CAN0_AM01L()          bfin_read16(CAN0_AM01L)
1916 #define bfin_write_CAN0_AM01L(val)      bfin_write16(CAN0_AM01L, val)
1917 #define bfin_read_CAN0_AM01H()          bfin_read16(CAN0_AM01H)
1918 #define bfin_write_CAN0_AM01H(val)      bfin_write16(CAN0_AM01H, val)
1919 #define bfin_read_CAN0_AM02L()          bfin_read16(CAN0_AM02L)
1920 #define bfin_write_CAN0_AM02L(val)      bfin_write16(CAN0_AM02L, val)
1921 #define bfin_read_CAN0_AM02H()          bfin_read16(CAN0_AM02H)
1922 #define bfin_write_CAN0_AM02H(val)      bfin_write16(CAN0_AM02H, val)
1923 #define bfin_read_CAN0_AM03L()          bfin_read16(CAN0_AM03L)
1924 #define bfin_write_CAN0_AM03L(val)      bfin_write16(CAN0_AM03L, val)
1925 #define bfin_read_CAN0_AM03H()          bfin_read16(CAN0_AM03H)
1926 #define bfin_write_CAN0_AM03H(val)      bfin_write16(CAN0_AM03H, val)
1927 #define bfin_read_CAN0_AM04L()          bfin_read16(CAN0_AM04L)
1928 #define bfin_write_CAN0_AM04L(val)      bfin_write16(CAN0_AM04L, val)
1929 #define bfin_read_CAN0_AM04H()          bfin_read16(CAN0_AM04H)
1930 #define bfin_write_CAN0_AM04H(val)      bfin_write16(CAN0_AM04H, val)
1931 #define bfin_read_CAN0_AM05L()          bfin_read16(CAN0_AM05L)
1932 #define bfin_write_CAN0_AM05L(val)      bfin_write16(CAN0_AM05L, val)
1933 #define bfin_read_CAN0_AM05H()          bfin_read16(CAN0_AM05H)
1934 #define bfin_write_CAN0_AM05H(val)      bfin_write16(CAN0_AM05H, val)
1935 #define bfin_read_CAN0_AM06L()          bfin_read16(CAN0_AM06L)
1936 #define bfin_write_CAN0_AM06L(val)      bfin_write16(CAN0_AM06L, val)
1937 #define bfin_read_CAN0_AM06H()          bfin_read16(CAN0_AM06H)
1938 #define bfin_write_CAN0_AM06H(val)      bfin_write16(CAN0_AM06H, val)
1939 #define bfin_read_CAN0_AM07L()          bfin_read16(CAN0_AM07L)
1940 #define bfin_write_CAN0_AM07L(val)      bfin_write16(CAN0_AM07L, val)
1941 #define bfin_read_CAN0_AM07H()          bfin_read16(CAN0_AM07H)
1942 #define bfin_write_CAN0_AM07H(val)      bfin_write16(CAN0_AM07H, val)
1943 #define bfin_read_CAN0_AM08L()          bfin_read16(CAN0_AM08L)
1944 #define bfin_write_CAN0_AM08L(val)      bfin_write16(CAN0_AM08L, val)
1945 #define bfin_read_CAN0_AM08H()          bfin_read16(CAN0_AM08H)
1946 #define bfin_write_CAN0_AM08H(val)      bfin_write16(CAN0_AM08H, val)
1947 #define bfin_read_CAN0_AM09L()          bfin_read16(CAN0_AM09L)
1948 #define bfin_write_CAN0_AM09L(val)      bfin_write16(CAN0_AM09L, val)
1949 #define bfin_read_CAN0_AM09H()          bfin_read16(CAN0_AM09H)
1950 #define bfin_write_CAN0_AM09H(val)      bfin_write16(CAN0_AM09H, val)
1951 #define bfin_read_CAN0_AM10L()          bfin_read16(CAN0_AM10L)
1952 #define bfin_write_CAN0_AM10L(val)      bfin_write16(CAN0_AM10L, val)
1953 #define bfin_read_CAN0_AM10H()          bfin_read16(CAN0_AM10H)
1954 #define bfin_write_CAN0_AM10H(val)      bfin_write16(CAN0_AM10H, val)
1955 #define bfin_read_CAN0_AM11L()          bfin_read16(CAN0_AM11L)
1956 #define bfin_write_CAN0_AM11L(val)      bfin_write16(CAN0_AM11L, val)
1957 #define bfin_read_CAN0_AM11H()          bfin_read16(CAN0_AM11H)
1958 #define bfin_write_CAN0_AM11H(val)      bfin_write16(CAN0_AM11H, val)
1959 #define bfin_read_CAN0_AM12L()          bfin_read16(CAN0_AM12L)
1960 #define bfin_write_CAN0_AM12L(val)      bfin_write16(CAN0_AM12L, val)
1961 #define bfin_read_CAN0_AM12H()          bfin_read16(CAN0_AM12H)
1962 #define bfin_write_CAN0_AM12H(val)      bfin_write16(CAN0_AM12H, val)
1963 #define bfin_read_CAN0_AM13L()          bfin_read16(CAN0_AM13L)
1964 #define bfin_write_CAN0_AM13L(val)      bfin_write16(CAN0_AM13L, val)
1965 #define bfin_read_CAN0_AM13H()          bfin_read16(CAN0_AM13H)
1966 #define bfin_write_CAN0_AM13H(val)      bfin_write16(CAN0_AM13H, val)
1967 #define bfin_read_CAN0_AM14L()          bfin_read16(CAN0_AM14L)
1968 #define bfin_write_CAN0_AM14L(val)      bfin_write16(CAN0_AM14L, val)
1969 #define bfin_read_CAN0_AM14H()          bfin_read16(CAN0_AM14H)
1970 #define bfin_write_CAN0_AM14H(val)      bfin_write16(CAN0_AM14H, val)
1971 #define bfin_read_CAN0_AM15L()          bfin_read16(CAN0_AM15L)
1972 #define bfin_write_CAN0_AM15L(val)      bfin_write16(CAN0_AM15L, val)
1973 #define bfin_read_CAN0_AM15H()          bfin_read16(CAN0_AM15H)
1974 #define bfin_write_CAN0_AM15H(val)      bfin_write16(CAN0_AM15H, val)
1975
1976 /* CAN Controller 0 Accebfin_read_()tance Registers */
1977
1978 #define bfin_read_CAN0_AM16L()          bfin_read16(CAN0_AM16L)
1979 #define bfin_write_CAN0_AM16L(val)      bfin_write16(CAN0_AM16L, val)
1980 #define bfin_read_CAN0_AM16H()          bfin_read16(CAN0_AM16H)
1981 #define bfin_write_CAN0_AM16H(val)      bfin_write16(CAN0_AM16H, val)
1982 #define bfin_read_CAN0_AM17L()          bfin_read16(CAN0_AM17L)
1983 #define bfin_write_CAN0_AM17L(val)      bfin_write16(CAN0_AM17L, val)
1984 #define bfin_read_CAN0_AM17H()          bfin_read16(CAN0_AM17H)
1985 #define bfin_write_CAN0_AM17H(val)      bfin_write16(CAN0_AM17H, val)
1986 #define bfin_read_CAN0_AM18L()          bfin_read16(CAN0_AM18L)
1987 #define bfin_write_CAN0_AM18L(val)      bfin_write16(CAN0_AM18L, val)
1988 #define bfin_read_CAN0_AM18H()          bfin_read16(CAN0_AM18H)
1989 #define bfin_write_CAN0_AM18H(val)      bfin_write16(CAN0_AM18H, val)
1990 #define bfin_read_CAN0_AM19L()          bfin_read16(CAN0_AM19L)
1991 #define bfin_write_CAN0_AM19L(val)      bfin_write16(CAN0_AM19L, val)
1992 #define bfin_read_CAN0_AM19H()          bfin_read16(CAN0_AM19H)
1993 #define bfin_write_CAN0_AM19H(val)      bfin_write16(CAN0_AM19H, val)
1994 #define bfin_read_CAN0_AM20L()          bfin_read16(CAN0_AM20L)
1995 #define bfin_write_CAN0_AM20L(val)      bfin_write16(CAN0_AM20L, val)
1996 #define bfin_read_CAN0_AM20H()          bfin_read16(CAN0_AM20H)
1997 #define bfin_write_CAN0_AM20H(val)      bfin_write16(CAN0_AM20H, val)
1998 #define bfin_read_CAN0_AM21L()          bfin_read16(CAN0_AM21L)
1999 #define bfin_write_CAN0_AM21L(val)      bfin_write16(CAN0_AM21L, val)
2000 #define bfin_read_CAN0_AM21H()          bfin_read16(CAN0_AM21H)
2001 #define bfin_write_CAN0_AM21H(val)      bfin_write16(CAN0_AM21H, val)
2002 #define bfin_read_CAN0_AM22L()          bfin_read16(CAN0_AM22L)
2003 #define bfin_write_CAN0_AM22L(val)      bfin_write16(CAN0_AM22L, val)
2004 #define bfin_read_CAN0_AM22H()          bfin_read16(CAN0_AM22H)
2005 #define bfin_write_CAN0_AM22H(val)      bfin_write16(CAN0_AM22H, val)
2006 #define bfin_read_CAN0_AM23L()          bfin_read16(CAN0_AM23L)
2007 #define bfin_write_CAN0_AM23L(val)      bfin_write16(CAN0_AM23L, val)
2008 #define bfin_read_CAN0_AM23H()          bfin_read16(CAN0_AM23H)
2009 #define bfin_write_CAN0_AM23H(val)      bfin_write16(CAN0_AM23H, val)
2010 #define bfin_read_CAN0_AM24L()          bfin_read16(CAN0_AM24L)
2011 #define bfin_write_CAN0_AM24L(val)      bfin_write16(CAN0_AM24L, val)
2012 #define bfin_read_CAN0_AM24H()          bfin_read16(CAN0_AM24H)
2013 #define bfin_write_CAN0_AM24H(val)      bfin_write16(CAN0_AM24H, val)
2014 #define bfin_read_CAN0_AM25L()          bfin_read16(CAN0_AM25L)
2015 #define bfin_write_CAN0_AM25L(val)      bfin_write16(CAN0_AM25L, val)
2016 #define bfin_read_CAN0_AM25H()          bfin_read16(CAN0_AM25H)
2017 #define bfin_write_CAN0_AM25H(val)      bfin_write16(CAN0_AM25H, val)
2018 #define bfin_read_CAN0_AM26L()          bfin_read16(CAN0_AM26L)
2019 #define bfin_write_CAN0_AM26L(val)      bfin_write16(CAN0_AM26L, val)
2020 #define bfin_read_CAN0_AM26H()          bfin_read16(CAN0_AM26H)
2021 #define bfin_write_CAN0_AM26H(val)      bfin_write16(CAN0_AM26H, val)
2022 #define bfin_read_CAN0_AM27L()          bfin_read16(CAN0_AM27L)
2023 #define bfin_write_CAN0_AM27L(val)      bfin_write16(CAN0_AM27L, val)
2024 #define bfin_read_CAN0_AM27H()          bfin_read16(CAN0_AM27H)
2025 #define bfin_write_CAN0_AM27H(val)      bfin_write16(CAN0_AM27H, val)
2026 #define bfin_read_CAN0_AM28L()          bfin_read16(CAN0_AM28L)
2027 #define bfin_write_CAN0_AM28L(val)      bfin_write16(CAN0_AM28L, val)
2028 #define bfin_read_CAN0_AM28H()          bfin_read16(CAN0_AM28H)
2029 #define bfin_write_CAN0_AM28H(val)      bfin_write16(CAN0_AM28H, val)
2030 #define bfin_read_CAN0_AM29L()          bfin_read16(CAN0_AM29L)
2031 #define bfin_write_CAN0_AM29L(val)      bfin_write16(CAN0_AM29L, val)
2032 #define bfin_read_CAN0_AM29H()          bfin_read16(CAN0_AM29H)
2033 #define bfin_write_CAN0_AM29H(val)      bfin_write16(CAN0_AM29H, val)
2034 #define bfin_read_CAN0_AM30L()          bfin_read16(CAN0_AM30L)
2035 #define bfin_write_CAN0_AM30L(val)      bfin_write16(CAN0_AM30L, val)
2036 #define bfin_read_CAN0_AM30H()          bfin_read16(CAN0_AM30H)
2037 #define bfin_write_CAN0_AM30H(val)      bfin_write16(CAN0_AM30H, val)
2038 #define bfin_read_CAN0_AM31L()          bfin_read16(CAN0_AM31L)
2039 #define bfin_write_CAN0_AM31L(val)      bfin_write16(CAN0_AM31L, val)
2040 #define bfin_read_CAN0_AM31H()          bfin_read16(CAN0_AM31H)
2041 #define bfin_write_CAN0_AM31H(val)      bfin_write16(CAN0_AM31H, val)
2042
2043 /* CAN Controller 0 Mailbox Data Registers */
2044
2045 #define bfin_read_CAN0_MB00_DATA0()             bfin_read16(CAN0_MB00_DATA0)
2046 #define bfin_write_CAN0_MB00_DATA0(val)         bfin_write16(CAN0_MB00_DATA0, val)
2047 #define bfin_read_CAN0_MB00_DATA1()             bfin_read16(CAN0_MB00_DATA1)
2048 #define bfin_write_CAN0_MB00_DATA1(val)         bfin_write16(CAN0_MB00_DATA1, val)
2049 #define bfin_read_CAN0_MB00_DATA2()             bfin_read16(CAN0_MB00_DATA2)
2050 #define bfin_write_CAN0_MB00_DATA2(val)         bfin_write16(CAN0_MB00_DATA2, val)
2051 #define bfin_read_CAN0_MB00_DATA3()             bfin_read16(CAN0_MB00_DATA3)
2052 #define bfin_write_CAN0_MB00_DATA3(val)         bfin_write16(CAN0_MB00_DATA3, val)
2053 #define bfin_read_CAN0_MB00_LENGTH()            bfin_read16(CAN0_MB00_LENGTH)
2054 #define bfin_write_CAN0_MB00_LENGTH(val)        bfin_write16(CAN0_MB00_LENGTH, val)
2055 #define bfin_read_CAN0_MB00_TIMESTAMP()         bfin_read16(CAN0_MB00_TIMESTAMP)
2056 #define bfin_write_CAN0_MB00_TIMESTAMP(val)     bfin_write16(CAN0_MB00_TIMESTAMP, val)
2057 #define bfin_read_CAN0_MB00_ID0()               bfin_read16(CAN0_MB00_ID0)
2058 #define bfin_write_CAN0_MB00_ID0(val)           bfin_write16(CAN0_MB00_ID0, val)
2059 #define bfin_read_CAN0_MB00_ID1()               bfin_read16(CAN0_MB00_ID1)
2060 #define bfin_write_CAN0_MB00_ID1(val)           bfin_write16(CAN0_MB00_ID1, val)
2061 #define bfin_read_CAN0_MB01_DATA0()             bfin_read16(CAN0_MB01_DATA0)
2062 #define bfin_write_CAN0_MB01_DATA0(val)         bfin_write16(CAN0_MB01_DATA0, val)
2063 #define bfin_read_CAN0_MB01_DATA1()             bfin_read16(CAN0_MB01_DATA1)
2064 #define bfin_write_CAN0_MB01_DATA1(val)         bfin_write16(CAN0_MB01_DATA1, val)
2065 #define bfin_read_CAN0_MB01_DATA2()             bfin_read16(CAN0_MB01_DATA2)
2066 #define bfin_write_CAN0_MB01_DATA2(val)         bfin_write16(CAN0_MB01_DATA2, val)
2067 #define bfin_read_CAN0_MB01_DATA3()             bfin_read16(CAN0_MB01_DATA3)
2068 #define bfin_write_CAN0_MB01_DATA3(val)         bfin_write16(CAN0_MB01_DATA3, val)
2069 #define bfin_read_CAN0_MB01_LENGTH()            bfin_read16(CAN0_MB01_LENGTH)
2070 #define bfin_write_CAN0_MB01_LENGTH(val)        bfin_write16(CAN0_MB01_LENGTH, val)
2071 #define bfin_read_CAN0_MB01_TIMESTAMP()         bfin_read16(CAN0_MB01_TIMESTAMP)
2072 #define bfin_write_CAN0_MB01_TIMESTAMP(val)     bfin_write16(CAN0_MB01_TIMESTAMP, val)
2073 #define bfin_read_CAN0_MB01_ID0()               bfin_read16(CAN0_MB01_ID0)
2074 #define bfin_write_CAN0_MB01_ID0(val)           bfin_write16(CAN0_MB01_ID0, val)
2075 #define bfin_read_CAN0_MB01_ID1()               bfin_read16(CAN0_MB01_ID1)
2076 #define bfin_write_CAN0_MB01_ID1(val)           bfin_write16(CAN0_MB01_ID1, val)
2077 #define bfin_read_CAN0_MB02_DATA0()             bfin_read16(CAN0_MB02_DATA0)
2078 #define bfin_write_CAN0_MB02_DATA0(val)         bfin_write16(CAN0_MB02_DATA0, val)
2079 #define bfin_read_CAN0_MB02_DATA1()             bfin_read16(CAN0_MB02_DATA1)
2080 #define bfin_write_CAN0_MB02_DATA1(val)         bfin_write16(CAN0_MB02_DATA1, val)
2081 #define bfin_read_CAN0_MB02_DATA2()             bfin_read16(CAN0_MB02_DATA2)
2082 #define bfin_write_CAN0_MB02_DATA2(val)         bfin_write16(CAN0_MB02_DATA2, val)
2083 #define bfin_read_CAN0_MB02_DATA3()             bfin_read16(CAN0_MB02_DATA3)
2084 #define bfin_write_CAN0_MB02_DATA3(val)         bfin_write16(CAN0_MB02_DATA3, val)
2085 #define bfin_read_CAN0_MB02_LENGTH()            bfin_read16(CAN0_MB02_LENGTH)
2086 #define bfin_write_CAN0_MB02_LENGTH(val)        bfin_write16(CAN0_MB02_LENGTH, val)
2087 #define bfin_read_CAN0_MB02_TIMESTAMP()         bfin_read16(CAN0_MB02_TIMESTAMP)
2088 #define bfin_write_CAN0_MB02_TIMESTAMP(val)     bfin_write16(CAN0_MB02_TIMESTAMP, val)
2089 #define bfin_read_CAN0_MB02_ID0()               bfin_read16(CAN0_MB02_ID0)
2090 #define bfin_write_CAN0_MB02_ID0(val)           bfin_write16(CAN0_MB02_ID0, val)
2091 #define bfin_read_CAN0_MB02_ID1()               bfin_read16(CAN0_MB02_ID1)
2092 #define bfin_write_CAN0_MB02_ID1(val)           bfin_write16(CAN0_MB02_ID1, val)
2093 #define bfin_read_CAN0_MB03_DATA0()             bfin_read16(CAN0_MB03_DATA0)
2094 #define bfin_write_CAN0_MB03_DATA0(val)         bfin_write16(CAN0_MB03_DATA0, val)
2095 #define bfin_read_CAN0_MB03_DATA1()             bfin_read16(CAN0_MB03_DATA1)
2096 #define bfin_write_CAN0_MB03_DATA1(val)         bfin_write16(CAN0_MB03_DATA1, val)
2097 #define bfin_read_CAN0_MB03_DATA2()             bfin_read16(CAN0_MB03_DATA2)
2098 #define bfin_write_CAN0_MB03_DATA2(val)         bfin_write16(CAN0_MB03_DATA2, val)
2099 #define bfin_read_CAN0_MB03_DATA3()             bfin_read16(CAN0_MB03_DATA3)
2100 #define bfin_write_CAN0_MB03_DATA3(val)         bfin_write16(CAN0_MB03_DATA3, val)
2101 #define bfin_read_CAN0_MB03_LENGTH()            bfin_read16(CAN0_MB03_LENGTH)
2102 #define bfin_write_CAN0_MB03_LENGTH(val)        bfin_write16(CAN0_MB03_LENGTH, val)
2103 #define bfin_read_CAN0_MB03_TIMESTAMP()         bfin_read16(CAN0_MB03_TIMESTAMP)
2104 #define bfin_write_CAN0_MB03_TIMESTAMP(val)     bfin_write16(CAN0_MB03_TIMESTAMP, val)
2105 #define bfin_read_CAN0_MB03_ID0()               bfin_read16(CAN0_MB03_ID0)
2106 #define bfin_write_CAN0_MB03_ID0(val)           bfin_write16(CAN0_MB03_ID0, val)
2107 #define bfin_read_CAN0_MB03_ID1()               bfin_read16(CAN0_MB03_ID1)
2108 #define bfin_write_CAN0_MB03_ID1(val)           bfin_write16(CAN0_MB03_ID1, val)
2109 #define bfin_read_CAN0_MB04_DATA0()             bfin_read16(CAN0_MB04_DATA0)
2110 #define bfin_write_CAN0_MB04_DATA0(val)         bfin_write16(CAN0_MB04_DATA0, val)
2111 #define bfin_read_CAN0_MB04_DATA1()             bfin_read16(CAN0_MB04_DATA1)
2112 #define bfin_write_CAN0_MB04_DATA1(val)         bfin_write16(CAN0_MB04_DATA1, val)
2113 #define bfin_read_CAN0_MB04_DATA2()             bfin_read16(CAN0_MB04_DATA2)
2114 #define bfin_write_CAN0_MB04_DATA2(val)         bfin_write16(CAN0_MB04_DATA2, val)
2115 #define bfin_read_CAN0_MB04_DATA3()             bfin_read16(CAN0_MB04_DATA3)
2116 #define bfin_write_CAN0_MB04_DATA3(val)         bfin_write16(CAN0_MB04_DATA3, val)
2117 #define bfin_read_CAN0_MB04_LENGTH()            bfin_read16(CAN0_MB04_LENGTH)
2118 #define bfin_write_CAN0_MB04_LENGTH(val)        bfin_write16(CAN0_MB04_LENGTH, val)
2119 #define bfin_read_CAN0_MB04_TIMESTAMP()         bfin_read16(CAN0_MB04_TIMESTAMP)
2120 #define bfin_write_CAN0_MB04_TIMESTAMP(val)     bfin_write16(CAN0_MB04_TIMESTAMP, val)
2121 #define bfin_read_CAN0_MB04_ID0()               bfin_read16(CAN0_MB04_ID0)
2122 #define bfin_write_CAN0_MB04_ID0(val)           bfin_write16(CAN0_MB04_ID0, val)
2123 #define bfin_read_CAN0_MB04_ID1()               bfin_read16(CAN0_MB04_ID1)
2124 #define bfin_write_CAN0_MB04_ID1(val)           bfin_write16(CAN0_MB04_ID1, val)
2125 #define bfin_read_CAN0_MB05_DATA0()             bfin_read16(CAN0_MB05_DATA0)
2126 #define bfin_write_CAN0_MB05_DATA0(val)         bfin_write16(CAN0_MB05_DATA0, val)
2127 #define bfin_read_CAN0_MB05_DATA1()             bfin_read16(CAN0_MB05_DATA1)
2128 #define bfin_write_CAN0_MB05_DATA1(val)         bfin_write16(CAN0_MB05_DATA1, val)
2129 #define bfin_read_CAN0_MB05_DATA2()             bfin_read16(CAN0_MB05_DATA2)
2130 #define bfin_write_CAN0_MB05_DATA2(val)         bfin_write16(CAN0_MB05_DATA2, val)
2131 #define bfin_read_CAN0_MB05_DATA3()             bfin_read16(CAN0_MB05_DATA3)
2132 #define bfin_write_CAN0_MB05_DATA3(val)         bfin_write16(CAN0_MB05_DATA3, val)
2133 #define bfin_read_CAN0_MB05_LENGTH()            bfin_read16(CAN0_MB05_LENGTH)
2134 #define bfin_write_CAN0_MB05_LENGTH(val)        bfin_write16(CAN0_MB05_LENGTH, val)
2135 #define bfin_read_CAN0_MB05_TIMESTAMP()         bfin_read16(CAN0_MB05_TIMESTAMP)
2136 #define bfin_write_CAN0_MB05_TIMESTAMP(val)     bfin_write16(CAN0_MB05_TIMESTAMP, val)
2137 #define bfin_read_CAN0_MB05_ID0()               bfin_read16(CAN0_MB05_ID0)
2138 #define bfin_write_CAN0_MB05_ID0(val)           bfin_write16(CAN0_MB05_ID0, val)
2139 #define bfin_read_CAN0_MB05_ID1()               bfin_read16(CAN0_MB05_ID1)
2140 #define bfin_write_CAN0_MB05_ID1(val)           bfin_write16(CAN0_MB05_ID1, val)
2141 #define bfin_read_CAN0_MB06_DATA0()             bfin_read16(CAN0_MB06_DATA0)
2142 #define bfin_write_CAN0_MB06_DATA0(val)         bfin_write16(CAN0_MB06_DATA0, val)
2143 #define bfin_read_CAN0_MB06_DATA1()             bfin_read16(CAN0_MB06_DATA1)
2144 #define bfin_write_CAN0_MB06_DATA1(val)         bfin_write16(CAN0_MB06_DATA1, val)
2145 #define bfin_read_CAN0_MB06_DATA2()             bfin_read16(CAN0_MB06_DATA2)
2146 #define bfin_write_CAN0_MB06_DATA2(val)         bfin_write16(CAN0_MB06_DATA2, val)
2147 #define bfin_read_CAN0_MB06_DATA3()             bfin_read16(CAN0_MB06_DATA3)
2148 #define bfin_write_CAN0_MB06_DATA3(val)         bfin_write16(CAN0_MB06_DATA3, val)
2149 #define bfin_read_CAN0_MB06_LENGTH()            bfin_read16(CAN0_MB06_LENGTH)
2150 #define bfin_write_CAN0_MB06_LENGTH(val)        bfin_write16(CAN0_MB06_LENGTH, val)
2151 #define bfin_read_CAN0_MB06_TIMESTAMP()         bfin_read16(CAN0_MB06_TIMESTAMP)
2152 #define bfin_write_CAN0_MB06_TIMESTAMP(val)     bfin_write16(CAN0_MB06_TIMESTAMP, val)
2153 #define bfin_read_CAN0_MB06_ID0()               bfin_read16(CAN0_MB06_ID0)
2154 #define bfin_write_CAN0_MB06_ID0(val)           bfin_write16(CAN0_MB06_ID0, val)
2155 #define bfin_read_CAN0_MB06_ID1()               bfin_read16(CAN0_MB06_ID1)
2156 #define bfin_write_CAN0_MB06_ID1(val)           bfin_write16(CAN0_MB06_ID1, val)
2157 #define bfin_read_CAN0_MB07_DATA0()             bfin_read16(CAN0_MB07_DATA0)
2158 #define bfin_write_CAN0_MB07_DATA0(val)         bfin_write16(CAN0_MB07_DATA0, val)
2159 #define bfin_read_CAN0_MB07_DATA1()             bfin_read16(CAN0_MB07_DATA1)
2160 #define bfin_write_CAN0_MB07_DATA1(val)         bfin_write16(CAN0_MB07_DATA1, val)
2161 #define bfin_read_CAN0_MB07_DATA2()             bfin_read16(CAN0_MB07_DATA2)
2162 #define bfin_write_CAN0_MB07_DATA2(val)         bfin_write16(CAN0_MB07_DATA2, val)
2163 #define bfin_read_CAN0_MB07_DATA3()             bfin_read16(CAN0_MB07_DATA3)
2164 #define bfin_write_CAN0_MB07_DATA3(val)         bfin_write16(CAN0_MB07_DATA3, val)
2165 #define bfin_read_CAN0_MB07_LENGTH()            bfin_read16(CAN0_MB07_LENGTH)
2166 #define bfin_write_CAN0_MB07_LENGTH(val)        bfin_write16(CAN0_MB07_LENGTH, val)
2167 #define bfin_read_CAN0_MB07_TIMESTAMP()         bfin_read16(CAN0_MB07_TIMESTAMP)
2168 #define bfin_write_CAN0_MB07_TIMESTAMP(val)     bfin_write16(CAN0_MB07_TIMESTAMP, val)
2169 #define bfin_read_CAN0_MB07_ID0()               bfin_read16(CAN0_MB07_ID0)
2170 #define bfin_write_CAN0_MB07_ID0(val)           bfin_write16(CAN0_MB07_ID0, val)
2171 #define bfin_read_CAN0_MB07_ID1()               bfin_read16(CAN0_MB07_ID1)
2172 #define bfin_write_CAN0_MB07_ID1(val)           bfin_write16(CAN0_MB07_ID1, val)
2173 #define bfin_read_CAN0_MB08_DATA0()             bfin_read16(CAN0_MB08_DATA0)
2174 #define bfin_write_CAN0_MB08_DATA0(val)         bfin_write16(CAN0_MB08_DATA0, val)
2175 #define bfin_read_CAN0_MB08_DATA1()             bfin_read16(CAN0_MB08_DATA1)
2176 #define bfin_write_CAN0_MB08_DATA1(val)         bfin_write16(CAN0_MB08_DATA1, val)
2177 #define bfin_read_CAN0_MB08_DATA2()             bfin_read16(CAN0_MB08_DATA2)
2178 #define bfin_write_CAN0_MB08_DATA2(val)         bfin_write16(CAN0_MB08_DATA2, val)
2179 #define bfin_read_CAN0_MB08_DATA3()             bfin_read16(CAN0_MB08_DATA3)
2180 #define bfin_write_CAN0_MB08_DATA3(val)         bfin_write16(CAN0_MB08_DATA3, val)
2181 #define bfin_read_CAN0_MB08_LENGTH()            bfin_read16(CAN0_MB08_LENGTH)
2182 #define bfin_write_CAN0_MB08_LENGTH(val)        bfin_write16(CAN0_MB08_LENGTH, val)
2183 #define bfin_read_CAN0_MB08_TIMESTAMP()         bfin_read16(CAN0_MB08_TIMESTAMP)
2184 #define bfin_write_CAN0_MB08_TIMESTAMP(val)     bfin_write16(CAN0_MB08_TIMESTAMP, val)
2185 #define bfin_read_CAN0_MB08_ID0()               bfin_read16(CAN0_MB08_ID0)
2186 #define bfin_write_CAN0_MB08_ID0(val)           bfin_write16(CAN0_MB08_ID0, val)
2187 #define bfin_read_CAN0_MB08_ID1()               bfin_read16(CAN0_MB08_ID1)
2188 #define bfin_write_CAN0_MB08_ID1(val)           bfin_write16(CAN0_MB08_ID1, val)
2189 #define bfin_read_CAN0_MB09_DATA0()             bfin_read16(CAN0_MB09_DATA0)
2190 #define bfin_write_CAN0_MB09_DATA0(val)         bfin_write16(CAN0_MB09_DATA0, val)
2191 #define bfin_read_CAN0_MB09_DATA1()             bfin_read16(CAN0_MB09_DATA1)
2192 #define bfin_write_CAN0_MB09_DATA1(val)         bfin_write16(CAN0_MB09_DATA1, val)
2193 #define bfin_read_CAN0_MB09_DATA2()             bfin_read16(CAN0_MB09_DATA2)
2194 #define bfin_write_CAN0_MB09_DATA2(val)         bfin_write16(CAN0_MB09_DATA2, val)
2195 #define bfin_read_CAN0_MB09_DATA3()             bfin_read16(CAN0_MB09_DATA3)
2196 #define bfin_write_CAN0_MB09_DATA3(val)         bfin_write16(CAN0_MB09_DATA3, val)
2197 #define bfin_read_CAN0_MB09_LENGTH()            bfin_read16(CAN0_MB09_LENGTH)
2198 #define bfin_write_CAN0_MB09_LENGTH(val)        bfin_write16(CAN0_MB09_LENGTH, val)
2199 #define bfin_read_CAN0_MB09_TIMESTAMP()         bfin_read16(CAN0_MB09_TIMESTAMP)
2200 #define bfin_write_CAN0_MB09_TIMESTAMP(val)     bfin_write16(CAN0_MB09_TIMESTAMP, val)
2201 #define bfin_read_CAN0_MB09_ID0()               bfin_read16(CAN0_MB09_ID0)
2202 #define bfin_write_CAN0_MB09_ID0(val)           bfin_write16(CAN0_MB09_ID0, val)
2203 #define bfin_read_CAN0_MB09_ID1()               bfin_read16(CAN0_MB09_ID1)
2204 #define bfin_write_CAN0_MB09_ID1(val)           bfin_write16(CAN0_MB09_ID1, val)
2205 #define bfin_read_CAN0_MB10_DATA0()             bfin_read16(CAN0_MB10_DATA0)
2206 #define bfin_write_CAN0_MB10_DATA0(val)         bfin_write16(CAN0_MB10_DATA0, val)
2207 #define bfin_read_CAN0_MB10_DATA1()             bfin_read16(CAN0_MB10_DATA1)
2208 #define bfin_write_CAN0_MB10_DATA1(val)         bfin_write16(CAN0_MB10_DATA1, val)
2209 #define bfin_read_CAN0_MB10_DATA2()             bfin_read16(CAN0_MB10_DATA2)
2210 #define bfin_write_CAN0_MB10_DATA2(val)         bfin_write16(CAN0_MB10_DATA2, val)
2211 #define bfin_read_CAN0_MB10_DATA3()             bfin_read16(CAN0_MB10_DATA3)
2212 #define bfin_write_CAN0_MB10_DATA3(val)         bfin_write16(CAN0_MB10_DATA3, val)
2213 #define bfin_read_CAN0_MB10_LENGTH()            bfin_read16(CAN0_MB10_LENGTH)
2214 #define bfin_write_CAN0_MB10_LENGTH(val)        bfin_write16(CAN0_MB10_LENGTH, val)
2215 #define bfin_read_CAN0_MB10_TIMESTAMP()         bfin_read16(CAN0_MB10_TIMESTAMP)
2216 #define bfin_write_CAN0_MB10_TIMESTAMP(val)     bfin_write16(CAN0_MB10_TIMESTAMP, val)
2217 #define bfin_read_CAN0_MB10_ID0()               bfin_read16(CAN0_MB10_ID0)
2218 #define bfin_write_CAN0_MB10_ID0(val)           bfin_write16(CAN0_MB10_ID0, val)
2219 #define bfin_read_CAN0_MB10_ID1()               bfin_read16(CAN0_MB10_ID1)
2220 #define bfin_write_CAN0_MB10_ID1(val)           bfin_write16(CAN0_MB10_ID1, val)
2221 #define bfin_read_CAN0_MB11_DATA0()             bfin_read16(CAN0_MB11_DATA0)
2222 #define bfin_write_CAN0_MB11_DATA0(val)         bfin_write16(CAN0_MB11_DATA0, val)
2223 #define bfin_read_CAN0_MB11_DATA1()             bfin_read16(CAN0_MB11_DATA1)
2224 #define bfin_write_CAN0_MB11_DATA1(val)         bfin_write16(CAN0_MB11_DATA1, val)
2225 #define bfin_read_CAN0_MB11_DATA2()             bfin_read16(CAN0_MB11_DATA2)
2226 #define bfin_write_CAN0_MB11_DATA2(val)         bfin_write16(CAN0_MB11_DATA2, val)
2227 #define bfin_read_CAN0_MB11_DATA3()             bfin_read16(CAN0_MB11_DATA3)
2228 #define bfin_write_CAN0_MB11_DATA3(val)         bfin_write16(CAN0_MB11_DATA3, val)
2229 #define bfin_read_CAN0_MB11_LENGTH()            bfin_read16(CAN0_MB11_LENGTH)
2230 #define bfin_write_CAN0_MB11_LENGTH(val)        bfin_write16(CAN0_MB11_LENGTH, val)
2231 #define bfin_read_CAN0_MB11_TIMESTAMP()         bfin_read16(CAN0_MB11_TIMESTAMP)
2232 #define bfin_write_CAN0_MB11_TIMESTAMP(val)     bfin_write16(CAN0_MB11_TIMESTAMP, val)
2233 #define bfin_read_CAN0_MB11_ID0()               bfin_read16(CAN0_MB11_ID0)
2234 #define bfin_write_CAN0_MB11_ID0(val)           bfin_write16(CAN0_MB11_ID0, val)
2235 #define bfin_read_CAN0_MB11_ID1()               bfin_read16(CAN0_MB11_ID1)
2236 #define bfin_write_CAN0_MB11_ID1(val)           bfin_write16(CAN0_MB11_ID1, val)
2237 #define bfin_read_CAN0_MB12_DATA0()             bfin_read16(CAN0_MB12_DATA0)
2238 #define bfin_write_CAN0_MB12_DATA0(val)         bfin_write16(CAN0_MB12_DATA0, val)
2239 #define bfin_read_CAN0_MB12_DATA1()             bfin_read16(CAN0_MB12_DATA1)
2240 #define bfin_write_CAN0_MB12_DATA1(val)         bfin_write16(CAN0_MB12_DATA1, val)
2241 #define bfin_read_CAN0_MB12_DATA2()             bfin_read16(CAN0_MB12_DATA2)
2242 #define bfin_write_CAN0_MB12_DATA2(val)         bfin_write16(CAN0_MB12_DATA2, val)
2243 #define bfin_read_CAN0_MB12_DATA3()             bfin_read16(CAN0_MB12_DATA3)
2244 #define bfin_write_CAN0_MB12_DATA3(val)         bfin_write16(CAN0_MB12_DATA3, val)
2245 #define bfin_read_CAN0_MB12_LENGTH()            bfin_read16(CAN0_MB12_LENGTH)
2246 #define bfin_write_CAN0_MB12_LENGTH(val)        bfin_write16(CAN0_MB12_LENGTH, val)
2247 #define bfin_read_CAN0_MB12_TIMESTAMP()         bfin_read16(CAN0_MB12_TIMESTAMP)
2248 #define bfin_write_CAN0_MB12_TIMESTAMP(val)     bfin_write16(CAN0_MB12_TIMESTAMP, val)
2249 #define bfin_read_CAN0_MB12_ID0()               bfin_read16(CAN0_MB12_ID0)
2250 #define bfin_write_CAN0_MB12_ID0(val)           bfin_write16(CAN0_MB12_ID0, val)
2251 #define bfin_read_CAN0_MB12_ID1()               bfin_read16(CAN0_MB12_ID1)
2252 #define bfin_write_CAN0_MB12_ID1(val)           bfin_write16(CAN0_MB12_ID1, val)
2253 #define bfin_read_CAN0_MB13_DATA0()             bfin_read16(CAN0_MB13_DATA0)
2254 #define bfin_write_CAN0_MB13_DATA0(val)         bfin_write16(CAN0_MB13_DATA0, val)
2255 #define bfin_read_CAN0_MB13_DATA1()             bfin_read16(CAN0_MB13_DATA1)
2256 #define bfin_write_CAN0_MB13_DATA1(val)         bfin_write16(CAN0_MB13_DATA1, val)
2257 #define bfin_read_CAN0_MB13_DATA2()             bfin_read16(CAN0_MB13_DATA2)
2258 #define bfin_write_CAN0_MB13_DATA2(val)         bfin_write16(CAN0_MB13_DATA2, val)
2259 #define bfin_read_CAN0_MB13_DATA3()             bfin_read16(CAN0_MB13_DATA3)
2260 #define bfin_write_CAN0_MB13_DATA3(val)         bfin_write16(CAN0_MB13_DATA3, val)
2261 #define bfin_read_CAN0_MB13_LENGTH()            bfin_read16(CAN0_MB13_LENGTH)
2262 #define bfin_write_CAN0_MB13_LENGTH(val)        bfin_write16(CAN0_MB13_LENGTH, val)
2263 #define bfin_read_CAN0_MB13_TIMESTAMP()         bfin_read16(CAN0_MB13_TIMESTAMP)
2264 #define bfin_write_CAN0_MB13_TIMESTAMP(val)     bfin_write16(CAN0_MB13_TIMESTAMP, val)
2265 #define bfin_read_CAN0_MB13_ID0()               bfin_read16(CAN0_MB13_ID0)
2266 #define bfin_write_CAN0_MB13_ID0(val)           bfin_write16(CAN0_MB13_ID0, val)
2267 #define bfin_read_CAN0_MB13_ID1()               bfin_read16(CAN0_MB13_ID1)
2268 #define bfin_write_CAN0_MB13_ID1(val)           bfin_write16(CAN0_MB13_ID1, val)
2269 #define bfin_read_CAN0_MB14_DATA0()             bfin_read16(CAN0_MB14_DATA0)
2270 #define bfin_write_CAN0_MB14_DATA0(val)         bfin_write16(CAN0_MB14_DATA0, val)
2271 #define bfin_read_CAN0_MB14_DATA1()             bfin_read16(CAN0_MB14_DATA1)
2272 #define bfin_write_CAN0_MB14_DATA1(val)         bfin_write16(CAN0_MB14_DATA1, val)
2273 #define bfin_read_CAN0_MB14_DATA2()             bfin_read16(CAN0_MB14_DATA2)
2274 #define bfin_write_CAN0_MB14_DATA2(val)         bfin_write16(CAN0_MB14_DATA2, val)
2275 #define bfin_read_CAN0_MB14_DATA3()             bfin_read16(CAN0_MB14_DATA3)
2276 #define bfin_write_CAN0_MB14_DATA3(val)         bfin_write16(CAN0_MB14_DATA3, val)
2277 #define bfin_read_CAN0_MB14_LENGTH()            bfin_read16(CAN0_MB14_LENGTH)
2278 #define bfin_write_CAN0_MB14_LENGTH(val)        bfin_write16(CAN0_MB14_LENGTH, val)
2279 #define bfin_read_CAN0_MB14_TIMESTAMP()         bfin_read16(CAN0_MB14_TIMESTAMP)
2280 #define bfin_write_CAN0_MB14_TIMESTAMP(val)     bfin_write16(CAN0_MB14_TIMESTAMP, val)
2281 #define bfin_read_CAN0_MB14_ID0()               bfin_read16(CAN0_MB14_ID0)
2282 #define bfin_write_CAN0_MB14_ID0(val)           bfin_write16(CAN0_MB14_ID0, val)
2283 #define bfin_read_CAN0_MB14_ID1()               bfin_read16(CAN0_MB14_ID1)
2284 #define bfin_write_CAN0_MB14_ID1(val)           bfin_write16(CAN0_MB14_ID1, val)
2285 #define bfin_read_CAN0_MB15_DATA0()             bfin_read16(CAN0_MB15_DATA0)
2286 #define bfin_write_CAN0_MB15_DATA0(val)         bfin_write16(CAN0_MB15_DATA0, val)
2287 #define bfin_read_CAN0_MB15_DATA1()             bfin_read16(CAN0_MB15_DATA1)
2288 #define bfin_write_CAN0_MB15_DATA1(val)         bfin_write16(CAN0_MB15_DATA1, val)
2289 #define bfin_read_CAN0_MB15_DATA2()             bfin_read16(CAN0_MB15_DATA2)
2290 #define bfin_write_CAN0_MB15_DATA2(val)         bfin_write16(CAN0_MB15_DATA2, val)
2291 #define bfin_read_CAN0_MB15_DATA3()             bfin_read16(CAN0_MB15_DATA3)
2292 #define bfin_write_CAN0_MB15_DATA3(val)         bfin_write16(CAN0_MB15_DATA3, val)
2293 #define bfin_read_CAN0_MB15_LENGTH()            bfin_read16(CAN0_MB15_LENGTH)
2294 #define bfin_write_CAN0_MB15_LENGTH(val)        bfin_write16(CAN0_MB15_LENGTH, val)
2295 #define bfin_read_CAN0_MB15_TIMESTAMP()         bfin_read16(CAN0_MB15_TIMESTAMP)
2296 #define bfin_write_CAN0_MB15_TIMESTAMP(val)     bfin_write16(CAN0_MB15_TIMESTAMP, val)
2297 #define bfin_read_CAN0_MB15_ID0()               bfin_read16(CAN0_MB15_ID0)
2298 #define bfin_write_CAN0_MB15_ID0(val)           bfin_write16(CAN0_MB15_ID0, val)
2299 #define bfin_read_CAN0_MB15_ID1()               bfin_read16(CAN0_MB15_ID1)
2300 #define bfin_write_CAN0_MB15_ID1(val)           bfin_write16(CAN0_MB15_ID1, val)
2301
2302 /* CAN Controller 0 Mailbox Data Registers */
2303
2304 #define bfin_read_CAN0_MB16_DATA0()             bfin_read16(CAN0_MB16_DATA0)
2305 #define bfin_write_CAN0_MB16_DATA0(val)         bfin_write16(CAN0_MB16_DATA0, val)
2306 #define bfin_read_CAN0_MB16_DATA1()             bfin_read16(CAN0_MB16_DATA1)
2307 #define bfin_write_CAN0_MB16_DATA1(val)         bfin_write16(CAN0_MB16_DATA1, val)
2308 #define bfin_read_CAN0_MB16_DATA2()             bfin_read16(CAN0_MB16_DATA2)
2309 #define bfin_write_CAN0_MB16_DATA2(val)         bfin_write16(CAN0_MB16_DATA2, val)
2310 #define bfin_read_CAN0_MB16_DATA3()             bfin_read16(CAN0_MB16_DATA3)
2311 #define bfin_write_CAN0_MB16_DATA3(val)         bfin_write16(CAN0_MB16_DATA3, val)
2312 #define bfin_read_CAN0_MB16_LENGTH()            bfin_read16(CAN0_MB16_LENGTH)
2313 #define bfin_write_CAN0_MB16_LENGTH(val)        bfin_write16(CAN0_MB16_LENGTH, val)
2314 #define bfin_read_CAN0_MB16_TIMESTAMP()         bfin_read16(CAN0_MB16_TIMESTAMP)
2315 #define bfin_write_CAN0_MB16_TIMESTAMP(val)     bfin_write16(CAN0_MB16_TIMESTAMP, val)
2316 #define bfin_read_CAN0_MB16_ID0()               bfin_read16(CAN0_MB16_ID0)
2317 #define bfin_write_CAN0_MB16_ID0(val)           bfin_write16(CAN0_MB16_ID0, val)
2318 #define bfin_read_CAN0_MB16_ID1()               bfin_read16(CAN0_MB16_ID1)
2319 #define bfin_write_CAN0_MB16_ID1(val)           bfin_write16(CAN0_MB16_ID1, val)
2320 #define bfin_read_CAN0_MB17_DATA0()             bfin_read16(CAN0_MB17_DATA0)
2321 #define bfin_write_CAN0_MB17_DATA0(val)         bfin_write16(CAN0_MB17_DATA0, val)
2322 #define bfin_read_CAN0_MB17_DATA1()             bfin_read16(CAN0_MB17_DATA1)
2323 #define bfin_write_CAN0_MB17_DATA1(val)         bfin_write16(CAN0_MB17_DATA1, val)
2324 #define bfin_read_CAN0_MB17_DATA2()             bfin_read16(CAN0_MB17_DATA2)
2325 #define bfin_write_CAN0_MB17_DATA2(val)         bfin_write16(CAN0_MB17_DATA2, val)
2326 #define bfin_read_CAN0_MB17_DATA3()             bfin_read16(CAN0_MB17_DATA3)
2327 #define bfin_write_CAN0_MB17_DATA3(val)         bfin_write16(CAN0_MB17_DATA3, val)
2328 #define bfin_read_CAN0_MB17_LENGTH()            bfin_read16(CAN0_MB17_LENGTH)
2329 #define bfin_write_CAN0_MB17_LENGTH(val)        bfin_write16(CAN0_MB17_LENGTH, val)
2330 #define bfin_read_CAN0_MB17_TIMESTAMP()         bfin_read16(CAN0_MB17_TIMESTAMP)
2331 #define bfin_write_CAN0_MB17_TIMESTAMP(val)     bfin_write16(CAN0_MB17_TIMESTAMP, val)
2332 #define bfin_read_CAN0_MB17_ID0()               bfin_read16(CAN0_MB17_ID0)
2333 #define bfin_write_CAN0_MB17_ID0(val)           bfin_write16(CAN0_MB17_ID0, val)
2334 #define bfin_read_CAN0_MB17_ID1()               bfin_read16(CAN0_MB17_ID1)
2335 #define bfin_write_CAN0_MB17_ID1(val)           bfin_write16(CAN0_MB17_ID1, val)
2336 #define bfin_read_CAN0_MB18_DATA0()             bfin_read16(CAN0_MB18_DATA0)
2337 #define bfin_write_CAN0_MB18_DATA0(val)         bfin_write16(CAN0_MB18_DATA0, val)
2338 #define bfin_read_CAN0_MB18_DATA1()             bfin_read16(CAN0_MB18_DATA1)
2339 #define bfin_write_CAN0_MB18_DATA1(val)         bfin_write16(CAN0_MB18_DATA1, val)
2340 #define bfin_read_CAN0_MB18_DATA2()             bfin_read16(CAN0_MB18_DATA2)
2341 #define bfin_write_CAN0_MB18_DATA2(val)         bfin_write16(CAN0_MB18_DATA2, val)
2342 #define bfin_read_CAN0_MB18_DATA3()             bfin_read16(CAN0_MB18_DATA3)
2343 #define bfin_write_CAN0_MB18_DATA3(val)         bfin_write16(CAN0_MB18_DATA3, val)
2344 #define bfin_read_CAN0_MB18_LENGTH()            bfin_read16(CAN0_MB18_LENGTH)
2345 #define bfin_write_CAN0_MB18_LENGTH(val)        bfin_write16(CAN0_MB18_LENGTH, val)
2346 #define bfin_read_CAN0_MB18_TIMESTAMP()         bfin_read16(CAN0_MB18_TIMESTAMP)
2347 #define bfin_write_CAN0_MB18_TIMESTAMP(val)     bfin_write16(CAN0_MB18_TIMESTAMP, val)
2348 #define bfin_read_CAN0_MB18_ID0()               bfin_read16(CAN0_MB18_ID0)
2349 #define bfin_write_CAN0_MB18_ID0(val)           bfin_write16(CAN0_MB18_ID0, val)
2350 #define bfin_read_CAN0_MB18_ID1()               bfin_read16(CAN0_MB18_ID1)
2351 #define bfin_write_CAN0_MB18_ID1(val)           bfin_write16(CAN0_MB18_ID1, val)
2352 #define bfin_read_CAN0_MB19_DATA0()             bfin_read16(CAN0_MB19_DATA0)
2353 #define bfin_write_CAN0_MB19_DATA0(val)         bfin_write16(CAN0_MB19_DATA0, val)
2354 #define bfin_read_CAN0_MB19_DATA1()             bfin_read16(CAN0_MB19_DATA1)
2355 #define bfin_write_CAN0_MB19_DATA1(val)         bfin_write16(CAN0_MB19_DATA1, val)
2356 #define bfin_read_CAN0_MB19_DATA2()             bfin_read16(CAN0_MB19_DATA2)
2357 #define bfin_write_CAN0_MB19_DATA2(val)         bfin_write16(CAN0_MB19_DATA2, val)
2358 #define bfin_read_CAN0_MB19_DATA3()             bfin_read16(CAN0_MB19_DATA3)
2359 #define bfin_write_CAN0_MB19_DATA3(val)         bfin_write16(CAN0_MB19_DATA3, val)
2360 #define bfin_read_CAN0_MB19_LENGTH()            bfin_read16(CAN0_MB19_LENGTH)
2361 #define bfin_write_CAN0_MB19_LENGTH(val)        bfin_write16(CAN0_MB19_LENGTH, val)
2362 #define bfin_read_CAN0_MB19_TIMESTAMP()         bfin_read16(CAN0_MB19_TIMESTAMP)
2363 #define bfin_write_CAN0_MB19_TIMESTAMP(val)     bfin_write16(CAN0_MB19_TIMESTAMP, val)
2364 #define bfin_read_CAN0_MB19_ID0()               bfin_read16(CAN0_MB19_ID0)
2365 #define bfin_write_CAN0_MB19_ID0(val)           bfin_write16(CAN0_MB19_ID0, val)
2366 #define bfin_read_CAN0_MB19_ID1()               bfin_read16(CAN0_MB19_ID1)
2367 #define bfin_write_CAN0_MB19_ID1(val)           bfin_write16(CAN0_MB19_ID1, val)
2368 #define bfin_read_CAN0_MB20_DATA0()             bfin_read16(CAN0_MB20_DATA0)
2369 #define bfin_write_CAN0_MB20_DATA0(val)         bfin_write16(CAN0_MB20_DATA0, val)
2370 #define bfin_read_CAN0_MB20_DATA1()             bfin_read16(CAN0_MB20_DATA1)
2371 #define bfin_write_CAN0_MB20_DATA1(val)         bfin_write16(CAN0_MB20_DATA1, val)
2372 #define bfin_read_CAN0_MB20_DATA2()             bfin_read16(CAN0_MB20_DATA2)
2373 #define bfin_write_CAN0_MB20_DATA2(val)         bfin_write16(CAN0_MB20_DATA2, val)
2374 #define bfin_read_CAN0_MB20_DATA3()             bfin_read16(CAN0_MB20_DATA3)
2375 #define bfin_write_CAN0_MB20_DATA3(val)         bfin_write16(CAN0_MB20_DATA3, val)
2376 #define bfin_read_CAN0_MB20_LENGTH()            bfin_read16(CAN0_MB20_LENGTH)
2377 #define bfin_write_CAN0_MB20_LENGTH(val)        bfin_write16(CAN0_MB20_LENGTH, val)
2378 #define bfin_read_CAN0_MB20_TIMESTAMP()         bfin_read16(CAN0_MB20_TIMESTAMP)
2379 #define bfin_write_CAN0_MB20_TIMESTAMP(val)     bfin_write16(CAN0_MB20_TIMESTAMP, val)
2380 #define bfin_read_CAN0_MB20_ID0()               bfin_read16(CAN0_MB20_ID0)
2381 #define bfin_write_CAN0_MB20_ID0(val)           bfin_write16(CAN0_MB20_ID0, val)
2382 #define bfin_read_CAN0_MB20_ID1()               bfin_read16(CAN0_MB20_ID1)
2383 #define bfin_write_CAN0_MB20_ID1(val)           bfin_write16(CAN0_MB20_ID1, val)
2384 #define bfin_read_CAN0_MB21_DATA0()             bfin_read16(CAN0_MB21_DATA0)
2385 #define bfin_write_CAN0_MB21_DATA0(val)         bfin_write16(CAN0_MB21_DATA0, val)
2386 #define bfin_read_CAN0_MB21_DATA1()             bfin_read16(CAN0_MB21_DATA1)
2387 #define bfin_write_CAN0_MB21_DATA1(val)         bfin_write16(CAN0_MB21_DATA1, val)
2388 #define bfin_read_CAN0_MB21_DATA2()             bfin_read16(CAN0_MB21_DATA2)
2389 #define bfin_write_CAN0_MB21_DATA2(val)         bfin_write16(CAN0_MB21_DATA2, val)
2390 #define bfin_read_CAN0_MB21_DATA3()             bfin_read16(CAN0_MB21_DATA3)
2391 #define bfin_write_CAN0_MB21_DATA3(val)         bfin_write16(CAN0_MB21_DATA3, val)
2392 #define bfin_read_CAN0_MB21_LENGTH()            bfin_read16(CAN0_MB21_LENGTH)
2393 #define bfin_write_CAN0_MB21_LENGTH(val)        bfin_write16(CAN0_MB21_LENGTH, val)
2394 #define bfin_read_CAN0_MB21_TIMESTAMP()         bfin_read16(CAN0_MB21_TIMESTAMP)
2395 #define bfin_write_CAN0_MB21_TIMESTAMP(val)     bfin_write16(CAN0_MB21_TIMESTAMP, val)
2396 #define bfin_read_CAN0_MB21_ID0()               bfin_read16(CAN0_MB21_ID0)
2397 #define bfin_write_CAN0_MB21_ID0(val)           bfin_write16(CAN0_MB21_ID0, val)
2398 #define bfin_read_CAN0_MB21_ID1()               bfin_read16(CAN0_MB21_ID1)
2399 #define bfin_write_CAN0_MB21_ID1(val)           bfin_write16(CAN0_MB21_ID1, val)
2400 #define bfin_read_CAN0_MB22_DATA0()             bfin_read16(CAN0_MB22_DATA0)
2401 #define bfin_write_CAN0_MB22_DATA0(val)         bfin_write16(CAN0_MB22_DATA0, val)
2402 #define bfin_read_CAN0_MB22_DATA1()             bfin_read16(CAN0_MB22_DATA1)
2403 #define bfin_write_CAN0_MB22_DATA1(val)         bfin_write16(CAN0_MB22_DATA1, val)
2404 #define bfin_read_CAN0_MB22_DATA2()             bfin_read16(CAN0_MB22_DATA2)
2405 #define bfin_write_CAN0_MB22_DATA2(val)         bfin_write16(CAN0_MB22_DATA2, val)
2406 #define bfin_read_CAN0_MB22_DATA3()             bfin_read16(CAN0_MB22_DATA3)
2407 #define bfin_write_CAN0_MB22_DATA3(val)         bfin_write16(CAN0_MB22_DATA3, val)
2408 #define bfin_read_CAN0_MB22_LENGTH()            bfin_read16(CAN0_MB22_LENGTH)
2409 #define bfin_write_CAN0_MB22_LENGTH(val)        bfin_write16(CAN0_MB22_LENGTH, val)
2410 #define bfin_read_CAN0_MB22_TIMESTAMP()         bfin_read16(CAN0_MB22_TIMESTAMP)
2411 #define bfin_write_CAN0_MB22_TIMESTAMP(val)     bfin_write16(CAN0_MB22_TIMESTAMP, val)
2412 #define bfin_read_CAN0_MB22_ID0()               bfin_read16(CAN0_MB22_ID0)
2413 #define bfin_write_CAN0_MB22_ID0(val)           bfin_write16(CAN0_MB22_ID0, val)
2414 #define bfin_read_CAN0_MB22_ID1()               bfin_read16(CAN0_MB22_ID1)
2415 #define bfin_write_CAN0_MB22_ID1(val)           bfin_write16(CAN0_MB22_ID1, val)
2416 #define bfin_read_CAN0_MB23_DATA0()             bfin_read16(CAN0_MB23_DATA0)
2417 #define bfin_write_CAN0_MB23_DATA0(val)         bfin_write16(CAN0_MB23_DATA0, val)
2418 #define bfin_read_CAN0_MB23_DATA1()             bfin_read16(CAN0_MB23_DATA1)
2419 #define bfin_write_CAN0_MB23_DATA1(val)         bfin_write16(CAN0_MB23_DATA1, val)
2420 #define bfin_read_CAN0_MB23_DATA2()             bfin_read16(CAN0_MB23_DATA2)
2421 #define bfin_write_CAN0_MB23_DATA2(val)         bfin_write16(CAN0_MB23_DATA2, val)
2422 #define bfin_read_CAN0_MB23_DATA3()             bfin_read16(CAN0_MB23_DATA3)
2423 #define bfin_write_CAN0_MB23_DATA3(val)         bfin_write16(CAN0_MB23_DATA3, val)
2424 #define bfin_read_CAN0_MB23_LENGTH()            bfin_read16(CAN0_MB23_LENGTH)
2425 #define bfin_write_CAN0_MB23_LENGTH(val)        bfin_write16(CAN0_MB23_LENGTH, val)
2426 #define bfin_read_CAN0_MB23_TIMESTAMP()         bfin_read16(CAN0_MB23_TIMESTAMP)
2427 #define bfin_write_CAN0_MB23_TIMESTAMP(val)     bfin_write16(CAN0_MB23_TIMESTAMP, val)
2428 #define bfin_read_CAN0_MB23_ID0()               bfin_read16(CAN0_MB23_ID0)
2429 #define bfin_write_CAN0_MB23_ID0(val)           bfin_write16(CAN0_MB23_ID0, val)
2430 #define bfin_read_CAN0_MB23_ID1()               bfin_read16(CAN0_MB23_ID1)
2431 #define bfin_write_CAN0_MB23_ID1(val)           bfin_write16(CAN0_MB23_ID1, val)
2432 #define bfin_read_CAN0_MB24_DATA0()             bfin_read16(CAN0_MB24_DATA0)
2433 #define bfin_write_CAN0_MB24_DATA0(val)         bfin_write16(CAN0_MB24_DATA0, val)
2434 #define bfin_read_CAN0_MB24_DATA1()             bfin_read16(CAN0_MB24_DATA1)
2435 #define bfin_write_CAN0_MB24_DATA1(val)         bfin_write16(CAN0_MB24_DATA1, val)
2436 #define bfin_read_CAN0_MB24_DATA2()             bfin_read16(CAN0_MB24_DATA2)
2437 #define bfin_write_CAN0_MB24_DATA2(val)         bfin_write16(CAN0_MB24_DATA2, val)
2438 #define bfin_read_CAN0_MB24_DATA3()             bfin_read16(CAN0_MB24_DATA3)
2439 #define bfin_write_CAN0_MB24_DATA3(val)         bfin_write16(CAN0_MB24_DATA3, val)
2440 #define bfin_read_CAN0_MB24_LENGTH()            bfin_read16(CAN0_MB24_LENGTH)
2441 #define bfin_write_CAN0_MB24_LENGTH(val)        bfin_write16(CAN0_MB24_LENGTH, val)
2442 #define bfin_read_CAN0_MB24_TIMESTAMP()         bfin_read16(CAN0_MB24_TIMESTAMP)
2443 #define bfin_write_CAN0_MB24_TIMESTAMP(val)     bfin_write16(CAN0_MB24_TIMESTAMP, val)
2444 #define bfin_read_CAN0_MB24_ID0()               bfin_read16(CAN0_MB24_ID0)
2445 #define bfin_write_CAN0_MB24_ID0(val)           bfin_write16(CAN0_MB24_ID0, val)
2446 #define bfin_read_CAN0_MB24_ID1()               bfin_read16(CAN0_MB24_ID1)
2447 #define bfin_write_CAN0_MB24_ID1(val)           bfin_write16(CAN0_MB24_ID1, val)
2448 #define bfin_read_CAN0_MB25_DATA0()             bfin_read16(CAN0_MB25_DATA0)
2449 #define bfin_write_CAN0_MB25_DATA0(val)         bfin_write16(CAN0_MB25_DATA0, val)
2450 #define bfin_read_CAN0_MB25_DATA1()             bfin_read16(CAN0_MB25_DATA1)
2451 #define bfin_write_CAN0_MB25_DATA1(val)         bfin_write16(CAN0_MB25_DATA1, val)
2452 #define bfin_read_CAN0_MB25_DATA2()             bfin_read16(CAN0_MB25_DATA2)
2453 #define bfin_write_CAN0_MB25_DATA2(val)         bfin_write16(CAN0_MB25_DATA2, val)
2454 #define bfin_read_CAN0_MB25_DATA3()             bfin_read16(CAN0_MB25_DATA3)
2455 #define bfin_write_CAN0_MB25_DATA3(val)         bfin_write16(CAN0_MB25_DATA3, val)
2456 #define bfin_read_CAN0_MB25_LENGTH()            bfin_read16(CAN0_MB25_LENGTH)
2457 #define bfin_write_CAN0_MB25_LENGTH(val)        bfin_write16(CAN0_MB25_LENGTH, val)
2458 #define bfin_read_CAN0_MB25_TIMESTAMP()         bfin_read16(CAN0_MB25_TIMESTAMP)
2459 #define bfin_write_CAN0_MB25_TIMESTAMP(val)     bfin_write16(CAN0_MB25_TIMESTAMP, val)
2460 #define bfin_read_CAN0_MB25_ID0()               bfin_read16(CAN0_MB25_ID0)
2461 #define bfin_write_CAN0_MB25_ID0(val)           bfin_write16(CAN0_MB25_ID0, val)
2462 #define bfin_read_CAN0_MB25_ID1()               bfin_read16(CAN0_MB25_ID1)
2463 #define bfin_write_CAN0_MB25_ID1(val)           bfin_write16(CAN0_MB25_ID1, val)
2464 #define bfin_read_CAN0_MB26_DATA0()             bfin_read16(CAN0_MB26_DATA0)
2465 #define bfin_write_CAN0_MB26_DATA0(val)         bfin_write16(CAN0_MB26_DATA0, val)
2466 #define bfin_read_CAN0_MB26_DATA1()             bfin_read16(CAN0_MB26_DATA1)
2467 #define bfin_write_CAN0_MB26_DATA1(val)         bfin_write16(CAN0_MB26_DATA1, val)
2468 #define bfin_read_CAN0_MB26_DATA2()             bfin_read16(CAN0_MB26_DATA2)
2469 #define bfin_write_CAN0_MB26_DATA2(val)         bfin_write16(CAN0_MB26_DATA2, val)
2470 #define bfin_read_CAN0_MB26_DATA3()             bfin_read16(CAN0_MB26_DATA3)
2471 #define bfin_write_CAN0_MB26_DATA3(val)         bfin_write16(CAN0_MB26_DATA3, val)
2472 #define bfin_read_CAN0_MB26_LENGTH()            bfin_read16(CAN0_MB26_LENGTH)
2473 #define bfin_write_CAN0_MB26_LENGTH(val)        bfin_write16(CAN0_MB26_LENGTH, val)
2474 #define bfin_read_CAN0_MB26_TIMESTAMP()         bfin_read16(CAN0_MB26_TIMESTAMP)
2475 #define bfin_write_CAN0_MB26_TIMESTAMP(val)     bfin_write16(CAN0_MB26_TIMESTAMP, val)
2476 #define bfin_read_CAN0_MB26_ID0()               bfin_read16(CAN0_MB26_ID0)
2477 #define bfin_write_CAN0_MB26_ID0(val)           bfin_write16(CAN0_MB26_ID0, val)
2478 #define bfin_read_CAN0_MB26_ID1()               bfin_read16(CAN0_MB26_ID1)
2479 #define bfin_write_CAN0_MB26_ID1(val)           bfin_write16(CAN0_MB26_ID1, val)
2480 #define bfin_read_CAN0_MB27_DATA0()             bfin_read16(CAN0_MB27_DATA0)
2481 #define bfin_write_CAN0_MB27_DATA0(val)         bfin_write16(CAN0_MB27_DATA0, val)
2482 #define bfin_read_CAN0_MB27_DATA1()             bfin_read16(CAN0_MB27_DATA1)
2483 #define bfin_write_CAN0_MB27_DATA1(val)         bfin_write16(CAN0_MB27_DATA1, val)
2484 #define bfin_read_CAN0_MB27_DATA2()             bfin_read16(CAN0_MB27_DATA2)
2485 #define bfin_write_CAN0_MB27_DATA2(val)         bfin_write16(CAN0_MB27_DATA2, val)
2486 #define bfin_read_CAN0_MB27_DATA3()             bfin_read16(CAN0_MB27_DATA3)
2487 #define bfin_write_CAN0_MB27_DATA3(val)         bfin_write16(CAN0_MB27_DATA3, val)
2488 #define bfin_read_CAN0_MB27_LENGTH()            bfin_read16(CAN0_MB27_LENGTH)
2489 #define bfin_write_CAN0_MB27_LENGTH(val)        bfin_write16(CAN0_MB27_LENGTH, val)
2490 #define bfin_read_CAN0_MB27_TIMESTAMP()         bfin_read16(CAN0_MB27_TIMESTAMP)
2491 #define bfin_write_CAN0_MB27_TIMESTAMP(val)     bfin_write16(CAN0_MB27_TIMESTAMP, val)
2492 #define bfin_read_CAN0_MB27_ID0()               bfin_read16(CAN0_MB27_ID0)
2493 #define bfin_write_CAN0_MB27_ID0(val)           bfin_write16(CAN0_MB27_ID0, val)
2494 #define bfin_read_CAN0_MB27_ID1()               bfin_read16(CAN0_MB27_ID1)
2495 #define bfin_write_CAN0_MB27_ID1(val)           bfin_write16(CAN0_MB27_ID1, val)
2496 #define bfin_read_CAN0_MB28_DATA0()             bfin_read16(CAN0_MB28_DATA0)
2497 #define bfin_write_CAN0_MB28_DATA0(val)         bfin_write16(CAN0_MB28_DATA0, val)
2498 #define bfin_read_CAN0_MB28_DATA1()             bfin_read16(CAN0_MB28_DATA1)
2499 #define bfin_write_CAN0_MB28_DATA1(val)         bfin_write16(CAN0_MB28_DATA1, val)
2500 #define bfin_read_CAN0_MB28_DATA2()             bfin_read16(CAN0_MB28_DATA2)
2501 #define bfin_write_CAN0_MB28_DATA2(val)         bfin_write16(CAN0_MB28_DATA2, val)
2502 #define bfin_read_CAN0_MB28_DATA3()             bfin_read16(CAN0_MB28_DATA3)
2503 #define bfin_write_CAN0_MB28_DATA3(val)         bfin_write16(CAN0_MB28_DATA3, val)
2504 #define bfin_read_CAN0_MB28_LENGTH()            bfin_read16(CAN0_MB28_LENGTH)
2505 #define bfin_write_CAN0_MB28_LENGTH(val)        bfin_write16(CAN0_MB28_LENGTH, val)
2506 #define bfin_read_CAN0_MB28_TIMESTAMP()         bfin_read16(CAN0_MB28_TIMESTAMP)
2507 #define bfin_write_CAN0_MB28_TIMESTAMP(val)     bfin_write16(CAN0_MB28_TIMESTAMP, val)
2508 #define bfin_read_CAN0_MB28_ID0()               bfin_read16(CAN0_MB28_ID0)
2509 #define bfin_write_CAN0_MB28_ID0(val)           bfin_write16(CAN0_MB28_ID0, val)
2510 #define bfin_read_CAN0_MB28_ID1()               bfin_read16(CAN0_MB28_ID1)
2511 #define bfin_write_CAN0_MB28_ID1(val)           bfin_write16(CAN0_MB28_ID1, val)
2512 #define bfin_read_CAN0_MB29_DATA0()             bfin_read16(CAN0_MB29_DATA0)
2513 #define bfin_write_CAN0_MB29_DATA0(val)         bfin_write16(CAN0_MB29_DATA0, val)
2514 #define bfin_read_CAN0_MB29_DATA1()             bfin_read16(CAN0_MB29_DATA1)
2515 #define bfin_write_CAN0_MB29_DATA1(val)         bfin_write16(CAN0_MB29_DATA1, val)
2516 #define bfin_read_CAN0_MB29_DATA2()             bfin_read16(CAN0_MB29_DATA2)
2517 #define bfin_write_CAN0_MB29_DATA2(val)         bfin_write16(CAN0_MB29_DATA2, val)
2518 #define bfin_read_CAN0_MB29_DATA3()             bfin_read16(CAN0_MB29_DATA3)
2519 #define bfin_write_CAN0_MB29_DATA3(val)         bfin_write16(CAN0_MB29_DATA3, val)
2520 #define bfin_read_CAN0_MB29_LENGTH()            bfin_read16(CAN0_MB29_LENGTH)
2521 #define bfin_write_CAN0_MB29_LENGTH(val)        bfin_write16(CAN0_MB29_LENGTH, val)
2522 #define bfin_read_CAN0_MB29_TIMESTAMP()         bfin_read16(CAN0_MB29_TIMESTAMP)
2523 #define bfin_write_CAN0_MB29_TIMESTAMP(val)     bfin_write16(CAN0_MB29_TIMESTAMP, val)
2524 #define bfin_read_CAN0_MB29_ID0()               bfin_read16(CAN0_MB29_ID0)
2525 #define bfin_write_CAN0_MB29_ID0(val)           bfin_write16(CAN0_MB29_ID0, val)
2526 #define bfin_read_CAN0_MB29_ID1()               bfin_read16(CAN0_MB29_ID1)
2527 #define bfin_write_CAN0_MB29_ID1(val)           bfin_write16(CAN0_MB29_ID1, val)
2528 #define bfin_read_CAN0_MB30_DATA0()             bfin_read16(CAN0_MB30_DATA0)
2529 #define bfin_write_CAN0_MB30_DATA0(val)         bfin_write16(CAN0_MB30_DATA0, val)
2530 #define bfin_read_CAN0_MB30_DATA1()             bfin_read16(CAN0_MB30_DATA1)
2531 #define bfin_write_CAN0_MB30_DATA1(val)         bfin_write16(CAN0_MB30_DATA1, val)
2532 #define bfin_read_CAN0_MB30_DATA2()             bfin_read16(CAN0_MB30_DATA2)
2533 #define bfin_write_CAN0_MB30_DATA2(val)         bfin_write16(CAN0_MB30_DATA2, val)
2534 #define bfin_read_CAN0_MB30_DATA3()             bfin_read16(CAN0_MB30_DATA3)
2535 #define bfin_write_CAN0_MB30_DATA3(val)         bfin_write16(CAN0_MB30_DATA3, val)
2536 #define bfin_read_CAN0_MB30_LENGTH()            bfin_read16(CAN0_MB30_LENGTH)
2537 #define bfin_write_CAN0_MB30_LENGTH(val)        bfin_write16(CAN0_MB30_LENGTH, val)
2538 #define bfin_read_CAN0_MB30_TIMESTAMP()         bfin_read16(CAN0_MB30_TIMESTAMP)
2539 #define bfin_write_CAN0_MB30_TIMESTAMP(val)     bfin_write16(CAN0_MB30_TIMESTAMP, val)
2540 #define bfin_read_CAN0_MB30_ID0()               bfin_read16(CAN0_MB30_ID0)
2541 #define bfin_write_CAN0_MB30_ID0(val)           bfin_write16(CAN0_MB30_ID0, val)
2542 #define bfin_read_CAN0_MB30_ID1()               bfin_read16(CAN0_MB30_ID1)
2543 #define bfin_write_CAN0_MB30_ID1(val)           bfin_write16(CAN0_MB30_ID1, val)
2544 #define bfin_read_CAN0_MB31_DATA0()             bfin_read16(CAN0_MB31_DATA0)
2545 #define bfin_write_CAN0_MB31_DATA0(val)         bfin_write16(CAN0_MB31_DATA0, val)
2546 #define bfin_read_CAN0_MB31_DATA1()             bfin_read16(CAN0_MB31_DATA1)
2547 #define bfin_write_CAN0_MB31_DATA1(val)         bfin_write16(CAN0_MB31_DATA1, val)
2548 #define bfin_read_CAN0_MB31_DATA2()             bfin_read16(CAN0_MB31_DATA2)
2549 #define bfin_write_CAN0_MB31_DATA2(val)         bfin_write16(CAN0_MB31_DATA2, val)
2550 #define bfin_read_CAN0_MB31_DATA3()             bfin_read16(CAN0_MB31_DATA3)
2551 #define bfin_write_CAN0_MB31_DATA3(val)         bfin_write16(CAN0_MB31_DATA3, val)
2552 #define bfin_read_CAN0_MB31_LENGTH()            bfin_read16(CAN0_MB31_LENGTH)
2553 #define bfin_write_CAN0_MB31_LENGTH(val)        bfin_write16(CAN0_MB31_LENGTH, val)
2554 #define bfin_read_CAN0_MB31_TIMESTAMP()         bfin_read16(CAN0_MB31_TIMESTAMP)
2555 #define bfin_write_CAN0_MB31_TIMESTAMP(val)     bfin_write16(CAN0_MB31_TIMESTAMP, val)
2556 #define bfin_read_CAN0_MB31_ID0()               bfin_read16(CAN0_MB31_ID0)
2557 #define bfin_write_CAN0_MB31_ID0(val)           bfin_write16(CAN0_MB31_ID0, val)
2558 #define bfin_read_CAN0_MB31_ID1()               bfin_read16(CAN0_MB31_ID1)
2559 #define bfin_write_CAN0_MB31_ID1(val)           bfin_write16(CAN0_MB31_ID1, val)
2560
2561 /* UART3 Registers */
2562
2563 #define bfin_read_UART3_DLL()           bfin_read16(UART3_DLL)
2564 #define bfin_write_UART3_DLL(val)       bfin_write16(UART3_DLL, val)
2565 #define bfin_read_UART3_DLH()           bfin_read16(UART3_DLH)
2566 #define bfin_write_UART3_DLH(val)       bfin_write16(UART3_DLH, val)
2567 #define bfin_read_UART3_GCTL()          bfin_read16(UART3_GCTL)
2568 #define bfin_write_UART3_GCTL(val)      bfin_write16(UART3_GCTL, val)
2569 #define bfin_read_UART3_LCR()           bfin_read16(UART3_LCR)
2570 #define bfin_write_UART3_LCR(val)       bfin_write16(UART3_LCR, val)
2571 #define bfin_read_UART3_MCR()           bfin_read16(UART3_MCR)
2572 #define bfin_write_UART3_MCR(val)       bfin_write16(UART3_MCR, val)
2573 #define bfin_read_UART3_LSR()           bfin_read16(UART3_LSR)
2574 #define bfin_write_UART3_LSR(val)       bfin_write16(UART3_LSR, val)
2575 #define bfin_read_UART3_MSR()           bfin_read16(UART3_MSR)
2576 #define bfin_write_UART3_MSR(val)       bfin_write16(UART3_MSR, val)
2577 #define bfin_read_UART3_SCR()           bfin_read16(UART3_SCR)
2578 #define bfin_write_UART3_SCR(val)       bfin_write16(UART3_SCR, val)
2579 #define bfin_read_UART3_IER_SET()       bfin_read16(UART3_IER_SET)
2580 #define bfin_write_UART3_IER_SET(val)   bfin_write16(UART3_IER_SET, val)
2581 #define bfin_read_UART3_IER_CLEAR()     bfin_read16(UART3_IER_CLEAR)
2582 #define bfin_write_UART3_IER_CLEAR(val) bfin_write16(UART3_IER_CLEAR, val)
2583 #define bfin_read_UART3_THR()           bfin_read16(UART3_THR)
2584 #define bfin_write_UART3_THR(val)       bfin_write16(UART3_THR, val)
2585 #define bfin_read_UART3_RBR()           bfin_read16(UART3_RBR)
2586 #define bfin_write_UART3_RBR(val)       bfin_write16(UART3_RBR, val)
2587
2588 /* NFC Registers */
2589
2590 #define bfin_read_NFC_CTL()             bfin_read16(NFC_CTL)
2591 #define bfin_write_NFC_CTL(val)         bfin_write16(NFC_CTL, val)
2592 #define bfin_read_NFC_STAT()            bfin_read16(NFC_STAT)
2593 #define bfin_write_NFC_STAT(val)        bfin_write16(NFC_STAT, val)
2594 #define bfin_read_NFC_IRQSTAT()         bfin_read16(NFC_IRQSTAT)
2595 #define bfin_write_NFC_IRQSTAT(val)     bfin_write16(NFC_IRQSTAT, val)
2596 #define bfin_read_NFC_IRQMASK()         bfin_read16(NFC_IRQMASK)
2597 #define bfin_write_NFC_IRQMASK(val)     bfin_write16(NFC_IRQMASK, val)
2598 #define bfin_read_NFC_ECC0()            bfin_read16(NFC_ECC0)
2599 #define bfin_write_NFC_ECC0(val)        bfin_write16(NFC_ECC0, val)
2600 #define bfin_read_NFC_ECC1()            bfin_read16(NFC_ECC1)
2601 #define bfin_write_NFC_ECC1(val)        bfin_write16(NFC_ECC1, val)
2602 #define bfin_read_NFC_ECC2()            bfin_read16(NFC_ECC2)
2603 #define bfin_write_NFC_ECC2(val)        bfin_write16(NFC_ECC2, val)
2604 #define bfin_read_NFC_ECC3()            bfin_read16(NFC_ECC3)
2605 #define bfin_write_NFC_ECC3(val)        bfin_write16(NFC_ECC3, val)
2606 #define bfin_read_NFC_COUNT()           bfin_read16(NFC_COUNT)
2607 #define bfin_write_NFC_COUNT(val)       bfin_write16(NFC_COUNT, val)
2608 #define bfin_read_NFC_RST()             bfin_read16(NFC_RST)
2609 #define bfin_write_NFC_RST(val)         bfin_write16(NFC_RST, val)
2610 #define bfin_read_NFC_PGCTL()           bfin_read16(NFC_PGCTL)
2611 #define bfin_write_NFC_PGCTL(val)       bfin_write16(NFC_PGCTL, val)
2612 #define bfin_read_NFC_READ()            bfin_read16(NFC_READ)
2613 #define bfin_write_NFC_READ(val)        bfin_write16(NFC_READ, val)
2614 #define bfin_read_NFC_ADDR()            bfin_read16(NFC_ADDR)
2615 #define bfin_write_NFC_ADDR(val)        bfin_write16(NFC_ADDR, val)
2616 #define bfin_read_NFC_CMD()             bfin_read16(NFC_CMD)
2617 #define bfin_write_NFC_CMD(val)         bfin_write16(NFC_CMD, val)
2618 #define bfin_read_NFC_DATA_WR()         bfin_read16(NFC_DATA_WR)
2619 #define bfin_write_NFC_DATA_WR(val)     bfin_write16(NFC_DATA_WR, val)
2620 #define bfin_read_NFC_DATA_RD()         bfin_read16(NFC_DATA_RD)
2621 #define bfin_write_NFC_DATA_RD(val)     bfin_write16(NFC_DATA_RD, val)
2622
2623 /* Counter Registers */
2624
2625 #define bfin_read_CNT_CONFIG()          bfin_read16(CNT_CONFIG)
2626 #define bfin_write_CNT_CONFIG(val)      bfin_write16(CNT_CONFIG, val)
2627 #define bfin_read_CNT_IMASK()           bfin_read16(CNT_IMASK)
2628 #define bfin_write_CNT_IMASK(val)       bfin_write16(CNT_IMASK, val)
2629 #define bfin_read_CNT_STATUS()          bfin_read16(CNT_STATUS)
2630 #define bfin_write_CNT_STATUS(val)      bfin_write16(CNT_STATUS, val)
2631 #define bfin_read_CNT_COMMAND()         bfin_read16(CNT_COMMAND)
2632 #define bfin_write_CNT_COMMAND(val)     bfin_write16(CNT_COMMAND, val)
2633 #define bfin_read_CNT_DEBOUNCE()        bfin_read16(CNT_DEBOUNCE)
2634 #define bfin_write_CNT_DEBOUNCE(val)    bfin_write16(CNT_DEBOUNCE, val)
2635 #define bfin_read_CNT_COUNTER()         bfin_read32(CNT_COUNTER)
2636 #define bfin_write_CNT_COUNTER(val)     bfin_write32(CNT_COUNTER, val)
2637 #define bfin_read_CNT_MAX()             bfin_read32(CNT_MAX)
2638 #define bfin_write_CNT_MAX(val)         bfin_write32(CNT_MAX, val)
2639 #define bfin_read_CNT_MIN()             bfin_read32(CNT_MIN)
2640 #define bfin_write_CNT_MIN(val)         bfin_write32(CNT_MIN, val)
2641
2642 /* OTP/FUSE Registers */
2643
2644 #define bfin_read_OTP_CONTROL()         bfin_read16(OTP_CONTROL)
2645 #define bfin_write_OTP_CONTROL(val)     bfin_write16(OTP_CONTROL, val)
2646 #define bfin_read_OTP_BEN()             bfin_read16(OTP_BEN)
2647 #define bfin_write_OTP_BEN(val)         bfin_write16(OTP_BEN, val)
2648 #define bfin_read_OTP_STATUS()          bfin_read16(OTP_STATUS)
2649 #define bfin_write_OTP_STATUS(val)      bfin_write16(OTP_STATUS, val)
2650 #define bfin_read_OTP_TIMING()          bfin_read32(OTP_TIMING)
2651 #define bfin_write_OTP_TIMING(val)      bfin_write32(OTP_TIMING, val)
2652
2653 /* Security Registers */
2654
2655 #define bfin_read_SECURE_SYSSWT()       bfin_read32(SECURE_SYSSWT)
2656 #define bfin_write_SECURE_SYSSWT(val)   bfin_write32(SECURE_SYSSWT, val)
2657 #define bfin_read_SECURE_CONTROL()      bfin_read16(SECURE_CONTROL)
2658 #define bfin_write_SECURE_CONTROL(val)  bfin_write16(SECURE_CONTROL, val)
2659 #define bfin_read_SECURE_STATUS()       bfin_read16(SECURE_STATUS)
2660 #define bfin_write_SECURE_STATUS(val)   bfin_write16(SECURE_STATUS, val)
2661
2662 /* DMA Peribfin_read_()heral Mux Register */
2663
2664 #define bfin_read_DMAC1_PERIMUX()       bfin_read16(DMAC1_PERIMUX)
2665 #define bfin_write_DMAC1_PERIMUX(val)   bfin_write16(DMAC1_PERIMUX, val)
2666
2667 /* OTP Read/Write Data Buffer Registers */
2668
2669 #define bfin_read_OTP_DATA0()           bfin_read32(OTP_DATA0)
2670 #define bfin_write_OTP_DATA0(val)       bfin_write32(OTP_DATA0, val)
2671 #define bfin_read_OTP_DATA1()           bfin_read32(OTP_DATA1)
2672 #define bfin_write_OTP_DATA1(val)       bfin_write32(OTP_DATA1, val)
2673 #define bfin_read_OTP_DATA2()           bfin_read32(OTP_DATA2)
2674 #define bfin_write_OTP_DATA2(val)       bfin_write32(OTP_DATA2, val)
2675 #define bfin_read_OTP_DATA3()           bfin_read32(OTP_DATA3)
2676 #define bfin_write_OTP_DATA3(val)       bfin_write32(OTP_DATA3, val)
2677
2678 /* Handshake MDMA is not defined in the shared file because it is not available on the ADSP-BF542 bfin_read_()rocessor */
2679
2680 /* legacy definitions */
2681 #define bfin_read_EBIU_AMCBCTL0         bfin_read_EBIU_AMBCTL0
2682 #define bfin_write_EBIU_AMCBCTL0        bfin_write_EBIU_AMBCTL0
2683 #define bfin_read_EBIU_AMCBCTL1         bfin_read_EBIU_AMBCTL1
2684 #define bfin_write_EBIU_AMCBCTL1        bfin_write_EBIU_AMBCTL1
2685 #define bfin_read_PINT0_IRQ             bfin_read_PINT0_REQUEST
2686 #define bfin_write_PINT0_IRQ            bfin_write_PINT0_REQUEST
2687 #define bfin_read_PINT1_IRQ             bfin_read_PINT1_REQUEST
2688 #define bfin_write_PINT1_IRQ            bfin_write_PINT1_REQUEST
2689 #define bfin_read_PINT2_IRQ             bfin_read_PINT2_REQUEST
2690 #define bfin_write_PINT2_IRQ            bfin_write_PINT2_REQUEST
2691 #define bfin_read_PINT3_IRQ             bfin_read_PINT3_REQUEST
2692 #define bfin_write_PINT3_IRQ            bfin_write_PINT3_REQUEST
2693
2694 /* These need to be last due to the cdef/linux inter-dependencies */
2695 #include <asm/irq.h>
2696
2697 /* Writing to PLL_CTL initiates a PLL relock sequence. */
2698 static __inline__ void bfin_write_PLL_CTL(unsigned int val)
2699 {
2700         unsigned long flags, iwr0, iwr1, iwr2;
2701
2702         if (val == bfin_read_PLL_CTL())
2703                 return;
2704
2705         local_irq_save_hw(flags);
2706         /* Enable the PLL Wakeup bit in SIC IWR */
2707         iwr0 = bfin_read32(SIC_IWR0);
2708         iwr1 = bfin_read32(SIC_IWR1);
2709         iwr2 = bfin_read32(SIC_IWR2);
2710         /* Only allow PPL Wakeup) */
2711         bfin_write32(SIC_IWR0, IWR_ENABLE(0));
2712         bfin_write32(SIC_IWR1, 0);
2713         bfin_write32(SIC_IWR2, 0);
2714
2715         bfin_write16(PLL_CTL, val);
2716         SSYNC();
2717         asm("IDLE;");
2718
2719         bfin_write32(SIC_IWR0, iwr0);
2720         bfin_write32(SIC_IWR1, iwr1);
2721         bfin_write32(SIC_IWR2, iwr2);
2722         local_irq_restore_hw(flags);
2723 }
2724
2725 /* Writing to VR_CTL initiates a PLL relock sequence. */
2726 static __inline__ void bfin_write_VR_CTL(unsigned int val)
2727 {
2728         unsigned long flags, iwr0, iwr1, iwr2;
2729
2730         if (val == bfin_read_VR_CTL())
2731                 return;
2732
2733         local_irq_save_hw(flags);
2734         /* Enable the PLL Wakeup bit in SIC IWR */
2735         iwr0 = bfin_read32(SIC_IWR0);
2736         iwr1 = bfin_read32(SIC_IWR1);
2737         iwr2 = bfin_read32(SIC_IWR2);
2738         /* Only allow PPL Wakeup) */
2739         bfin_write32(SIC_IWR0, IWR_ENABLE(0));
2740         bfin_write32(SIC_IWR1, 0);
2741         bfin_write32(SIC_IWR2, 0);
2742
2743         bfin_write16(VR_CTL, val);
2744         SSYNC();
2745         asm("IDLE;");
2746
2747         bfin_write32(SIC_IWR0, iwr0);
2748         bfin_write32(SIC_IWR1, iwr1);
2749         bfin_write32(SIC_IWR2, iwr2);
2750         local_irq_restore_hw(flags);
2751 }
2752
2753 #endif /* _CDEF_BF54X_H */
2754