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   1 /*
   2  * File:         arch/blackfin/mach-bf518/boards/ezbrd.c
   3  * Based on:     arch/blackfin/mach-bf527/boards/ezbrd.c
   4  * Author:       Bryan Wu <cooloney@kernel.org>
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Modified:
  10  *               Copyright 2005 National ICT Australia (NICTA)
  11  *               Copyright 2004-2008 Analog Devices Inc.
  12  *
  13  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License as published by
  17  * the Free Software Foundation; either version 2 of the License, or
  18  * (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, see the file COPYING, or write
  27  * to the Free Software Foundation, Inc.,
  28  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  29  */
  30
  31 #include <linux/device.h>
  32 #include <linux/platform_device.h>
  33 #include <linux/mtd/mtd.h>
  34 #include <linux/mtd/partitions.h>
  35 #include <linux/mtd/physmap.h>
  36 #include <linux/spi/spi.h>
  37 #include <linux/spi/flash.h>
  38
  39 #include <linux/i2c.h>
  40 #include <linux/irq.h>
  41 #include <linux/interrupt.h>
  42 #include <asm/dma.h>
  43 #include <asm/bfin5xx_spi.h>
  44 #include <asm/reboot.h>
  45 #include <asm/portmux.h>
  46 #include <asm/dpmc.h>
  47 #include <asm/bfin_sdh.h>
  48 #include <linux/spi/ad7877.h>
  49 #include <net/dsa.h>
  50
  51 /*
  52  * Name the Board for the /proc/cpuinfo
  53  */
  54 const char bfin_board_name[] = "ADI BF518F-EZBRD";
  55
  56 /*
  57  *  Driver needs to know address, irq and flag pin.
  58  */
  59
  60 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  61 static struct mtd_partition ezbrd_partitions[] = {
  62         {
  63                 .name       = "bootloader(nor)",
  64                 .size       = 0x40000,
  65                 .offset     = 0,
  66         }, {
  67                 .name       = "linux kernel(nor)",
  68                 .size       = 0x1C0000,
  69                 .offset     = MTDPART_OFS_APPEND,
  70         }, {
  71                 .name       = "file system(nor)",
  72                 .size       = MTDPART_SIZ_FULL,
  73                 .offset     = MTDPART_OFS_APPEND,
  74         }
  75 };
  76
  77 static struct physmap_flash_data ezbrd_flash_data = {
  78         .width      = 2,
  79         .parts      = ezbrd_partitions,
  80         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
  81 };
  82
  83 static struct resource ezbrd_flash_resource = {
  84         .start = 0x20000000,
  85 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  86         .end   = 0x202fffff,
  87 #else
  88         .end   = 0x203fffff,
  89 #endif
  90         .flags = IORESOURCE_MEM,
  91 };
  92
  93 static struct platform_device ezbrd_flash_device = {
  94         .name          = "physmap-flash",
  95         .id            = 0,
  96         .dev = {
  97                 .platform_data = &ezbrd_flash_data,
  98         },
  99         .num_resources = 1,
 100         .resource      = &ezbrd_flash_resource,
 101 };
 102 #endif
 103
 104 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 105 static struct platform_device rtc_device = {
 106         .name = "rtc-bfin",
 107         .id   = -1,
 108 };
 109 #endif
 110
 111 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 112 static struct platform_device bfin_mii_bus = {
 113         .name = "bfin_mii_bus",
 114 };
 115
 116 static struct platform_device bfin_mac_device = {
 117         .name = "bfin_mac",
 118         .dev.platform_data = &bfin_mii_bus,
 119 };
 120
 121 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 122 static struct dsa_platform_data ksz8893m_switch_data = {
 123         .mii_bus = &bfin_mii_bus.dev,
 124         .netdev = &bfin_mac_device.dev,
 125         .port_names[0]  = NULL,
 126         .port_names[1]  = "eth%d",
 127         .port_names[2]  = "eth%d",
 128         .port_names[3]  = "cpu",
 129 };
 130
 131 static struct platform_device ksz8893m_switch_device = {
 132         .name           = "dsa",
 133         .id             = 0,
 134         .num_resources  = 0,
 135         .dev.platform_data = &ksz8893m_switch_data,
 136 };
 137 #endif
 138 #endif
 139
 140 #if defined(CONFIG_MTD_M25P80) \
 141         || defined(CONFIG_MTD_M25P80_MODULE)
 142 static struct mtd_partition bfin_spi_flash_partitions[] = {
 143         {
 144                 .name = "bootloader(spi)",
 145                 .size = 0x00040000,
 146                 .offset = 0,
 147                 .mask_flags = MTD_CAP_ROM
 148         }, {
 149                 .name = "linux kernel(spi)",
 150                 .size = MTDPART_SIZ_FULL,
 151                 .offset = MTDPART_OFS_APPEND,
 152         }
 153 };
 154
 155 static struct flash_platform_data bfin_spi_flash_data = {
 156         .name = "m25p80",
 157         .parts = bfin_spi_flash_partitions,
 158         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 159         .type = "m25p16",
 160 };
 161
 162 /* SPI flash chip (m25p64) */
 163 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 164         .enable_dma = 0,         /* use dma transfer with this chip*/
 165         .bits_per_word = 8,
 166 };
 167 #endif
 168
 169 #if defined(CONFIG_BFIN_SPI_ADC) \
 170         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 171 /* SPI ADC chip */
 172 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 173         .enable_dma = 1,         /* use dma transfer with this chip*/
 174         .bits_per_word = 16,
 175 };
 176 #endif
 177
 178 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 179 #if defined(CONFIG_NET_DSA_KSZ8893M) \
 180         || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 181 /* SPI SWITCH CHIP */
 182 static struct bfin5xx_spi_chip spi_switch_info = {
 183         .enable_dma = 0,
 184         .bits_per_word = 8,
 185 };
 186 #endif
 187 #endif
 188
 189 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 190 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 191         .enable_dma = 0,
 192         .bits_per_word = 8,
 193 };
 194 #endif
 195
 196 #if defined(CONFIG_PBX)
 197 static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
 198         .ctl_reg        = 0x4, /* send zero */
 199         .enable_dma     = 0,
 200         .bits_per_word  = 8,
 201         .cs_change_per_word = 1,
 202 };
 203 #endif
 204
 205 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 206 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 207         .enable_dma = 0,
 208         .bits_per_word = 16,
 209 };
 210
 211 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 212         .model                  = 7877,
 213         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 214         .x_plate_ohms           = 419,
 215         .y_plate_ohms           = 486,
 216         .pressure_max           = 1000,
 217         .pressure_min           = 0,
 218         .stopacq_polarity       = 1,
 219         .first_conversion_delay = 3,
 220         .acquisition_time       = 1,
 221         .averaging              = 1,
 222         .pen_down_acc_interval  = 1,
 223 };
 224 #endif
 225
 226 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 227          && defined(CONFIG_SND_SOC_WM8731_SPI)
 228 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 229         .enable_dma = 0,
 230         .bits_per_word = 16,
 231 };
 232 #endif
 233
 234 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 235 static struct bfin5xx_spi_chip spidev_chip_info = {
 236         .enable_dma = 0,
 237         .bits_per_word = 8,
 238 };
 239 #endif
 240
 241 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 242 #if defined(CONFIG_MTD_M25P80) \
 243         || defined(CONFIG_MTD_M25P80_MODULE)
 244         {
 245                 /* the modalias must be the same as spi device driver name */
 246                 .modalias = "m25p80", /* Name of spi_driver for this device */
 247                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 248                 .bus_num = 0, /* Framework bus number */
 249                 .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
 250                 .platform_data = &bfin_spi_flash_data,
 251                 .controller_data = &spi_flash_chip_info,
 252                 .mode = SPI_MODE_3,
 253         },
 254 #endif
 255
 256 #if defined(CONFIG_BFIN_SPI_ADC) \
 257         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 258         {
 259                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 260                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 261                 .bus_num = 0, /* Framework bus number */
 262                 .chip_select = 1, /* Framework chip select. */
 263                 .platform_data = NULL, /* No spi_driver specific config */
 264                 .controller_data = &spi_adc_chip_info,
 265         },
 266 #endif
 267
 268 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 269 #if defined(CONFIG_NET_DSA_KSZ8893M) \
 270         || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 271         {
 272                 .modalias = "ksz8893m",
 273                 .max_speed_hz = 5000000,
 274                 .bus_num = 0,
 275                 .chip_select = 1,
 276                 .platform_data = NULL,
 277                 .controller_data = &spi_switch_info,
 278                 .mode = SPI_MODE_3,
 279         },
 280 #endif
 281 #endif
 282
 283 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 284         {
 285                 .modalias = "mmc_spi",
 286                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 287                 .bus_num = 0,
 288                 .chip_select = 5,
 289                 .controller_data = &mmc_spi_chip_info,
 290                 .mode = SPI_MODE_3,
 291         },
 292 #endif
 293 #if defined(CONFIG_PBX)
 294         {
 295                 .modalias = "fxs-spi",
 296                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
 297                 .bus_num = 0,
 298                 .chip_select = 8 - CONFIG_J11_JUMPER,
 299                 .controller_data = &spi_si3xxx_chip_info,
 300                 .mode = SPI_MODE_3,
 301         },
 302         {
 303                 .modalias = "fxo-spi",
 304                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
 305                 .bus_num = 0,
 306                 .chip_select = 8 - CONFIG_J19_JUMPER,
 307                 .controller_data = &spi_si3xxx_chip_info,
 308                 .mode = SPI_MODE_3,
 309         },
 310 #endif
 311 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 312         {
 313                 .modalias               = "ad7877",
 314                 .platform_data          = &bfin_ad7877_ts_info,
 315                 .irq                    = IRQ_PF8,
 316                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 317                 .bus_num        = 0,
 318                 .chip_select  = 2,
 319                 .controller_data = &spi_ad7877_chip_info,
 320         },
 321 #endif
 322 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 323          && defined(CONFIG_SND_SOC_WM8731_SPI)
 324         {
 325                 .modalias       = "wm8731",
 326                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 327                 .bus_num        = 0,
 328                 .chip_select    = 5,
 329                 .controller_data = &spi_wm8731_chip_info,
 330                 .mode = SPI_MODE_0,
 331         },
 332 #endif
 333 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 334         {
 335                 .modalias = "spidev",
 336                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 337                 .bus_num = 0,
 338                 .chip_select = 1,
 339                 .controller_data = &spidev_chip_info,
 340         },
 341 #endif
 342 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 343         {
 344                 .modalias = "bfin-lq035q1-spi",
 345                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 346                 .bus_num = 0,
 347                 .chip_select = 1,
 348                 .controller_data = &lq035q1_spi_chip_info,
 349                 .mode = SPI_CPHA | SPI_CPOL,
 350         },
 351 #endif
 352 };
 353
 354 /* SPI controller data */
 355 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 356 /* SPI (0) */
 357 static struct bfin5xx_spi_master bfin_spi0_info = {
 358         .num_chipselect = 5,
 359         .enable_dma = 1,  /* master has the ability to do dma transfer */
 360         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 361 };
 362
 363 static struct resource bfin_spi0_resource[] = {
 364         [0] = {
 365                 .start = SPI0_REGBASE,
 366                 .end   = SPI0_REGBASE + 0xFF,
 367                 .flags = IORESOURCE_MEM,
 368                 },
 369         [1] = {
 370                 .start = CH_SPI0,
 371                 .end   = CH_SPI0,
 372                 .flags = IORESOURCE_DMA,
 373         },
 374         [2] = {
 375                 .start = IRQ_SPI0,
 376                 .end   = IRQ_SPI0,
 377                 .flags = IORESOURCE_IRQ,
 378         },
 379 };
 380
 381 static struct platform_device bfin_spi0_device = {
 382         .name = "bfin-spi",
 383         .id = 0, /* Bus number */
 384         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 385         .resource = bfin_spi0_resource,
 386         .dev = {
 387                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 388         },
 389 };
 390
 391 /* SPI (1) */
 392 static struct bfin5xx_spi_master bfin_spi1_info = {
 393         .num_chipselect = 5,
 394         .enable_dma = 1,  /* master has the ability to do dma transfer */
 395         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 396 };
 397
 398 static struct resource bfin_spi1_resource[] = {
 399         [0] = {
 400                 .start = SPI1_REGBASE,
 401                 .end   = SPI1_REGBASE + 0xFF,
 402                 .flags = IORESOURCE_MEM,
 403                 },
 404         [1] = {
 405                 .start = CH_SPI1,
 406                 .end   = CH_SPI1,
 407                 .flags = IORESOURCE_DMA,
 408         },
 409         [2] = {
 410                 .start = IRQ_SPI1,
 411                 .end   = IRQ_SPI1,
 412                 .flags = IORESOURCE_IRQ,
 413         },
 414 };
 415
 416 static struct platform_device bfin_spi1_device = {
 417         .name = "bfin-spi",
 418         .id = 1, /* Bus number */
 419         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
 420         .resource = bfin_spi1_resource,
 421         .dev = {
 422                 .platform_data = &bfin_spi1_info, /* Passed to driver */
 423         },
 424 };
 425 #endif  /* spi master and devices */
 426
 427 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 428 static struct resource bfin_uart_resources[] = {
 429 #ifdef CONFIG_SERIAL_BFIN_UART0
 430         {
 431                 .start = 0xFFC00400,
 432                 .end = 0xFFC004FF,
 433                 .flags = IORESOURCE_MEM,
 434         },
 435 #endif
 436 #ifdef CONFIG_SERIAL_BFIN_UART1
 437         {
 438                 .start = 0xFFC02000,
 439                 .end = 0xFFC020FF,
 440                 .flags = IORESOURCE_MEM,
 441         },
 442 #endif
 443 };
 444
 445 static struct platform_device bfin_uart_device = {
 446         .name = "bfin-uart",
 447         .id = 1,
 448         .num_resources = ARRAY_SIZE(bfin_uart_resources),
 449         .resource = bfin_uart_resources,
 450 };
 451 #endif
 452
 453 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 454 #ifdef CONFIG_BFIN_SIR0
 455 static struct resource bfin_sir0_resources[] = {
 456         {
 457                 .start = 0xFFC00400,
 458                 .end = 0xFFC004FF,
 459                 .flags = IORESOURCE_MEM,
 460         },
 461         {
 462                 .start = IRQ_UART0_RX,
 463                 .end = IRQ_UART0_RX+1,
 464                 .flags = IORESOURCE_IRQ,
 465         },
 466         {
 467                 .start = CH_UART0_RX,
 468                 .end = CH_UART0_RX+1,
 469                 .flags = IORESOURCE_DMA,
 470         },
 471 };
 472
 473 static struct platform_device bfin_sir0_device = {
 474         .name = "bfin_sir",
 475         .id = 0,
 476         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 477         .resource = bfin_sir0_resources,
 478 };
 479 #endif
 480 #ifdef CONFIG_BFIN_SIR1
 481 static struct resource bfin_sir1_resources[] = {
 482         {
 483                 .start = 0xFFC02000,
 484                 .end = 0xFFC020FF,
 485                 .flags = IORESOURCE_MEM,
 486         },
 487         {
 488                 .start = IRQ_UART1_RX,
 489                 .end = IRQ_UART1_RX+1,
 490                 .flags = IORESOURCE_IRQ,
 491         },
 492         {
 493                 .start = CH_UART1_RX,
 494                 .end = CH_UART1_RX+1,
 495                 .flags = IORESOURCE_DMA,
 496         },
 497 };
 498
 499 static struct platform_device bfin_sir1_device = {
 500         .name = "bfin_sir",
 501         .id = 1,
 502         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 503         .resource = bfin_sir1_resources,
 504 };
 505 #endif
 506 #endif
 507
 508 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 509 static struct resource bfin_twi0_resource[] = {
 510         [0] = {
 511                 .start = TWI0_REGBASE,
 512                 .end   = TWI0_REGBASE,
 513                 .flags = IORESOURCE_MEM,
 514         },
 515         [1] = {
 516                 .start = IRQ_TWI,
 517                 .end   = IRQ_TWI,
 518                 .flags = IORESOURCE_IRQ,
 519         },
 520 };
 521
 522 static struct platform_device i2c_bfin_twi_device = {
 523         .name = "i2c-bfin-twi",
 524         .id = 0,
 525         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 526         .resource = bfin_twi0_resource,
 527 };
 528 #endif
 529
 530 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 531 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
 532         {
 533                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 534         },
 535 #endif
 536 #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
 537         {
 538                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 539                 .irq = IRQ_PF8,
 540         },
 541 #endif
 542 };
 543
 544 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 545 static struct platform_device bfin_sport0_uart_device = {
 546         .name = "bfin-sport-uart",
 547         .id = 0,
 548 };
 549
 550 static struct platform_device bfin_sport1_uart_device = {
 551         .name = "bfin-sport-uart",
 552         .id = 1,
 553 };
 554 #endif
 555
 556 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 557 #include <linux/input.h>
 558 #include <linux/gpio_keys.h>
 559
 560 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 561         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 562         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 563 };
 564
 565 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 566         .buttons        = bfin_gpio_keys_table,
 567         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 568 };
 569
 570 static struct platform_device bfin_device_gpiokeys = {
 571         .name      = "gpio-keys",
 572         .dev = {
 573                 .platform_data = &bfin_gpio_keys_data,
 574         },
 575 };
 576 #endif
 577
 578 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 579
 580 static struct bfin_sd_host bfin_sdh_data = {
 581         .dma_chan = CH_RSI,
 582         .irq_int0 = IRQ_RSI_INT0,
 583         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 584 };
 585
 586 static struct platform_device bf51x_sdh_device = {
 587         .name = "bfin-sdh",
 588         .id = 0,
 589         .dev = {
 590                 .platform_data = &bfin_sdh_data,
 591         },
 592 };
 593 #endif
 594
 595 static struct resource bfin_gpios_resources = {
 596         .start = 0,
 597         .end   = MAX_BLACKFIN_GPIOS - 1,
 598         .flags = IORESOURCE_IRQ,
 599 };
 600
 601 static struct platform_device bfin_gpios_device = {
 602         .name = "simple-gpio",
 603         .id = -1,
 604         .num_resources = 1,
 605         .resource = &bfin_gpios_resources,
 606 };
 607
 608 static const unsigned int cclk_vlev_datasheet[] =
 609 {
 610         VRPAIR(VLEV_100, 400000000),
 611         VRPAIR(VLEV_105, 426000000),
 612         VRPAIR(VLEV_110, 500000000),
 613         VRPAIR(VLEV_115, 533000000),
 614         VRPAIR(VLEV_120, 600000000),
 615 };
 616
 617 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 618         .tuple_tab = cclk_vlev_datasheet,
 619         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 620         .vr_settling_time = 25 /* us */,
 621 };
 622
 623 static struct platform_device bfin_dpmc = {
 624         .name = "bfin dpmc",
 625         .dev = {
 626                 .platform_data = &bfin_dmpc_vreg_data,
 627         },
 628 };
 629
 630 static struct platform_device *stamp_devices[] __initdata = {
 631
 632         &bfin_dpmc,
 633
 634 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 635         &rtc_device,
 636 #endif
 637
 638 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 639         &bfin_mii_bus,
 640         &bfin_mac_device,
 641 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 642         &ksz8893m_switch_device,
 643 #endif
 644 #endif
 645
 646 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 647         &bfin_spi0_device,
 648         &bfin_spi1_device,
 649 #endif
 650
 651 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 652         &bfin_uart_device,
 653 #endif
 654
 655 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 656 #ifdef CONFIG_BFIN_SIR0
 657         &bfin_sir0_device,
 658 #endif
 659 #ifdef CONFIG_BFIN_SIR1
 660         &bfin_sir1_device,
 661 #endif
 662 #endif
 663
 664 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 665         &i2c_bfin_twi_device,
 666 #endif
 667
 668 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 669         &bfin_sport0_uart_device,
 670         &bfin_sport1_uart_device,
 671 #endif
 672
 673 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 674         &bfin_device_gpiokeys,
 675 #endif
 676
 677 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 678         &bf51x_sdh_device,
 679 #endif
 680
 681 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 682         &ezbrd_flash_device,
 683 #endif
 684
 685         &bfin_gpios_device,
 686 };
 687
 688 static int __init ezbrd_init(void)
 689 {
 690         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 691         i2c_register_board_info(0, bfin_i2c_board_info,
 692                                 ARRAY_SIZE(bfin_i2c_board_info));
 693         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 694         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 695         /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
 696         peripheral_request(P_AMS2, "ParaFlash");
 697 #if !defined(CONFIG_SPI_BFIN) && !defined(CONFIG_SPI_BFIN_MODULE)
 698         peripheral_request(P_AMS3, "ParaFlash");
 699 #endif
 700         return 0;
 701 }
 702
 703 arch_initcall(ezbrd_init);
 704
 705 void native_machine_restart(char *cmd)
 706 {
 707         /* workaround reboot hang when booting from SPI */
 708         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 709                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 710 }
 711
 712 void bfin_get_ether_addr(char *addr)
 713 {
 714         /* the MAC is stored in OTP memory page 0xDF */
 715         u32 ret;
 716         u64 otp_mac;
 717         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 718
 719         ret = otp_read(0xDF, 0x00, &otp_mac);
 720         if (!(ret & 0x1)) {
 721                 char *otp_mac_p = (char *)&otp_mac;
 722                 for (ret = 0; ret < 6; ++ret)
 723                         addr[ret] = otp_mac_p[5 - ret];
 724         }
 725 }
 726 EXPORT_SYMBOL(bfin_get_ether_addr);