2 * arch/blackfin/kernel/setup.c
4 * Copyright 2004-2006 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #include <linux/delay.h>
12 #include <linux/console.h>
13 #include <linux/bootmem.h>
14 #include <linux/seq_file.h>
15 #include <linux/cpu.h>
17 #include <linux/module.h>
18 #include <linux/tty.h>
19 #include <linux/pfn.h>
21 #ifdef CONFIG_MTD_UCLINUX
22 #include <linux/mtd/map.h>
23 #include <linux/ext2_fs.h>
24 #include <linux/cramfs_fs.h>
25 #include <linux/romfs_fs.h>
29 #include <asm/cacheflush.h>
30 #include <asm/blackfin.h>
31 #include <asm/cplbinit.h>
32 #include <asm/div64.h>
34 #include <asm/fixed_code.h>
35 #include <asm/early_printk.h>
38 EXPORT_SYMBOL(_bfin_swrst);
40 unsigned long memory_start, memory_end, physical_mem_end;
41 unsigned long _rambase, _ramstart, _ramend;
42 unsigned long reserved_mem_dcache_on;
43 unsigned long reserved_mem_icache_on;
44 EXPORT_SYMBOL(memory_start);
45 EXPORT_SYMBOL(memory_end);
46 EXPORT_SYMBOL(physical_mem_end);
47 EXPORT_SYMBOL(_ramend);
48 EXPORT_SYMBOL(reserved_mem_dcache_on);
50 #ifdef CONFIG_MTD_UCLINUX
51 extern struct map_info uclinux_ram_map;
52 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
54 EXPORT_SYMBOL(memory_mtd_end);
55 EXPORT_SYMBOL(memory_mtd_start);
56 EXPORT_SYMBOL(mtd_size);
59 char __initdata command_line[COMMAND_LINE_SIZE];
60 void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
61 *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
63 /* boot memmap, for parsing "memmap=" */
64 #define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
65 #define BFIN_MEMMAP_RAM 1
66 #define BFIN_MEMMAP_RESERVED 2
67 static struct bfin_memmap {
69 struct bfin_memmap_entry {
70 unsigned long long addr; /* start of memory segment */
71 unsigned long long size;
73 } map[BFIN_MEMMAP_MAX];
74 } bfin_memmap __initdata;
76 /* for memmap sanitization */
77 struct change_member {
78 struct bfin_memmap_entry *pentry; /* pointer to original entry */
79 unsigned long long addr; /* address for this change point */
81 static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
82 static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
83 static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
84 static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
86 DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
88 static int early_init_clkin_hz(char *buf);
90 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
91 void __init generate_cplb_tables(void)
95 generate_cplb_tables_all();
96 /* Generate per-CPU I&D CPLB tables */
97 for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
98 generate_cplb_tables_cpu(cpu);
102 void __cpuinit bfin_setup_caches(unsigned int cpu)
104 #ifdef CONFIG_BFIN_ICACHE
105 bfin_icache_init(icplb_tbl[cpu]);
108 #ifdef CONFIG_BFIN_DCACHE
109 bfin_dcache_init(dcplb_tbl[cpu]);
113 * In cache coherence emulation mode, we need to have the
114 * D-cache enabled before running any atomic operation which
115 * might invove cache invalidation (i.e. spinlock, rwlock).
116 * So printk's are deferred until then.
118 #ifdef CONFIG_BFIN_ICACHE
119 printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
120 printk(KERN_INFO " External memory:"
121 # ifdef CONFIG_BFIN_EXTMEM_ICACHEABLE
126 " in instruction cache\n");
128 printk(KERN_INFO " L2 SRAM :"
129 # ifdef CONFIG_BFIN_L2_ICACHEABLE
134 " in instruction cache\n");
137 printk(KERN_INFO "Instruction Cache Disabled for CPU%u\n", cpu);
140 #ifdef CONFIG_BFIN_DCACHE
141 printk(KERN_INFO "Data Cache Enabled for CPU%u\n", cpu);
142 printk(KERN_INFO " External memory:"
143 # if defined CONFIG_BFIN_EXTMEM_WRITEBACK
144 " cacheable (write-back)"
145 # elif defined CONFIG_BFIN_EXTMEM_WRITETHROUGH
146 " cacheable (write-through)"
152 printk(KERN_INFO " L2 SRAM :"
153 # if defined CONFIG_BFIN_L2_WRITEBACK
154 " cacheable (write-back)"
155 # elif defined CONFIG_BFIN_L2_WRITETHROUGH
156 " cacheable (write-through)"
162 printk(KERN_INFO "Data Cache Disabled for CPU%u\n", cpu);
166 void __cpuinit bfin_setup_cpudata(unsigned int cpu)
168 struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
170 cpudata->idle = current;
171 cpudata->loops_per_jiffy = loops_per_jiffy;
172 cpudata->imemctl = bfin_read_IMEM_CONTROL();
173 cpudata->dmemctl = bfin_read_DMEM_CONTROL();
176 void __init bfin_cache_init(void)
178 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
179 generate_cplb_tables();
181 bfin_setup_caches(0);
184 void __init bfin_relocate_l1_mem(void)
186 unsigned long l1_code_length;
187 unsigned long l1_data_a_length;
188 unsigned long l1_data_b_length;
189 unsigned long l2_length;
192 * due to the ALIGN(4) in the arch/blackfin/kernel/vmlinux.lds.S
193 * we know that everything about l1 text/data is nice and aligned,
194 * so copy by 4 byte chunks, and don't worry about overlapping
197 * We can't use the dma_memcpy functions, since they can call
198 * scheduler functions which might be in L1 :( and core writes
199 * into L1 instruction cause bad access errors, so we are stuck,
200 * we are required to use DMA, but can't use the common dma
201 * functions. We can't use memcpy either - since that might be
202 * going to be in the relocated L1
205 blackfin_dma_early_init();
207 /* if necessary, copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
208 l1_code_length = _etext_l1 - _stext_l1;
210 early_dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
212 /* if necessary, copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
213 l1_data_a_length = _sbss_l1 - _sdata_l1;
214 if (l1_data_a_length)
215 early_dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
217 /* if necessary, copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
218 l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
219 if (l1_data_b_length)
220 early_dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
221 l1_data_a_length, l1_data_b_length);
223 early_dma_memcpy_done();
225 /* if necessary, copy _stext_l2 to _edata_l2 to L2 SRAM */
226 if (L2_LENGTH != 0) {
227 l2_length = _sbss_l2 - _stext_l2;
229 memcpy(_stext_l2, _l2_lma_start, l2_length);
233 /* add_memory_region to memmap */
234 static void __init add_memory_region(unsigned long long start,
235 unsigned long long size, int type)
239 i = bfin_memmap.nr_map;
241 if (i == BFIN_MEMMAP_MAX) {
242 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
246 bfin_memmap.map[i].addr = start;
247 bfin_memmap.map[i].size = size;
248 bfin_memmap.map[i].type = type;
249 bfin_memmap.nr_map++;
253 * Sanitize the boot memmap, removing overlaps.
255 static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
257 struct change_member *change_tmp;
258 unsigned long current_type, last_type;
259 unsigned long long last_addr;
260 int chgidx, still_changing;
263 int old_nr, new_nr, chg_nr;
267 Visually we're performing the following (1,2,3,4 = memory types)
269 Sample memory map (w/overlaps):
270 ____22__________________
271 ______________________4_
272 ____1111________________
273 _44_____________________
274 11111111________________
275 ____________________33__
276 ___________44___________
277 __________33333_________
278 ______________22________
279 ___________________2222_
280 _________111111111______
281 _____________________11_
282 _________________4______
284 Sanitized equivalent (no overlap):
285 1_______________________
286 _44_____________________
287 ___1____________________
288 ____22__________________
289 ______11________________
290 _________1______________
291 __________3_____________
292 ___________44___________
293 _____________33_________
294 _______________2________
295 ________________1_______
296 _________________4______
297 ___________________2____
298 ____________________33__
299 ______________________4_
301 /* if there's only one memory region, don't bother */
307 /* bail out if we find any unreasonable addresses in memmap */
308 for (i = 0; i < old_nr; i++)
309 if (map[i].addr + map[i].size < map[i].addr)
312 /* create pointers for initial change-point information (for sorting) */
313 for (i = 0; i < 2*old_nr; i++)
314 change_point[i] = &change_point_list[i];
316 /* record all known change-points (starting and ending addresses),
317 omitting those that are for empty memory regions */
319 for (i = 0; i < old_nr; i++) {
320 if (map[i].size != 0) {
321 change_point[chgidx]->addr = map[i].addr;
322 change_point[chgidx++]->pentry = &map[i];
323 change_point[chgidx]->addr = map[i].addr + map[i].size;
324 change_point[chgidx++]->pentry = &map[i];
327 chg_nr = chgidx; /* true number of change-points */
329 /* sort change-point list by memory addresses (low -> high) */
331 while (still_changing) {
333 for (i = 1; i < chg_nr; i++) {
334 /* if <current_addr> > <last_addr>, swap */
335 /* or, if current=<start_addr> & last=<end_addr>, swap */
336 if ((change_point[i]->addr < change_point[i-1]->addr) ||
337 ((change_point[i]->addr == change_point[i-1]->addr) &&
338 (change_point[i]->addr == change_point[i]->pentry->addr) &&
339 (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
341 change_tmp = change_point[i];
342 change_point[i] = change_point[i-1];
343 change_point[i-1] = change_tmp;
349 /* create a new memmap, removing overlaps */
350 overlap_entries = 0; /* number of entries in the overlap table */
351 new_entry = 0; /* index for creating new memmap entries */
352 last_type = 0; /* start with undefined memory type */
353 last_addr = 0; /* start with 0 as last starting address */
354 /* loop through change-points, determining affect on the new memmap */
355 for (chgidx = 0; chgidx < chg_nr; chgidx++) {
356 /* keep track of all overlapping memmap entries */
357 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
358 /* add map entry to overlap list (> 1 entry implies an overlap) */
359 overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
361 /* remove entry from list (order independent, so swap with last) */
362 for (i = 0; i < overlap_entries; i++) {
363 if (overlap_list[i] == change_point[chgidx]->pentry)
364 overlap_list[i] = overlap_list[overlap_entries-1];
368 /* if there are overlapping entries, decide which "type" to use */
369 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
371 for (i = 0; i < overlap_entries; i++)
372 if (overlap_list[i]->type > current_type)
373 current_type = overlap_list[i]->type;
374 /* continue building up new memmap based on this information */
375 if (current_type != last_type) {
376 if (last_type != 0) {
377 new_map[new_entry].size =
378 change_point[chgidx]->addr - last_addr;
379 /* move forward only if the new size was non-zero */
380 if (new_map[new_entry].size != 0)
381 if (++new_entry >= BFIN_MEMMAP_MAX)
382 break; /* no more space left for new entries */
384 if (current_type != 0) {
385 new_map[new_entry].addr = change_point[chgidx]->addr;
386 new_map[new_entry].type = current_type;
387 last_addr = change_point[chgidx]->addr;
389 last_type = current_type;
392 new_nr = new_entry; /* retain count for new entries */
394 /* copy new mapping into original location */
395 memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
401 static void __init print_memory_map(char *who)
405 for (i = 0; i < bfin_memmap.nr_map; i++) {
406 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
407 bfin_memmap.map[i].addr,
408 bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
409 switch (bfin_memmap.map[i].type) {
410 case BFIN_MEMMAP_RAM:
411 printk(KERN_CONT "(usable)\n");
413 case BFIN_MEMMAP_RESERVED:
414 printk(KERN_CONT "(reserved)\n");
417 printk(KERN_CONT "type %lu\n", bfin_memmap.map[i].type);
423 static __init int parse_memmap(char *arg)
425 unsigned long long start_at, mem_size;
430 mem_size = memparse(arg, &arg);
432 start_at = memparse(arg+1, &arg);
433 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
434 } else if (*arg == '$') {
435 start_at = memparse(arg+1, &arg);
436 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
443 * Initial parsing of the command line. Currently, we support:
444 * - Controlling the linux memory size: mem=xxx[KMG]
445 * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
446 * $ -> reserved memory is dcacheable
447 * # -> reserved memory is icacheable
448 * - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
449 * @ from <start> to <start>+<mem>, type RAM
450 * $ from <start> to <start>+<mem>, type RESERVED
452 static __init void parse_cmdline_early(char *cmdline_p)
454 char c = ' ', *to = cmdline_p;
455 unsigned int memsize;
458 if (!memcmp(to, "mem=", 4)) {
460 memsize = memparse(to, &to);
464 } else if (!memcmp(to, "max_mem=", 8)) {
466 memsize = memparse(to, &to);
468 physical_mem_end = memsize;
472 reserved_mem_dcache_on = 1;
475 reserved_mem_icache_on = 1;
478 } else if (!memcmp(to, "clkin_hz=", 9)) {
480 early_init_clkin_hz(to);
481 #ifdef CONFIG_EARLY_PRINTK
482 } else if (!memcmp(to, "earlyprintk=", 12)) {
484 setup_early_printk(to);
486 } else if (!memcmp(to, "memmap=", 7)) {
498 * Setup memory defaults from user config.
499 * The physical memory layout looks like:
501 * [_rambase, _ramstart]: kernel image
502 * [memory_start, memory_end]: dynamic memory managed by kernel
503 * [memory_end, _ramend]: reserved memory
504 * [memory_mtd_start(memory_end),
505 * memory_mtd_start + mtd_size]: rootfs (if any)
506 * [_ramend - DMA_UNCACHED_REGION,
507 * _ramend]: uncached DMA region
508 * [_ramend, physical_mem_end]: memory not managed by kernel
510 static __init void memory_setup(void)
512 #ifdef CONFIG_MTD_UCLINUX
513 unsigned long mtd_phys = 0;
516 _rambase = (unsigned long)_stext;
517 _ramstart = (unsigned long)_end;
519 if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
521 panic("DMA region exceeds memory limit: %lu.",
522 _ramend - _ramstart);
524 memory_end = _ramend - DMA_UNCACHED_REGION;
527 /* Round up to multiple of 4MB */
528 memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
530 memory_start = PAGE_ALIGN(_ramstart);
533 #if defined(CONFIG_MTD_UCLINUX)
534 /* generic memory mapped MTD driver */
535 memory_mtd_end = memory_end;
537 mtd_phys = _ramstart;
538 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
540 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
541 if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
543 PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
546 # if defined(CONFIG_CRAMFS)
547 if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
548 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
551 # if defined(CONFIG_ROMFS_FS)
552 if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
553 && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
555 PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
556 # if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263)
557 /* Due to a Hardware Anomaly we need to limit the size of usable
558 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
559 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
561 # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
562 if (memory_end >= 56 * 1024 * 1024)
563 memory_end = 56 * 1024 * 1024;
565 if (memory_end >= 60 * 1024 * 1024)
566 memory_end = 60 * 1024 * 1024;
567 # endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
568 # endif /* ANOMALY_05000263 */
569 # endif /* CONFIG_ROMFS_FS */
571 memory_end -= mtd_size;
575 panic("Don't boot kernel without rootfs attached.");
578 /* Relocate MTD image to the top of memory after the uncached memory area */
579 uclinux_ram_map.phys = memory_mtd_start = memory_end;
580 uclinux_ram_map.size = mtd_size;
581 dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size);
582 #endif /* CONFIG_MTD_UCLINUX */
584 #if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263)
585 /* Due to a Hardware Anomaly we need to limit the size of usable
586 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
587 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
589 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
590 if (memory_end >= 56 * 1024 * 1024)
591 memory_end = 56 * 1024 * 1024;
593 if (memory_end >= 60 * 1024 * 1024)
594 memory_end = 60 * 1024 * 1024;
595 #endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
596 printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
597 #endif /* ANOMALY_05000263 */
600 page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
601 page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
604 #if !defined(CONFIG_MTD_UCLINUX)
605 /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
606 memory_end -= SIZE_4K;
609 init_mm.start_code = (unsigned long)_stext;
610 init_mm.end_code = (unsigned long)_etext;
611 init_mm.end_data = (unsigned long)_edata;
612 init_mm.brk = (unsigned long)0;
614 printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
615 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
617 printk(KERN_INFO "Memory map:\n"
618 " fixedcode = 0x%p-0x%p\n"
619 " text = 0x%p-0x%p\n"
620 " rodata = 0x%p-0x%p\n"
622 " data = 0x%p-0x%p\n"
623 " stack = 0x%p-0x%p\n"
624 " init = 0x%p-0x%p\n"
625 " available = 0x%p-0x%p\n"
626 #ifdef CONFIG_MTD_UCLINUX
627 " rootfs = 0x%p-0x%p\n"
629 #if DMA_UNCACHED_REGION > 0
630 " DMA Zone = 0x%p-0x%p\n"
632 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
634 __start_rodata, __end_rodata,
635 __bss_start, __bss_stop,
637 (void *)&init_thread_union,
638 (void *)((int)(&init_thread_union) + 0x2000),
639 __init_begin, __init_end,
640 (void *)_ramstart, (void *)memory_end
641 #ifdef CONFIG_MTD_UCLINUX
642 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
644 #if DMA_UNCACHED_REGION > 0
645 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
651 * Find the lowest, highest page frame number we have available
653 void __init find_min_max_pfn(void)
658 min_low_pfn = memory_end;
660 for (i = 0; i < bfin_memmap.nr_map; i++) {
661 unsigned long start, end;
663 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
665 start = PFN_UP(bfin_memmap.map[i].addr);
666 end = PFN_DOWN(bfin_memmap.map[i].addr +
667 bfin_memmap.map[i].size);
672 if (start < min_low_pfn)
677 static __init void setup_bootmem_allocator(void)
681 unsigned long start_pfn, end_pfn;
682 unsigned long curr_pfn, last_pfn, size;
684 /* mark memory between memory_start and memory_end usable */
685 add_memory_region(memory_start,
686 memory_end - memory_start, BFIN_MEMMAP_RAM);
687 /* sanity check for overlap */
688 sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
689 print_memory_map("boot memmap");
691 /* intialize globals in linux/bootmem.h */
693 /* pfn of the last usable page frame */
694 if (max_pfn > memory_end >> PAGE_SHIFT)
695 max_pfn = memory_end >> PAGE_SHIFT;
696 /* pfn of last page frame directly mapped by kernel */
697 max_low_pfn = max_pfn;
698 /* pfn of the first usable page frame after kernel image*/
699 if (min_low_pfn < memory_start >> PAGE_SHIFT)
700 min_low_pfn = memory_start >> PAGE_SHIFT;
702 start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
703 end_pfn = memory_end >> PAGE_SHIFT;
706 * give all the memory to the bootmap allocator, tell it to put the
707 * boot mem_map at the start of memory.
709 bootmap_size = init_bootmem_node(NODE_DATA(0),
710 memory_start >> PAGE_SHIFT, /* map goes here */
713 /* register the memmap regions with the bootmem allocator */
714 for (i = 0; i < bfin_memmap.nr_map; i++) {
716 * Reserve usable memory
718 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
721 * We are rounding up the start address of usable memory:
723 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
724 if (curr_pfn >= end_pfn)
727 * ... and at the end of the usable range downwards:
729 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
730 bfin_memmap.map[i].size);
732 if (last_pfn > end_pfn)
736 * .. finally, did all the rounding and playing
737 * around just make the area go away?
739 if (last_pfn <= curr_pfn)
742 size = last_pfn - curr_pfn;
743 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
746 /* reserve memory before memory_start, including bootmap */
747 reserve_bootmem(PAGE_OFFSET,
748 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
752 #define EBSZ_TO_MEG(ebsz) \
755 switch (ebsz & 0xf) { \
756 case 0x1: meg = 16; break; \
757 case 0x3: meg = 32; break; \
758 case 0x5: meg = 64; break; \
759 case 0x7: meg = 128; break; \
760 case 0x9: meg = 256; break; \
761 case 0xb: meg = 512; break; \
765 static inline int __init get_mem_size(void)
767 #if defined(EBIU_SDBCTL)
768 # if defined(BF561_FAMILY)
770 u32 sdbctl = bfin_read_EBIU_SDBCTL();
771 ret += EBSZ_TO_MEG(sdbctl >> 0);
772 ret += EBSZ_TO_MEG(sdbctl >> 8);
773 ret += EBSZ_TO_MEG(sdbctl >> 16);
774 ret += EBSZ_TO_MEG(sdbctl >> 24);
777 return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
779 #elif defined(EBIU_DDRCTL1)
780 u32 ddrctl = bfin_read_EBIU_DDRCTL1();
782 switch (ddrctl & 0xc0000) {
783 case DEVSZ_64: ret = 64 / 8;
784 case DEVSZ_128: ret = 128 / 8;
785 case DEVSZ_256: ret = 256 / 8;
786 case DEVSZ_512: ret = 512 / 8;
788 switch (ddrctl & 0x30000) {
789 case DEVWD_4: ret *= 2;
790 case DEVWD_8: ret *= 2;
791 case DEVWD_16: break;
793 if ((ddrctl & 0xc000) == 0x4000)
800 void __init setup_arch(char **cmdline_p)
802 unsigned long sclk, cclk;
804 /* Check to make sure we are running on the right processor */
805 if (unlikely(CPUID != bfin_cpuid()))
806 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
807 CPU, bfin_cpuid(), bfin_revid());
809 #ifdef CONFIG_DUMMY_CONSOLE
810 conswitchp = &dummy_con;
813 #if defined(CONFIG_CMDLINE_BOOL)
814 strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
815 command_line[sizeof(command_line) - 1] = 0;
818 /* Keep a copy of command line */
819 *cmdline_p = &command_line[0];
820 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
821 boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
823 memset(&bfin_memmap, 0, sizeof(bfin_memmap));
825 /* If the user does not specify things on the command line, use
826 * what the bootloader set things up as
828 physical_mem_end = 0;
829 parse_cmdline_early(&command_line[0]);
832 _ramend = get_mem_size() * 1024 * 1024;
834 if (physical_mem_end == 0)
835 physical_mem_end = _ramend;
839 /* Initialize Async memory banks */
840 bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
841 bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
842 bfin_write_EBIU_AMGCTL(AMGCTLVAL);
843 #ifdef CONFIG_EBIU_MBSCTLVAL
844 bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
845 bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
846 bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
852 if ((ANOMALY_05000273 || ANOMALY_05000274) && (cclk >> 1) < sclk)
853 panic("ANOMALY 05000273 or 05000274: CCLK must be >= 2*SCLK");
856 if (ANOMALY_05000266) {
857 bfin_read_IMDMA_D0_IRQ_STATUS();
858 bfin_read_IMDMA_D1_IRQ_STATUS();
861 printk(KERN_INFO "Hardware Trace ");
862 if (bfin_read_TBUFCTL() & 0x1)
863 printk(KERN_CONT "Active ");
865 printk(KERN_CONT "Off ");
866 if (bfin_read_TBUFCTL() & 0x2)
867 printk(KERN_CONT "and Enabled\n");
869 printk(KERN_CONT "and Disabled\n");
871 printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF);
873 /* Newer parts mirror SWRST bits in SYSCR */
874 #if defined(CONFIG_BF53x) || defined(CONFIG_BF561) || \
875 defined(CONFIG_BF538) || defined(CONFIG_BF539)
876 _bfin_swrst = bfin_read_SWRST();
878 /* Clear boot mode field */
879 _bfin_swrst = bfin_read_SYSCR() & ~0xf;
882 #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
883 bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
885 #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
886 bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
890 if (_bfin_swrst & SWRST_DBL_FAULT_A) {
892 if (_bfin_swrst & RESET_DOUBLE) {
894 printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
895 #ifdef CONFIG_DEBUG_DOUBLEFAULT
896 /* We assume the crashing kernel, and the current symbol table match */
897 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
898 (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
899 printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
900 printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
902 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
904 } else if (_bfin_swrst & RESET_WDOG)
905 printk(KERN_INFO "Recovering from Watchdog event\n");
906 else if (_bfin_swrst & RESET_SOFTWARE)
907 printk(KERN_NOTICE "Reset caused by Software reset\n");
909 printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n");
910 if (bfin_compiled_revid() == 0xffff)
911 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
912 else if (bfin_compiled_revid() == -1)
913 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
915 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
917 if (likely(CPUID == bfin_cpuid())) {
918 if (bfin_revid() != bfin_compiled_revid()) {
919 if (bfin_compiled_revid() == -1)
920 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
922 else if (bfin_compiled_revid() != 0xffff) {
923 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
924 bfin_compiled_revid(), bfin_revid());
925 if (bfin_compiled_revid() > bfin_revid())
926 panic("Error: you are missing anomaly workarounds for this rev");
929 if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
930 printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
934 /* We can't run on BF548-0.1 due to ANOMALY 05000448 */
935 if (bfin_cpuid() == 0x27de && bfin_revid() == 1)
936 panic("You can't run on this processor due to 05000448");
938 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
940 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
941 cclk / 1000000, sclk / 1000000);
943 setup_bootmem_allocator();
947 /* Copy atomic sequences to their fixed location, and sanity check that
948 these locations are the ones that we advertise to userspace. */
949 memcpy((void *)FIXED_CODE_START, &fixed_code_start,
950 FIXED_CODE_END - FIXED_CODE_START);
951 BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
952 != SIGRETURN_STUB - FIXED_CODE_START);
953 BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
954 != ATOMIC_XCHG32 - FIXED_CODE_START);
955 BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
956 != ATOMIC_CAS32 - FIXED_CODE_START);
957 BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
958 != ATOMIC_ADD32 - FIXED_CODE_START);
959 BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
960 != ATOMIC_SUB32 - FIXED_CODE_START);
961 BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
962 != ATOMIC_IOR32 - FIXED_CODE_START);
963 BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
964 != ATOMIC_AND32 - FIXED_CODE_START);
965 BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
966 != ATOMIC_XOR32 - FIXED_CODE_START);
967 BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
968 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
971 platform_init_cpus();
973 init_exception_vectors();
974 bfin_cache_init(); /* Initialize caches for the boot CPU */
977 static int __init topology_init(void)
980 /* Record CPU-private information for the boot processor. */
981 bfin_setup_cpudata(0);
983 for_each_possible_cpu(cpu) {
984 register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
990 subsys_initcall(topology_init);
992 /* Get the input clock frequency */
993 static u_long cached_clkin_hz = CONFIG_CLKIN_HZ;
994 static u_long get_clkin_hz(void)
996 return cached_clkin_hz;
998 static int __init early_init_clkin_hz(char *buf)
1000 cached_clkin_hz = simple_strtoul(buf, NULL, 0);
1001 #ifdef BFIN_KERNEL_CLOCK
1002 if (cached_clkin_hz != CONFIG_CLKIN_HZ)
1003 panic("cannot change clkin_hz when reprogramming clocks");
1007 early_param("clkin_hz=", early_init_clkin_hz);
1009 /* Get the voltage input multiplier */
1010 static u_long get_vco(void)
1012 static u_long cached_vco;
1013 u_long msel, pll_ctl;
1015 /* The assumption here is that VCO never changes at runtime.
1016 * If, someday, we support that, then we'll have to change this.
1021 pll_ctl = bfin_read_PLL_CTL();
1022 msel = (pll_ctl >> 9) & 0x3F;
1026 cached_vco = get_clkin_hz();
1027 cached_vco >>= (1 & pll_ctl); /* DF bit */
1032 /* Get the Core clock */
1033 u_long get_cclk(void)
1035 static u_long cached_cclk_pll_div, cached_cclk;
1038 if (bfin_read_PLL_STAT() & 0x1)
1039 return get_clkin_hz();
1041 ssel = bfin_read_PLL_DIV();
1042 if (ssel == cached_cclk_pll_div)
1045 cached_cclk_pll_div = ssel;
1047 csel = ((ssel >> 4) & 0x03);
1049 if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
1050 cached_cclk = get_vco() / ssel;
1052 cached_cclk = get_vco() >> csel;
1055 EXPORT_SYMBOL(get_cclk);
1057 /* Get the System clock */
1058 u_long get_sclk(void)
1060 static u_long cached_sclk;
1063 /* The assumption here is that SCLK never changes at runtime.
1064 * If, someday, we support that, then we'll have to change this.
1069 if (bfin_read_PLL_STAT() & 0x1)
1070 return get_clkin_hz();
1072 ssel = bfin_read_PLL_DIV() & 0xf;
1074 printk(KERN_WARNING "Invalid System Clock\n");
1078 cached_sclk = get_vco() / ssel;
1081 EXPORT_SYMBOL(get_sclk);
1083 unsigned long sclk_to_usecs(unsigned long sclk)
1085 u64 tmp = USEC_PER_SEC * (u64)sclk;
1086 do_div(tmp, get_sclk());
1089 EXPORT_SYMBOL(sclk_to_usecs);
1091 unsigned long usecs_to_sclk(unsigned long usecs)
1093 u64 tmp = get_sclk() * (u64)usecs;
1094 do_div(tmp, USEC_PER_SEC);
1097 EXPORT_SYMBOL(usecs_to_sclk);
1100 * Get CPU information for use by the procfs.
1102 static int show_cpuinfo(struct seq_file *m, void *v)
1104 char *cpu, *mmu, *fpu, *vendor, *cache;
1106 int cpu_num = *(unsigned int *)v;
1108 u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
1109 struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num);
1114 revid = bfin_revid();
1119 switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
1121 vendor = "Analog Devices";
1128 seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor);
1130 if (CPUID == bfin_cpuid())
1131 seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
1133 seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1134 CPUID, bfin_cpuid());
1136 seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
1138 cpu, cclk/1000000, sclk/1000000,
1146 if (bfin_revid() != bfin_compiled_revid()) {
1147 if (bfin_compiled_revid() == -1)
1148 seq_printf(m, "(Compiled for Rev none)");
1149 else if (bfin_compiled_revid() == 0xffff)
1150 seq_printf(m, "(Compiled for Rev any)");
1152 seq_printf(m, "(Compiled for Rev %d)", bfin_compiled_revid());
1155 seq_printf(m, "\ncpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
1156 cclk/1000000, cclk%1000000,
1157 sclk/1000000, sclk%1000000);
1158 seq_printf(m, "bogomips\t: %lu.%02lu\n"
1159 "Calibration\t: %lu loops\n",
1160 (cpudata->loops_per_jiffy * HZ) / 500000,
1161 ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
1162 (cpudata->loops_per_jiffy * HZ));
1164 /* Check Cache configutation */
1165 switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
1167 cache = "dbank-A/B\t: cache/sram";
1172 cache = "dbank-A/B\t: cache/cache";
1177 cache = "dbank-A/B\t: sram/sram";
1188 /* Is it turned on? */
1189 if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
1192 if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
1195 seq_printf(m, "cache size\t: %d KB(L1 icache) "
1196 "%d KB(L1 dcache) %d KB(L2 cache)\n",
1197 icache_size, dcache_size, 0);
1198 seq_printf(m, "%s\n", cache);
1199 seq_printf(m, "external memory\t: "
1200 #if defined(CONFIG_BFIN_EXTMEM_ICACHEABLE)
1205 " in instruction cache\n");
1206 seq_printf(m, "external memory\t: "
1207 #if defined(CONFIG_BFIN_EXTMEM_WRITEBACK)
1208 "cacheable (write-back)"
1209 #elif defined(CONFIG_BFIN_EXTMEM_WRITETHROUGH)
1210 "cacheable (write-through)"
1214 " in data cache\n");
1217 seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
1218 BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1220 seq_printf(m, "icache setup\t: off\n");
1223 "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
1224 dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1226 #ifdef __ARCH_SYNC_CORE_DCACHE
1227 seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
1229 #ifdef __ARCH_SYNC_CORE_ICACHE
1230 seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", cpudata->icache_invld_count);
1232 #ifdef CONFIG_BFIN_ICACHE_LOCK
1233 switch ((cpudata->imemctl >> 3) & WAYALL_L) {
1235 seq_printf(m, "Way0 Locked-Down\n");
1238 seq_printf(m, "Way1 Locked-Down\n");
1241 seq_printf(m, "Way0,Way1 Locked-Down\n");
1244 seq_printf(m, "Way2 Locked-Down\n");
1247 seq_printf(m, "Way0,Way2 Locked-Down\n");
1250 seq_printf(m, "Way1,Way2 Locked-Down\n");
1253 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
1256 seq_printf(m, "Way3 Locked-Down\n");
1259 seq_printf(m, "Way0,Way3 Locked-Down\n");
1262 seq_printf(m, "Way1,Way3 Locked-Down\n");
1265 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
1268 seq_printf(m, "Way3,Way2 Locked-Down\n");
1271 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
1274 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
1277 seq_printf(m, "All Ways are locked\n");
1280 seq_printf(m, "No Ways are locked\n");
1284 if (cpu_num != num_possible_cpus() - 1)
1288 seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
1289 seq_printf(m, "L2 SRAM\t\t: "
1290 #if defined(CONFIG_BFIN_L2_ICACHEABLE)
1295 " in instruction cache\n");
1296 seq_printf(m, "L2 SRAM\t\t: "
1297 #if defined(CONFIG_BFIN_L2_WRITEBACK)
1298 "cacheable (write-back)"
1299 #elif defined(CONFIG_BFIN_L2_WRITETHROUGH)
1300 "cacheable (write-through)"
1304 " in data cache\n");
1306 seq_printf(m, "board name\t: %s\n", bfin_board_name);
1307 seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1308 physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1309 seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1310 ((int)memory_end - (int)_stext) >> 10,
1312 (void *)memory_end);
1313 seq_printf(m, "\n");
1318 static void *c_start(struct seq_file *m, loff_t *pos)
1321 *pos = first_cpu(cpu_online_map);
1322 if (*pos >= num_online_cpus())
1328 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1330 *pos = next_cpu(*pos, cpu_online_map);
1332 return c_start(m, pos);
1335 static void c_stop(struct seq_file *m, void *v)
1339 const struct seq_operations cpuinfo_op = {
1343 .show = show_cpuinfo,
1346 void __init cmdline_init(const char *r0)
1349 strncpy(command_line, r0, COMMAND_LINE_SIZE);