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   1 /*
   2  * Freescale STMP37XX/STMP378X SoC register access interfaces
   3  *
   4  * The SoC registers may be accessed via:
   5  *
   6  * - single 32 bit address, or
   7  * - four 32 bit addresses - general purpose, set, clear and toggle bits
   8  *
   9  * Multiple IP blocks (e.g. SSP, UART) provide identical register sets per
  10  * each module
  11  *
  12  * Embedded Alley Solutions, Inc <source@embeddedalley.com>
  13  *
  14  * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  15  * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
  16  */
  17
  18 /*
  19  * The code contained herein is licensed under the GNU General Public
  20  * License. You may obtain a copy of the GNU General Public License
  21  * Version 2 or later at the following locations:
  22  *
  23  * http://www.opensource.org/licenses/gpl-license.html
  24  * http://www.gnu.org/copyleft/gpl.html
  25  */
  26 #ifndef __ASM_PLAT_STMP3XXX_REGS_H
  27 #define __ASM_PLAT_STMP3XXX_REGS_H
  28
  29 #ifndef __ASSEMBLER__
  30 #include <linux/io.h>
  31 #endif
  32
  33 #include "platform.h"
  34
  35 #define REGS_BASE STMP3XXX_REGS_BASE
  36
  37 #define HW_STMP3xxx_SET         0x04
  38 #define HW_STMP3xxx_CLR         0x08
  39 #define HW_STMP3xxx_TOG         0x0c
  40
  41 #ifndef __ASSEMBLER__
  42 #define HW_REGISTER_FUNCS(id, base, offset, regset, rd, wr)             \
  43         static const u32 id##_OFFSET = offset;                          \
  44         static inline u32 id##_RD_NB(const void __iomem *regbase) {     \
  45                 if (!rd)                                                \
  46                         printk(KERN_ERR"%s: cannot READ at %p+%x\n",    \
  47                                 #id, regbase, offset);                  \
  48                 return __raw_readl(regbase + offset);                   \
  49         }                                                               \
  50         static inline void id##_WR_NB(void __iomem *regbase, u32 v) {   \
  51                 if (!wr)                                                \
  52                         printk(KERN_ERR"%s: cannot WRITE at %p+%x\n",   \
  53                                 #id, regbase, offset);                  \
  54                 __raw_writel(v, regbase + offset);                      \
  55         }                                                               \
  56         static inline void id##_SET_NB(void __iomem *regbase, u32 v) {  \
  57                 if (!wr)                                                \
  58                         printk(KERN_ERR"%s: cannot SET at %p+%x\n",     \
  59                                 #id, regbase, offset);                  \
  60                 if (regset)                                             \
  61                         __raw_writel(v, regbase +                       \
  62                                         offset + HW_STMP3xxx_SET);      \
  63                 else                                                    \
  64                         __raw_writel(v | __raw_readl(regbase + offset), \
  65                                 regbase + offset);                      \
  66         }                                                               \
  67         static inline void id##_CLR_NB(void __iomem *regbase, u32 v) {  \
  68                 if (!wr)                                                \
  69                         printk(KERN_ERR"%s: cannot CLR at %p+%x\n",     \
  70                                 #id, regbase, offset);                  \
  71                 if (regset)                                             \
  72                         __raw_writel(v, regbase +                       \
  73                                         offset + HW_STMP3xxx_CLR);      \
  74                 else                                                    \
  75                         __raw_writel(                                   \
  76                                 ~v & __raw_readl(regbase + offset),     \
  77                                 regbase + offset);                      \
  78         }                                                               \
  79         static inline void id##_TOG_NB(void __iomem *regbase, u32 v) {  \
  80                 if (!wr)                                                \
  81                         printk(KERN_ERR"%s: cannot TOG at %p+%x\n",     \
  82                                 #id, regbase, offset);                  \
  83                 if (regset)                                             \
  84                         __raw_writel(v, regbase +                       \
  85                                         offset + HW_STMP3xxx_TOG);      \
  86                 else                                                    \
  87                         __raw_writel(v ^ __raw_readl(regbase + offset), \
  88                                 regbase + offset);                      \
  89         }                                                               \
  90         static inline u32 id##_RD(void) { return id##_RD_NB(base); }    \
  91         static inline void id##_WR(u32 v) { id##_WR_NB(base, v); }      \
  92         static inline void id##_SET(u32 v) { id##_SET_NB(base, v); }    \
  93         static inline void id##_CLR(u32 v) { id##_CLR_NB(base, v); }    \
  94         static inline void id##_TOG(u32 v) { id##_TOG_NB(base, v); }
  95
  96 #define HW_REGISTER_FUNCS_INDEXED(id, base, offset, regset, rd, wr, step)\
  97         static inline u32 id##_OFFSET(int i) {                          \
  98                 return offset + i * step;                               \
  99         }                                                               \
 100         static inline u32 id##_RD_NB(const void __iomem *regbase, int i) {\
 101                 if (!rd)                                                \
 102                         printk(KERN_ERR"%s(%d): can't READ at %p+%x\n", \
 103                                 #id, i, regbase, offset + i * step);    \
 104                 return __raw_readl(regbase + offset + i * step);        \
 105         }                                                               \
 106         static inline void id##_WR_NB(void __iomem *regbase, int i, u32 v) {\
 107                 if (!wr)                                                \
 108                         printk(KERN_ERR"%s(%d): can't WRITE at %p+%x\n",\
 109                                 #id, i, regbase, offset + i * step);    \
 110                 __raw_writel(v, regbase + offset + i * step);           \
 111         }                                                               \
 112         static inline void id##_SET_NB(void __iomem *regbase, int i, u32 v) {\
 113                 if (!wr)                                                \
 114                         printk(KERN_ERR"%s(%d): can't SET at %p+%x\n",  \
 115                                 #id, i, regbase, offset + i * step);    \
 116                 if (regset)                                             \
 117                         __raw_writel(v, regbase + offset +              \
 118                                         i * step + HW_STMP3xxx_SET);    \
 119                 else                                                    \
 120                         __raw_writel(v | __raw_readl(regbase +          \
 121                                                 offset + i * step),     \
 122                                 regbase + offset + i * step);           \
 123         }                                                               \
 124         static inline void id##_CLR_NB(void __iomem *regbase, int i, u32 v) {\
 125                 if (!wr)                                                \
 126                         printk(KERN_ERR"%s(%d): cannot CLR at %p+%x\n", \
 127                                 #id, i, regbase, offset + i * step);    \
 128                 if (regset)                                             \
 129                         __raw_writel(v, regbase + offset +              \
 130                                         i * step + HW_STMP3xxx_CLR);    \
 131                 else                                                    \
 132                         __raw_writel(~v & __raw_readl(regbase +         \
 133                                                 offset + i * step),     \
 134                                 regbase + offset + i * step);           \
 135         }                                                               \
 136         static inline void id##_TOG_NB(void __iomem *regbase, int i, u32 v) {\
 137                 if (!wr)                                                \
 138                         printk(KERN_ERR"%s(%d): cannot TOG at %p+%x\n", \
 139                                 #id, i, regbase, offset + i * step);    \
 140                 if (regset)                                             \
 141                         __raw_writel(v, regbase + offset +              \
 142                                         i * step + HW_STMP3xxx_TOG);    \
 143                 else                                                    \
 144                         __raw_writel(v ^ __raw_readl(regbase + offset   \
 145                                                 + i * step),            \
 146                                 regbase + offset + i * step);           \
 147         }                                                               \
 148         static inline u32 id##_RD(int i)                                \
 149         {                                                               \
 150                 return id##_RD_NB(base, i);                             \
 151         }                                                               \
 152         static inline void id##_WR(int i, u32 v)                        \
 153         {                                                               \
 154                 id##_WR_NB(base, i, v);                                 \
 155         }                                                               \
 156         static inline void id##_SET(int i, u32 v)                       \
 157         {                                                               \
 158                 id##_SET_NB(base, i, v);                                \
 159         }                                                               \
 160         static inline void id##_CLR(int i, u32 v)                       \
 161         {                                                               \
 162                 id##_CLR_NB(base, i, v);                                \
 163         }                                                               \
 164         static inline void id##_TOG(int i, u32 v)                       \
 165         {                                                               \
 166                 id##_TOG_NB(base, i, v);                                \
 167         }
 168
 169 #define HW_REGISTER_WO(id, base, offset)\
 170         HW_REGISTER_FUNCS(id, base, offset, 1,  0, 1)
 171 #define HW_REGISTER_RO(id, base, offset)\
 172         HW_REGISTER_FUNCS(id, base, offset, 1,  1, 0)
 173 #define HW_REGISTER(id, base, offset)   \
 174         HW_REGISTER_FUNCS(id, base, offset, 1,  1, 1)
 175 #define HW_REGISTER_0(id, base, offset) \
 176         HW_REGISTER_FUNCS(id, base, offset, 0,  1, 1)
 177 #define HW_REGISTER_INDEXED(id, base, offset, step)     \
 178         HW_REGISTER_FUNCS_INDEXED(id, base, offset, 1,  1, 1, step)
 179 #define HW_REGISTER_RO_INDEXED(id, base, offset, step)  \
 180         HW_REGISTER_FUNCS_INDEXED(id, base, offset, 1,  1, 0, step)
 181 #define HW_REGISTER_0_INDEXED(id, base, offset, step)   \
 182         HW_REGISTER_FUNCS_INDEXED(id, base, offset, 0,  1, 1, step)
 183 #else /* __ASSEMBLER__ */
 184 #define HW_REGISTER_FUNCS(id, base, offset, regset, rd, wr)
 185 #define HW_REGISTER_FUNCS_INDEXED(id, base, offset, regset, rd, wr, step)
 186 #define HW_REGISTER_WO(id, base, offset)
 187 #define HW_REGISTER_RO(id, base, offset)
 188 #define HW_REGISTER(id, base, offset)
 189 #define HW_REGISTER_0(id, base, offset)
 190 #define HW_REGISTER_INDEXED(id, base, offset, step)
 191 #define HW_REGISTER_RO_INDEXED(id, base, offset, step)
 192 #define HW_REGISTER_0_INDEXED(id, base, offset, step)
 193 #endif /* __ASSEMBLER__ */
 194
 195 #endif /* __ASM_PLAT_STMP3XXX_REGS_H */