1 /* linux/arch/arm/plat-s3c24xx/cpu-freq.c
3 * Copyright (c) 2006,2007,2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
7 * S3C24XX CPU Frequency scaling
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
18 #include <linux/cpufreq.h>
19 #include <linux/cpu.h>
20 #include <linux/clk.h>
21 #include <linux/err.h>
23 #include <linux/sysdev.h>
24 #include <linux/kobject.h>
25 #include <linux/sysfs.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/map.h>
31 #include <plat/clock.h>
32 #include <plat/cpu-freq-core.h>
34 #include <mach/regs-clock.h>
36 /* note, cpufreq support deals in kHz, no Hz */
38 static struct cpufreq_driver s3c24xx_driver;
39 static struct s3c_cpufreq_config cpu_cur;
40 static struct s3c_iotimings s3c24xx_iotiming;
41 static struct cpufreq_frequency_table *pll_reg;
42 static unsigned int last_target = ~0;
43 static unsigned int ftab_size;
44 static struct cpufreq_frequency_table *ftab;
46 static struct clk *_clk_mpll;
47 static struct clk *_clk_xtal;
48 static struct clk *clk_fclk;
49 static struct clk *clk_hclk;
50 static struct clk *clk_pclk;
51 static struct clk *clk_arm;
53 static void s3c_cpufreq_getcur(struct s3c_cpufreq_config *cfg)
55 unsigned long fclk, pclk, hclk, armclk;
57 cfg->freq.fclk = fclk = clk_get_rate(clk_fclk);
58 cfg->freq.hclk = hclk = clk_get_rate(clk_hclk);
59 cfg->freq.pclk = pclk = clk_get_rate(clk_pclk);
60 cfg->freq.armclk = armclk = clk_get_rate(clk_arm);
62 cfg->pll.index = __raw_readl(S3C2410_MPLLCON);
63 cfg->pll.frequency = fclk;
65 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
67 cfg->divs.h_divisor = fclk / hclk;
68 cfg->divs.p_divisor = fclk / pclk;
71 static inline void s3c_cpufreq_calc(struct s3c_cpufreq_config *cfg)
73 unsigned long pll = cfg->pll.frequency;
76 cfg->freq.hclk = pll / cfg->divs.h_divisor;
77 cfg->freq.pclk = pll / cfg->divs.p_divisor;
79 /* convert hclk into 10ths of nanoseconds for io calcs */
80 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
83 static inline int closer(unsigned int target, unsigned int n, unsigned int c)
85 int diff_cur = abs(target - c);
86 int diff_new = abs(target - n);
88 return (diff_new < diff_cur);
91 static void s3c_cpufreq_show(const char *pfx,
92 struct s3c_cpufreq_config *cfg)
94 s3c_freq_dbg("%s: Fvco=%u, F=%lu, A=%lu, H=%lu (%u), P=%lu (%u)\n",
95 pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk,
96 cfg->freq.hclk, cfg->divs.h_divisor,
97 cfg->freq.pclk, cfg->divs.p_divisor);
100 /* functions to wrapper the driver info calls to do the cpu specific work */
102 static void s3c_cpufreq_setio(struct s3c_cpufreq_config *cfg)
104 if (cfg->info->set_iotiming)
105 (cfg->info->set_iotiming)(cfg, &s3c24xx_iotiming);
108 static int s3c_cpufreq_calcio(struct s3c_cpufreq_config *cfg)
110 if (cfg->info->calc_iotiming)
111 return (cfg->info->calc_iotiming)(cfg, &s3c24xx_iotiming);
116 static void s3c_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
118 (cfg->info->set_refresh)(cfg);
121 static void s3c_cpufreq_setdivs(struct s3c_cpufreq_config *cfg)
123 (cfg->info->set_divs)(cfg);
126 static int s3c_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg)
128 return (cfg->info->calc_divs)(cfg);
131 static void s3c_cpufreq_setfvco(struct s3c_cpufreq_config *cfg)
133 (cfg->info->set_fvco)(cfg);
136 static inline void s3c_cpufreq_resume_clocks(void)
138 cpu_cur.info->resume_clocks();
141 static inline void s3c_cpufreq_updateclk(struct clk *clk,
144 clk_set_rate(clk, freq);
147 static int s3c_cpufreq_settarget(struct cpufreq_policy *policy,
148 unsigned int target_freq,
149 struct cpufreq_frequency_table *pll)
151 struct s3c_cpufreq_freqs freqs;
152 struct s3c_cpufreq_config cpu_new;
155 cpu_new = cpu_cur; /* copy new from current */
157 s3c_cpufreq_show("cur", &cpu_cur);
159 /* TODO - check for DMA currently outstanding */
161 cpu_new.pll = pll ? *pll : cpu_cur.pll;
164 freqs.pll_changing = 1;
166 /* update our frequencies */
168 cpu_new.freq.armclk = target_freq;
169 cpu_new.freq.fclk = cpu_new.pll.frequency;
171 if (s3c_cpufreq_calcdivs(&cpu_new) < 0) {
172 printk(KERN_ERR "no divisors for %d\n", target_freq);
173 goto err_notpossible;
176 s3c_freq_dbg("%s: got divs\n", __func__);
178 s3c_cpufreq_calc(&cpu_new);
180 s3c_freq_dbg("%s: calculated frequencies for new\n", __func__);
182 if (cpu_new.freq.hclk != cpu_cur.freq.hclk) {
183 if (s3c_cpufreq_calcio(&cpu_new) < 0) {
184 printk(KERN_ERR "%s: no IO timings\n", __func__);
185 goto err_notpossible;
189 s3c_cpufreq_show("new", &cpu_new);
191 /* setup our cpufreq parameters */
193 freqs.old = cpu_cur.freq;
194 freqs.new = cpu_new.freq;
197 freqs.freqs.old = cpu_cur.freq.armclk / 1000;
198 freqs.freqs.new = cpu_new.freq.armclk / 1000;
200 /* update f/h/p clock settings before we issue the change
201 * notification, so that drivers do not need to do anything
202 * special if they want to recalculate on CPUFREQ_PRECHANGE. */
204 s3c_cpufreq_updateclk(_clk_mpll, cpu_new.pll.frequency);
205 s3c_cpufreq_updateclk(clk_fclk, cpu_new.freq.fclk);
206 s3c_cpufreq_updateclk(clk_hclk, cpu_new.freq.hclk);
207 s3c_cpufreq_updateclk(clk_pclk, cpu_new.freq.pclk);
209 /* start the frequency change */
212 cpufreq_notify_transition(&freqs.freqs, CPUFREQ_PRECHANGE);
214 /* If hclk is staying the same, then we do not need to
215 * re-write the IO or the refresh timings whilst we are changing
218 local_irq_save(flags);
220 /* is our memory clock slowing down? */
221 if (cpu_new.freq.hclk < cpu_cur.freq.hclk) {
222 s3c_cpufreq_setrefresh(&cpu_new);
223 s3c_cpufreq_setio(&cpu_new);
226 if (cpu_new.freq.fclk == cpu_cur.freq.fclk) {
227 /* not changing PLL, just set the divisors */
229 s3c_cpufreq_setdivs(&cpu_new);
231 if (cpu_new.freq.fclk < cpu_cur.freq.fclk) {
232 /* slow the cpu down, then set divisors */
234 s3c_cpufreq_setfvco(&cpu_new);
235 s3c_cpufreq_setdivs(&cpu_new);
237 /* set the divisors, then speed up */
239 s3c_cpufreq_setdivs(&cpu_new);
240 s3c_cpufreq_setfvco(&cpu_new);
244 /* did our memory clock speed up */
245 if (cpu_new.freq.hclk > cpu_cur.freq.hclk) {
246 s3c_cpufreq_setrefresh(&cpu_new);
247 s3c_cpufreq_setio(&cpu_new);
250 /* update our current settings */
253 local_irq_restore(flags);
255 /* notify everyone we've done this */
257 cpufreq_notify_transition(&freqs.freqs, CPUFREQ_POSTCHANGE);
259 s3c_freq_dbg("%s: finished\n", __func__);
263 printk(KERN_ERR "no compatible settings for %d\n", target_freq);
267 /* s3c_cpufreq_target
269 * called by the cpufreq core to adjust the frequency that the CPU
270 * is currently running at.
273 static int s3c_cpufreq_target(struct cpufreq_policy *policy,
274 unsigned int target_freq,
275 unsigned int relation)
277 struct cpufreq_frequency_table *pll;
280 /* avoid repeated calls which cause a needless amout of duplicated
281 * logging output (and CPU time as the calculation process is
283 if (target_freq == last_target)
286 last_target = target_freq;
288 s3c_freq_dbg("%s: policy %p, target %u, relation %u\n",
289 __func__, policy, target_freq, relation);
292 if (cpufreq_frequency_table_target(policy, ftab,
293 target_freq, relation,
295 s3c_freq_dbg("%s: table failed\n", __func__);
299 s3c_freq_dbg("%s: adjust %d to entry %d (%u)\n", __func__,
300 target_freq, index, ftab[index].frequency);
301 target_freq = ftab[index].frequency;
304 target_freq *= 1000; /* convert target to Hz */
306 /* find the settings for our new frequency */
308 if (!pll_reg || cpu_cur.lock_pll) {
309 /* either we've not got any PLL values, or we've locked
310 * to the current one. */
313 struct cpufreq_policy tmp_policy;
316 /* we keep the cpu pll table in Hz, to ensure we get an
317 * accurate value for the PLL output. */
319 tmp_policy.min = policy->min * 1000;
320 tmp_policy.max = policy->max * 1000;
321 tmp_policy.cpu = policy->cpu;
323 /* cpufreq_frequency_table_target uses a pointer to 'index'
324 * which is the number of the table entry, not the value of
325 * the table entry's index field. */
327 ret = cpufreq_frequency_table_target(&tmp_policy, pll_reg,
328 target_freq, relation,
332 printk(KERN_ERR "%s: no PLL available\n", __func__);
333 goto err_notpossible;
336 pll = pll_reg + index;
338 s3c_freq_dbg("%s: target %u => %u\n",
339 __func__, target_freq, pll->frequency);
341 target_freq = pll->frequency;
344 return s3c_cpufreq_settarget(policy, target_freq, pll);
347 printk(KERN_ERR "no compatible settings for %d\n", target_freq);
351 static unsigned int s3c_cpufreq_get(unsigned int cpu)
353 return clk_get_rate(clk_arm) / 1000;
356 struct clk *s3c_cpufreq_clk_get(struct device *dev, const char *name)
360 clk = clk_get(dev, name);
362 printk(KERN_ERR "cpufreq: failed to get clock '%s'\n", name);
367 static int s3c_cpufreq_init(struct cpufreq_policy *policy)
369 printk(KERN_INFO "%s: initialising policy %p\n", __func__, policy);
371 if (policy->cpu != 0)
374 policy->cur = s3c_cpufreq_get(0);
375 policy->min = policy->cpuinfo.min_freq = 0;
376 policy->max = policy->cpuinfo.max_freq = cpu_cur.info->max.fclk / 1000;
377 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
379 /* feed the latency information from the cpu driver */
380 policy->cpuinfo.transition_latency = cpu_cur.info->latency;
383 cpufreq_frequency_table_cpuinfo(policy, ftab);
388 static __init int s3c_cpufreq_initclks(void)
390 _clk_mpll = s3c_cpufreq_clk_get(NULL, "mpll");
391 _clk_xtal = s3c_cpufreq_clk_get(NULL, "xtal");
392 clk_fclk = s3c_cpufreq_clk_get(NULL, "fclk");
393 clk_hclk = s3c_cpufreq_clk_get(NULL, "hclk");
394 clk_pclk = s3c_cpufreq_clk_get(NULL, "pclk");
395 clk_arm = s3c_cpufreq_clk_get(NULL, "armclk");
397 if (IS_ERR(clk_fclk) || IS_ERR(clk_hclk) || IS_ERR(clk_pclk) ||
398 IS_ERR(_clk_mpll) || IS_ERR(clk_arm) || IS_ERR(_clk_xtal)) {
399 printk(KERN_ERR "%s: could not get clock(s)\n", __func__);
403 printk(KERN_INFO "%s: clocks f=%lu,h=%lu,p=%lu,a=%lu\n", __func__,
404 clk_get_rate(clk_fclk) / 1000,
405 clk_get_rate(clk_hclk) / 1000,
406 clk_get_rate(clk_pclk) / 1000,
407 clk_get_rate(clk_arm) / 1000);
412 static int s3c_cpufreq_verify(struct cpufreq_policy *policy)
414 if (policy->cpu != 0)
421 static struct cpufreq_frequency_table suspend_pll;
422 static unsigned int suspend_freq;
424 static int s3c_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
426 suspend_pll.frequency = clk_get_rate(_clk_mpll);
427 suspend_pll.index = __raw_readl(S3C2410_MPLLCON);
428 suspend_freq = s3c_cpufreq_get(0) * 1000;
433 static int s3c_cpufreq_resume(struct cpufreq_policy *policy)
437 s3c_freq_dbg("%s: resuming with policy %p\n", __func__, policy);
439 last_target = ~0; /* invalidate last_target setting */
441 /* first, find out what speed we resumed at. */
442 s3c_cpufreq_resume_clocks();
444 /* whilst we will be called later on, we try and re-set the
445 * cpu frequencies as soon as possible so that we do not end
446 * up resuming devices and then immediatley having to re-set
447 * a number of settings once these devices have restarted.
449 * as a note, it is expected devices are not used until they
450 * have been un-suspended and at that time they should have
451 * used the updated clock settings.
454 ret = s3c_cpufreq_settarget(NULL, suspend_freq, &suspend_pll);
456 printk(KERN_ERR "%s: failed to reset pll/freq\n", __func__);
463 #define s3c_cpufreq_resume NULL
464 #define s3c_cpufreq_suspend NULL
467 static struct cpufreq_driver s3c24xx_driver = {
468 .flags = CPUFREQ_STICKY,
469 .verify = s3c_cpufreq_verify,
470 .target = s3c_cpufreq_target,
471 .get = s3c_cpufreq_get,
472 .init = s3c_cpufreq_init,
473 .suspend = s3c_cpufreq_suspend,
474 .resume = s3c_cpufreq_resume,
479 int __init s3c_cpufreq_register(struct s3c_cpufreq_info *info)
481 if (!info || !info->name) {
482 printk(KERN_ERR "%s: failed to pass valid information\n",
487 printk(KERN_INFO "S3C24XX CPU Frequency driver, %s cpu support\n",
490 /* check our driver info has valid data */
492 BUG_ON(info->set_refresh == NULL);
493 BUG_ON(info->set_divs == NULL);
494 BUG_ON(info->calc_divs == NULL);
496 /* info->set_fvco is optional, depending on whether there
497 * is a need to set the clock code. */
501 /* Note, driver registering should probably update locktime */
506 int __init s3c_cpufreq_setboard(struct s3c_cpufreq_board *board)
508 struct s3c_cpufreq_board *ours;
511 printk(KERN_INFO "%s: no board data\n", __func__);
515 /* Copy the board information so that each board can make this
518 ours = kzalloc(sizeof(struct s3c_cpufreq_board), GFP_KERNEL);
520 printk(KERN_ERR "%s: no memory\n", __func__);
525 cpu_cur.board = ours;
530 int __init s3c_cpufreq_auto_io(void)
534 if (!cpu_cur.info->get_iotiming) {
535 printk(KERN_ERR "%s: get_iotiming undefined\n", __func__);
539 printk(KERN_INFO "%s: working out IO settings\n", __func__);
541 ret = (cpu_cur.info->get_iotiming)(&cpu_cur, &s3c24xx_iotiming);
543 printk(KERN_ERR "%s: failed to get timings\n", __func__);
548 /* if one or is zero, then return the other, otherwise return the min */
549 #define do_min(_a, _b) ((_a) == 0 ? (_b) : (_b) == 0 ? (_a) : min(_a, _b))
552 * s3c_cpufreq_freq_min - find the minimum settings for the given freq.
553 * @dst: The destination structure
555 * @b: The other argument.
557 * Create a minimum of each frequency entry in the 'struct s3c_freq',
558 * unless the entry is zero when it is ignored and the non-zero argument
561 static void s3c_cpufreq_freq_min(struct s3c_freq *dst,
562 struct s3c_freq *a, struct s3c_freq *b)
564 dst->fclk = do_min(a->fclk, b->fclk);
565 dst->hclk = do_min(a->hclk, b->hclk);
566 dst->pclk = do_min(a->pclk, b->pclk);
567 dst->armclk = do_min(a->armclk, b->armclk);
570 static inline u32 calc_locktime(u32 freq, u32 time_us)
574 result = freq * time_us;
575 result = DIV_ROUND_UP(result, 1000 * 1000);
580 static void s3c_cpufreq_update_loctkime(void)
582 unsigned int bits = cpu_cur.info->locktime_bits;
583 u32 rate = (u32)clk_get_rate(_clk_xtal);
591 val = calc_locktime(rate, cpu_cur.info->locktime_u) << bits;
592 val |= calc_locktime(rate, cpu_cur.info->locktime_m);
594 printk(KERN_INFO "%s: new locktime is 0x%08x\n", __func__, val);
595 __raw_writel(val, S3C2410_LOCKTIME);
598 static int s3c_cpufreq_build_freq(void)
602 if (!cpu_cur.info->calc_freqtable)
608 size = cpu_cur.info->calc_freqtable(&cpu_cur, NULL, 0);
611 ftab = kmalloc(sizeof(struct cpufreq_frequency_table) * size, GFP_KERNEL);
613 printk(KERN_ERR "%s: no memory for tables\n", __func__);
619 ret = cpu_cur.info->calc_freqtable(&cpu_cur, ftab, size);
620 s3c_cpufreq_addfreq(ftab, ret, size, CPUFREQ_TABLE_END);
625 static int __init s3c_cpufreq_initcall(void)
629 if (cpu_cur.info && cpu_cur.board) {
630 ret = s3c_cpufreq_initclks();
634 /* get current settings */
635 s3c_cpufreq_getcur(&cpu_cur);
636 s3c_cpufreq_show("cur", &cpu_cur);
638 if (cpu_cur.board->auto_io) {
639 ret = s3c_cpufreq_auto_io();
641 printk(KERN_ERR "%s: failed to get io timing\n",
647 if (cpu_cur.board->need_io && !cpu_cur.info->set_iotiming) {
648 printk(KERN_ERR "%s: no IO support registered\n",
654 if (!cpu_cur.info->need_pll)
655 cpu_cur.lock_pll = 1;
657 s3c_cpufreq_update_loctkime();
659 s3c_cpufreq_freq_min(&cpu_cur.max, &cpu_cur.board->max,
662 if (cpu_cur.info->calc_freqtable)
663 s3c_cpufreq_build_freq();
665 ret = cpufreq_register_driver(&s3c24xx_driver);
672 late_initcall(s3c_cpufreq_initcall);
675 * s3c_plltab_register - register CPU PLL table.
676 * @plls: The list of PLL entries.
677 * @plls_no: The size of the PLL entries @plls.
679 * Register the given set of PLLs with the system.
681 int __init s3c_plltab_register(struct cpufreq_frequency_table *plls,
682 unsigned int plls_no)
684 struct cpufreq_frequency_table *vals;
687 size = sizeof(struct cpufreq_frequency_table) * (plls_no + 1);
689 vals = kmalloc(size, GFP_KERNEL);
691 memcpy(vals, plls, size);
694 /* write a terminating entry, we don't store it in the
695 * table that is stored in the kernel */
697 vals->frequency = CPUFREQ_TABLE_END;
699 printk(KERN_INFO "cpufreq: %d PLL entries\n", plls_no);
701 printk(KERN_ERR "cpufreq: no memory for PLL tables\n");
703 return vals ? 0 : -ENOMEM;