2 * linux/arch/arm/mm/fault-armv.c
4 * Copyright (C) 1995 Linus Torvalds
5 * Modifications for ARM processor (c) 1995-2002 Russell King
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/sched.h>
13 #include <linux/kernel.h>
15 #include <linux/bitops.h>
16 #include <linux/vmalloc.h>
17 #include <linux/init.h>
18 #include <linux/pagemap.h>
21 #include <asm/cacheflush.h>
22 #include <asm/cachetype.h>
23 #include <asm/pgtable.h>
24 #include <asm/tlbflush.h>
28 static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE;
31 * We take the easy way out of this problem - we make the
32 * PTE uncacheable. However, we leave the write buffer on.
34 * Note that the pte lock held when calling update_mmu_cache must also
35 * guard the pte (somewhere else in the same mm) that we modify here.
36 * Therefore those configurations which might call adjust_pte (those
37 * without CONFIG_CPU_CACHE_VIPT) cannot support split page_table_lock.
39 static int do_adjust_pte(struct vm_area_struct *vma, unsigned long address,
46 * If this page is present, it's actually being shared.
48 ret = pte_present(entry);
51 * If this page isn't present, or is already setup to
52 * fault (ie, is old), we can safely ignore any issues.
54 if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) {
55 unsigned long pfn = pte_pfn(entry);
56 flush_cache_page(vma, address, pfn);
57 outer_flush_range((pfn << PAGE_SHIFT),
58 (pfn << PAGE_SHIFT) + PAGE_SIZE);
59 pte_val(entry) &= ~L_PTE_MT_MASK;
60 pte_val(entry) |= shared_pte_mask;
61 set_pte_at(vma->vm_mm, address, ptep, entry);
62 flush_tlb_page(vma, address);
68 static int adjust_pte(struct vm_area_struct *vma, unsigned long address)
75 pgd = pgd_offset(vma->vm_mm, address);
81 pmd = pmd_offset(pgd, address);
87 pte = pte_offset_map(pmd, address);
89 ret = do_adjust_pte(vma, address, pte);
109 make_coherent(struct address_space *mapping, struct vm_area_struct *vma, unsigned long addr, unsigned long pfn)
111 struct mm_struct *mm = vma->vm_mm;
112 struct vm_area_struct *mpnt;
113 struct prio_tree_iter iter;
114 unsigned long offset;
118 pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT);
121 * If we have any shared mappings that are in the same mm
122 * space, then we need to handle them specially to maintain
125 flush_dcache_mmap_lock(mapping);
126 vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
128 * If this VMA is not in our MM, we can ignore it.
129 * Note that we intentionally mask out the VMA
130 * that we are fixing up.
132 if (mpnt->vm_mm != mm || mpnt == vma)
134 if (!(mpnt->vm_flags & VM_MAYSHARE))
136 offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
137 aliases += adjust_pte(mpnt, mpnt->vm_start + offset);
139 flush_dcache_mmap_unlock(mapping);
141 adjust_pte(vma, addr);
143 flush_cache_page(vma, addr, pfn);
147 * Take care of architecture specific things when placing a new PTE into
148 * a page table, or changing an existing PTE. Basically, there are two
149 * things that we need to take care of:
151 * 1. If PG_dcache_dirty is set for the page, we need to ensure
152 * that any cache entries for the kernels virtual memory
153 * range are written back to the page.
154 * 2. If we have multiple shared mappings of the same space in
155 * an object, we need to deal with the cache aliasing issues.
157 * Note that the pte lock will be held.
159 void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
161 unsigned long pfn = pte_pfn(pte);
162 struct address_space *mapping;
169 * The zero page is never written to, so never has any dirty
170 * cache lines, and therefore never needs to be flushed.
172 page = pfn_to_page(pfn);
173 if (page == ZERO_PAGE(0))
176 mapping = page_mapping(page);
178 if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
179 __flush_dcache_page(mapping, page);
183 make_coherent(mapping, vma, addr, pfn);
184 else if (vma->vm_flags & VM_EXEC)
185 __flush_icache_all();
190 * Check whether the write buffer has physical address aliasing
191 * issues. If it has, we need to avoid them for the case where
192 * we have several shared mappings of the same object in user
195 static int __init check_writebuffer(unsigned long *p1, unsigned long *p2)
197 register unsigned long zero = 0, one = 1, val;
211 void __init check_writebuffer_bugs(void)
217 printk(KERN_INFO "CPU: Testing write buffer coherency: ");
219 page = alloc_page(GFP_KERNEL);
221 unsigned long *p1, *p2;
222 pgprot_t prot = __pgprot_modify(PAGE_KERNEL,
223 L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE);
225 p1 = vmap(&page, 1, VM_IOREMAP, prot);
226 p2 = vmap(&page, 1, VM_IOREMAP, prot);
229 v = check_writebuffer(p1, p2);
230 reason = "enabling work-around";
232 reason = "unable to map memory\n";
239 reason = "unable to grab page\n";
243 printk("failed, %s\n", reason);
244 shared_pte_mask = L_PTE_MT_UNCACHED;