SAFE public projects git trees. - safe/jmp/linux-2.6/blob - arch/arm/mach-s3c64xx/mach-smdk6410.c

   1 /* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
   2  *
   3  * Copyright 2008 Openmoko, Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12 */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/types.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/list.h>
  18 #include <linux/timer.h>
  19 #include <linux/init.h>
  20 #include <linux/serial_core.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/io.h>
  23 #include <linux/i2c.h>
  24 #include <linux/leds.h>
  25 #include <linux/fb.h>
  26 #include <linux/gpio.h>
  27 #include <linux/delay.h>
  28 #include <linux/smsc911x.h>
  29 #include <linux/regulator/fixed.h>
  30
  31 #ifdef CONFIG_SMDK6410_WM1190_EV1
  32 #include <linux/mfd/wm8350/core.h>
  33 #include <linux/mfd/wm8350/pmic.h>
  34 #endif
  35
  36 #ifdef CONFIG_SMDK6410_WM1192_EV1
  37 #include <linux/mfd/wm831x/core.h>
  38 #include <linux/mfd/wm831x/pdata.h>
  39 #endif
  40
  41 #include <video/platform_lcd.h>
  42
  43 #include <asm/mach/arch.h>
  44 #include <asm/mach/map.h>
  45 #include <asm/mach/irq.h>
  46
  47 #include <mach/hardware.h>
  48 #include <mach/regs-fb.h>
  49 #include <mach/map.h>
  50
  51 #include <asm/irq.h>
  52 #include <asm/mach-types.h>
  53
  54 #include <plat/regs-serial.h>
  55 #include <mach/regs-modem.h>
  56 #include <mach/regs-gpio.h>
  57 #include <mach/regs-sys.h>
  58 #include <mach/regs-srom.h>
  59 #include <plat/iic.h>
  60 #include <plat/fb.h>
  61 #include <plat/gpio-cfg.h>
  62
  63 #include <mach/s3c6410.h>
  64 #include <plat/clock.h>
  65 #include <plat/devs.h>
  66 #include <plat/cpu.h>
  67
  68 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  69 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  70 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  71
  72 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
  73         [0] = {
  74                 .hwport      = 0,
  75                 .flags       = 0,
  76                 .ucon        = UCON,
  77                 .ulcon       = ULCON,
  78                 .ufcon       = UFCON,
  79         },
  80         [1] = {
  81                 .hwport      = 1,
  82                 .flags       = 0,
  83                 .ucon        = UCON,
  84                 .ulcon       = ULCON,
  85                 .ufcon       = UFCON,
  86         },
  87         [2] = {
  88                 .hwport      = 2,
  89                 .flags       = 0,
  90                 .ucon        = UCON,
  91                 .ulcon       = ULCON,
  92                 .ufcon       = UFCON,
  93         },
  94         [3] = {
  95                 .hwport      = 3,
  96                 .flags       = 0,
  97                 .ucon        = UCON,
  98                 .ulcon       = ULCON,
  99                 .ufcon       = UFCON,
 100         },
 101 };
 102
 103 /* framebuffer and LCD setup. */
 104
 105 /* GPF15 = LCD backlight control
 106  * GPF13 => Panel power
 107  * GPN5 = LCD nRESET signal
 108  * PWM_TOUT1 => backlight brightness
 109  */
 110
 111 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
 112                                    unsigned int power)
 113 {
 114         if (power) {
 115                 gpio_direction_output(S3C64XX_GPF(13), 1);
 116                 gpio_direction_output(S3C64XX_GPF(15), 1);
 117
 118                 /* fire nRESET on power up */
 119                 gpio_direction_output(S3C64XX_GPN(5), 0);
 120                 msleep(10);
 121                 gpio_direction_output(S3C64XX_GPN(5), 1);
 122                 msleep(1);
 123         } else {
 124                 gpio_direction_output(S3C64XX_GPF(15), 0);
 125                 gpio_direction_output(S3C64XX_GPF(13), 0);
 126         }
 127 }
 128
 129 static struct plat_lcd_data smdk6410_lcd_power_data = {
 130         .set_power      = smdk6410_lcd_power_set,
 131 };
 132
 133 static struct platform_device smdk6410_lcd_powerdev = {
 134         .name                   = "platform-lcd",
 135         .dev.parent             = &s3c_device_fb.dev,
 136         .dev.platform_data      = &smdk6410_lcd_power_data,
 137 };
 138
 139 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
 140         /* this is to ensure we use win0 */
 141         .win_mode       = {
 142                 .pixclock       = 41094,
 143                 .left_margin    = 8,
 144                 .right_margin   = 13,
 145                 .upper_margin   = 7,
 146                 .lower_margin   = 5,
 147                 .hsync_len      = 3,
 148                 .vsync_len      = 1,
 149                 .xres           = 800,
 150                 .yres           = 480,
 151         },
 152         .max_bpp        = 32,
 153         .default_bpp    = 16,
 154 };
 155
 156 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
 157 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
 158         .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 159         .win[0]         = &smdk6410_fb_win0,
 160         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 161         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 162 };
 163
 164 /*
 165  * Configuring Ethernet on SMDK6410
 166  *
 167  * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
 168  * The constant address below corresponds to nCS1
 169  *
 170  *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
 171  *  2) CFG6 needs to be switched to "LAN9115" side
 172  */
 173
 174 static struct resource smdk6410_smsc911x_resources[] = {
 175         [0] = {
 176                 .start = S3C64XX_PA_XM0CSN1,
 177                 .end   = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
 178                 .flags = IORESOURCE_MEM,
 179         },
 180         [1] = {
 181                 .start = S3C_EINT(10),
 182                 .end   = S3C_EINT(10),
 183                 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
 184         },
 185 };
 186
 187 static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
 188         .irq_polarity  = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 189         .irq_type      = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
 190         .flags         = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
 191         .phy_interface = PHY_INTERFACE_MODE_MII,
 192 };
 193
 194
 195 static struct platform_device smdk6410_smsc911x = {
 196         .name          = "smsc911x",
 197         .id            = -1,
 198         .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
 199         .resource      = &smdk6410_smsc911x_resources[0],
 200         .dev = {
 201                 .platform_data = &smdk6410_smsc911x_pdata,
 202         },
 203 };
 204
 205 #ifdef CONFIG_REGULATOR
 206 static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
 207         {
 208                 /* WM8580 */
 209                 .supply = "PVDD",
 210                 .dev_name = "0-001b",
 211         },
 212         {
 213                 /* WM8580 */
 214                 .supply = "AVDD",
 215                 .dev_name = "0-001b",
 216         },
 217 };
 218
 219 static struct regulator_init_data smdk6410_b_pwr_5v_data = {
 220         .constraints = {
 221                 .always_on = 1,
 222         },
 223         .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
 224         .consumer_supplies = smdk6410_b_pwr_5v_consumers,
 225 };
 226
 227 static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
 228         .supply_name = "B_PWR_5V",
 229         .microvolts = 5000000,
 230         .init_data = &smdk6410_b_pwr_5v_data,
 231         .gpio = -EINVAL,
 232 };
 233
 234 static struct platform_device smdk6410_b_pwr_5v = {
 235         .name          = "reg-fixed-voltage",
 236         .id            = -1,
 237         .dev = {
 238                 .platform_data = &smdk6410_b_pwr_5v_pdata,
 239         },
 240 };
 241 #endif
 242
 243 static struct map_desc smdk6410_iodesc[] = {};
 244
 245 static struct platform_device *smdk6410_devices[] __initdata = {
 246 #ifdef CONFIG_SMDK6410_SD_CH0
 247         &s3c_device_hsmmc0,
 248 #endif
 249 #ifdef CONFIG_SMDK6410_SD_CH1
 250         &s3c_device_hsmmc1,
 251 #endif
 252         &s3c_device_i2c0,
 253         &s3c_device_i2c1,
 254         &s3c_device_fb,
 255         &s3c_device_ohci,
 256         &s3c_device_usb_hsotg,
 257
 258 #ifdef CONFIG_REGULATOR
 259         &smdk6410_b_pwr_5v,
 260 #endif
 261         &smdk6410_lcd_powerdev,
 262
 263         &smdk6410_smsc911x,
 264 };
 265
 266 #ifdef CONFIG_REGULATOR
 267 /* ARM core */
 268 static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
 269         {
 270                 .supply = "vddarm",
 271         }
 272 };
 273
 274 /* VDDARM, BUCK1 on J5 */
 275 static struct regulator_init_data smdk6410_vddarm = {
 276         .constraints = {
 277                 .name = "PVDD_ARM",
 278                 .min_uV = 1000000,
 279                 .max_uV = 1300000,
 280                 .always_on = 1,
 281                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 282         },
 283         .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
 284         .consumer_supplies = smdk6410_vddarm_consumers,
 285 };
 286
 287 /* VDD_INT, BUCK2 on J5 */
 288 static struct regulator_init_data smdk6410_vddint = {
 289         .constraints = {
 290                 .name = "PVDD_INT",
 291                 .min_uV = 1000000,
 292                 .max_uV = 1200000,
 293                 .always_on = 1,
 294                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 295         },
 296 };
 297
 298 /* VDD_HI, LDO3 on J5 */
 299 static struct regulator_init_data smdk6410_vddhi = {
 300         .constraints = {
 301                 .name = "PVDD_HI",
 302                 .always_on = 1,
 303         },
 304 };
 305
 306 /* VDD_PLL, LDO2 on J5 */
 307 static struct regulator_init_data smdk6410_vddpll = {
 308         .constraints = {
 309                 .name = "PVDD_PLL",
 310                 .always_on = 1,
 311         },
 312 };
 313
 314 /* VDD_UH_MMC, LDO5 on J5 */
 315 static struct regulator_init_data smdk6410_vdduh_mmc = {
 316         .constraints = {
 317                 .name = "PVDD_UH/PVDD_MMC",
 318                 .always_on = 1,
 319         },
 320 };
 321
 322 /* VCCM3BT, LDO8 on J5 */
 323 static struct regulator_init_data smdk6410_vccmc3bt = {
 324         .constraints = {
 325                 .name = "PVCCM3BT",
 326                 .always_on = 1,
 327         },
 328 };
 329
 330 /* VCCM2MTV, LDO11 on J5 */
 331 static struct regulator_init_data smdk6410_vccm2mtv = {
 332         .constraints = {
 333                 .name = "PVCCM2MTV",
 334                 .always_on = 1,
 335         },
 336 };
 337
 338 /* VDD_LCD, LDO12 on J5 */
 339 static struct regulator_init_data smdk6410_vddlcd = {
 340         .constraints = {
 341                 .name = "PVDD_LCD",
 342                 .always_on = 1,
 343         },
 344 };
 345
 346 /* VDD_OTGI, LDO9 on J5 */
 347 static struct regulator_init_data smdk6410_vddotgi = {
 348         .constraints = {
 349                 .name = "PVDD_OTGI",
 350                 .always_on = 1,
 351         },
 352 };
 353
 354 /* VDD_OTG, LDO14 on J5 */
 355 static struct regulator_init_data smdk6410_vddotg = {
 356         .constraints = {
 357                 .name = "PVDD_OTG",
 358                 .always_on = 1,
 359         },
 360 };
 361
 362 /* VDD_ALIVE, LDO15 on J5 */
 363 static struct regulator_init_data smdk6410_vddalive = {
 364         .constraints = {
 365                 .name = "PVDD_ALIVE",
 366                 .always_on = 1,
 367         },
 368 };
 369
 370 /* VDD_AUDIO, VLDO_AUDIO on J5 */
 371 static struct regulator_init_data smdk6410_vddaudio = {
 372         .constraints = {
 373                 .name = "PVDD_AUDIO",
 374                 .always_on = 1,
 375         },
 376 };
 377 #endif
 378
 379 #ifdef CONFIG_SMDK6410_WM1190_EV1
 380 /* S3C64xx internal logic & PLL */
 381 static struct regulator_init_data wm8350_dcdc1_data = {
 382         .constraints = {
 383                 .name = "PVDD_INT/PVDD_PLL",
 384                 .min_uV = 1200000,
 385                 .max_uV = 1200000,
 386                 .always_on = 1,
 387                 .apply_uV = 1,
 388         },
 389 };
 390
 391 /* Memory */
 392 static struct regulator_init_data wm8350_dcdc3_data = {
 393         .constraints = {
 394                 .name = "PVDD_MEM",
 395                 .min_uV = 1800000,
 396                 .max_uV = 1800000,
 397                 .always_on = 1,
 398                 .state_mem = {
 399                          .uV = 1800000,
 400                          .mode = REGULATOR_MODE_NORMAL,
 401                          .enabled = 1,
 402                 },
 403                 .initial_state = PM_SUSPEND_MEM,
 404         },
 405 };
 406
 407 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
 408 static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
 409         {
 410                 /* WM8580 */
 411                 .supply = "DVDD",
 412                 .dev_name = "0-001b",
 413         },
 414 };
 415
 416 static struct regulator_init_data wm8350_dcdc4_data = {
 417         .constraints = {
 418                 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
 419                 .min_uV = 3000000,
 420                 .max_uV = 3000000,
 421                 .always_on = 1,
 422         },
 423         .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
 424         .consumer_supplies = wm8350_dcdc4_consumers,
 425 };
 426
 427 /* OTGi/1190-EV1 HPVDD & AVDD */
 428 static struct regulator_init_data wm8350_ldo4_data = {
 429         .constraints = {
 430                 .name = "PVDD_OTGI/HPVDD/AVDD",
 431                 .min_uV = 1200000,
 432                 .max_uV = 1200000,
 433                 .apply_uV = 1,
 434                 .always_on = 1,
 435         },
 436 };
 437
 438 static struct {
 439         int regulator;
 440         struct regulator_init_data *initdata;
 441 } wm1190_regulators[] = {
 442         { WM8350_DCDC_1, &wm8350_dcdc1_data },
 443         { WM8350_DCDC_3, &wm8350_dcdc3_data },
 444         { WM8350_DCDC_4, &wm8350_dcdc4_data },
 445         { WM8350_DCDC_6, &smdk6410_vddarm },
 446         { WM8350_LDO_1, &smdk6410_vddalive },
 447         { WM8350_LDO_2, &smdk6410_vddotg },
 448         { WM8350_LDO_3, &smdk6410_vddlcd },
 449         { WM8350_LDO_4, &wm8350_ldo4_data },
 450 };
 451
 452 static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
 453 {
 454         int i;
 455
 456         /* Configure the IRQ line */
 457         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
 458
 459         /* Instantiate the regulators */
 460         for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
 461                 wm8350_register_regulator(wm8350,
 462                                           wm1190_regulators[i].regulator,
 463                                           wm1190_regulators[i].initdata);
 464
 465         return 0;
 466 }
 467
 468 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
 469         .init = smdk6410_wm8350_init,
 470         .irq_high = 1,
 471         .irq_base = IRQ_BOARD_START,
 472 };
 473 #endif
 474
 475 #ifdef CONFIG_SMDK6410_WM1192_EV1
 476 static struct gpio_led wm1192_pmic_leds[] = {
 477         {
 478                 .name = "PMIC:red:power",
 479                 .gpio = GPIO_BOARD_START + 3,
 480                 .default_state = LEDS_GPIO_DEFSTATE_ON,
 481         },
 482 };
 483
 484 static struct gpio_led_platform_data wm1192_pmic_led = {
 485         .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
 486         .leds = wm1192_pmic_leds,
 487 };
 488
 489 static struct platform_device wm1192_pmic_led_dev = {
 490         .name          = "leds-gpio",
 491         .id            = -1,
 492         .dev = {
 493                 .platform_data = &wm1192_pmic_led,
 494         },
 495 };
 496
 497 static int wm1192_pre_init(struct wm831x *wm831x)
 498 {
 499         int ret;
 500
 501         /* Configure the IRQ line */
 502         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
 503
 504         ret = platform_device_register(&wm1192_pmic_led_dev);
 505         if (ret != 0)
 506                 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
 507
 508         return 0;
 509 }
 510
 511 static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
 512         .isink = 1,
 513         .max_uA = 27554,
 514 };
 515
 516 static struct regulator_init_data wm1192_dcdc3 = {
 517         .constraints = {
 518                 .name = "PVDD_MEM/PVDD_GPS",
 519                 .always_on = 1,
 520         },
 521 };
 522
 523 static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
 524         { .supply = "DVDD", .dev_name = "0-001b", },   /* WM8580 */
 525 };
 526
 527 static struct regulator_init_data wm1192_ldo1 = {
 528         .constraints = {
 529                 .name = "PVDD_LCD/PVDD_EXT",
 530                 .always_on = 1,
 531         },
 532         .consumer_supplies = wm1192_ldo1_consumers,
 533         .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
 534 };
 535
 536 static struct wm831x_status_pdata wm1192_led7_pdata = {
 537         .name = "LED7:green:",
 538 };
 539
 540 static struct wm831x_status_pdata wm1192_led8_pdata = {
 541         .name = "LED8:green:",
 542 };
 543
 544 static struct wm831x_pdata smdk6410_wm1192_pdata = {
 545         .pre_init = wm1192_pre_init,
 546         .irq_base = IRQ_BOARD_START,
 547
 548         .backlight = &wm1192_backlight_pdata,
 549         .dcdc = {
 550                 &smdk6410_vddarm,  /* DCDC1 */
 551                 &smdk6410_vddint,  /* DCDC2 */
 552                 &wm1192_dcdc3,
 553         },
 554         .gpio_base = GPIO_BOARD_START,
 555         .ldo = {
 556                  &wm1192_ldo1,        /* LDO1 */
 557                  &smdk6410_vdduh_mmc, /* LDO2 */
 558                  NULL,                /* LDO3 NC */
 559                  &smdk6410_vddotgi,   /* LDO4 */
 560                  &smdk6410_vddotg,    /* LDO5 */
 561                  &smdk6410_vddhi,     /* LDO6 */
 562                  &smdk6410_vddaudio,  /* LDO7 */
 563                  &smdk6410_vccm2mtv,  /* LDO8 */
 564                  &smdk6410_vddpll,    /* LDO9 */
 565                  &smdk6410_vccmc3bt,  /* LDO10 */
 566                  &smdk6410_vddalive,  /* LDO11 */
 567         },
 568         .status = {
 569                 &wm1192_led7_pdata,
 570                 &wm1192_led8_pdata,
 571         },
 572 };
 573 #endif
 574
 575 static struct i2c_board_info i2c_devs0[] __initdata = {
 576         { I2C_BOARD_INFO("24c08", 0x50), },
 577         { I2C_BOARD_INFO("wm8580", 0x1b), },
 578
 579 #ifdef CONFIG_SMDK6410_WM1192_EV1
 580         { I2C_BOARD_INFO("wm8312", 0x34),
 581           .platform_data = &smdk6410_wm1192_pdata,
 582           .irq = S3C_EINT(12),
 583         },
 584 #endif
 585
 586 #ifdef CONFIG_SMDK6410_WM1190_EV1
 587         { I2C_BOARD_INFO("wm8350", 0x1a),
 588           .platform_data = &smdk6410_wm8350_pdata,
 589           .irq = S3C_EINT(12),
 590         },
 591 #endif
 592 };
 593
 594 static struct i2c_board_info i2c_devs1[] __initdata = {
 595         { I2C_BOARD_INFO("24c128", 0x57), },    /* Samsung S524AD0XD1 */
 596 };
 597
 598 static void __init smdk6410_map_io(void)
 599 {
 600         u32 tmp;
 601
 602         s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
 603         s3c24xx_init_clocks(12000000);
 604         s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
 605
 606         /* set the LCD type */
 607
 608         tmp = __raw_readl(S3C64XX_SPCON);
 609         tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
 610         tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
 611         __raw_writel(tmp, S3C64XX_SPCON);
 612
 613         /* remove the lcd bypass */
 614         tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
 615         tmp &= ~MIFPCON_LCD_BYPASS;
 616         __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
 617 }
 618
 619 static void __init smdk6410_machine_init(void)
 620 {
 621         u32 cs1;
 622
 623         s3c_i2c0_set_platdata(NULL);
 624         s3c_i2c1_set_platdata(NULL);
 625         s3c_fb_set_platdata(&smdk6410_lcd_pdata);
 626
 627         /* configure nCS1 width to 16 bits */
 628
 629         cs1 = __raw_readl(S3C64XX_SROM_BW) &
 630                     ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
 631         cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
 632                 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
 633                 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
 634                                                    S3C64XX_SROM_BW__NCS1__SHIFT;
 635         __raw_writel(cs1, S3C64XX_SROM_BW);
 636
 637         /* set timing for nCS1 suitable for ethernet chip */
 638
 639         __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
 640                      (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
 641                      (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
 642                      (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
 643                      (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
 644                      (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
 645                      (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
 646
 647         gpio_request(S3C64XX_GPN(5), "LCD power");
 648         gpio_request(S3C64XX_GPF(13), "LCD power");
 649         gpio_request(S3C64XX_GPF(15), "LCD power");
 650
 651         i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
 652         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 653
 654         platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
 655 }
 656
 657 MACHINE_START(SMDK6410, "SMDK6410")
 658         /* Maintainer: Ben Dooks <ben@fluff.org> */
 659         .phys_io        = S3C_PA_UART & 0xfff00000,
 660         .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
 661         .boot_params    = S3C64XX_PA_SDRAM + 0x100,
 662
 663         .init_irq       = s3c6410_init_irq,
 664         .map_io         = smdk6410_map_io,
 665         .init_machine   = smdk6410_machine_init,
 666         .timer          = &s3c24xx_timer,
 667 MACHINE_END