2 * linux/arch/arm/mach-pxa/generic.c
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
8 * Code common to all PXA machines.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/platform_device.h>
24 #include <linux/ioport.h>
26 #include <linux/string.h>
28 #include <asm/hardware.h>
30 #include <asm/system.h>
31 #include <asm/pgtable.h>
32 #include <asm/mach/map.h>
34 #include <asm/arch/pxa-regs.h>
35 #include <asm/arch/gpio.h>
36 #include <asm/arch/udc.h>
37 #include <asm/arch/pxafb.h>
38 #include <asm/arch/mmc.h>
39 #include <asm/arch/irda.h>
40 #include <asm/arch/i2c.h>
46 * Get the clock frequency as reflected by CCCR and the turbo flag.
47 * We assume these values have been applied via a fcs.
48 * If info is not 0 we also display the current settings.
50 unsigned int get_clk_frequency_khz(int info)
52 if (cpu_is_pxa21x() || cpu_is_pxa25x())
53 return pxa25x_get_clk_frequency_khz(info);
55 return pxa27x_get_clk_frequency_khz(info);
57 EXPORT_SYMBOL(get_clk_frequency_khz);
60 * Return the current memory clock frequency in units of 10kHz
62 unsigned int get_memclk_frequency_10khz(void)
64 if (cpu_is_pxa21x() || cpu_is_pxa25x())
65 return pxa25x_get_memclk_frequency_10khz();
67 return pxa27x_get_memclk_frequency_10khz();
69 EXPORT_SYMBOL(get_memclk_frequency_10khz);
72 * Handy function to set GPIO alternate functions
76 int pxa_gpio_mode(int gpio_mode)
79 int gpio = gpio_mode & GPIO_MD_MASK_NR;
80 int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
83 if (gpio > pxa_last_gpio)
86 local_irq_save(flags);
87 if (gpio_mode & GPIO_DFLT_LOW)
88 GPCR(gpio) = GPIO_bit(gpio);
89 else if (gpio_mode & GPIO_DFLT_HIGH)
90 GPSR(gpio) = GPIO_bit(gpio);
91 if (gpio_mode & GPIO_MD_MASK_DIR)
92 GPDR(gpio) |= GPIO_bit(gpio);
94 GPDR(gpio) &= ~GPIO_bit(gpio);
95 gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
96 GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
97 local_irq_restore(flags);
102 EXPORT_SYMBOL(pxa_gpio_mode);
107 int pxa_gpio_get_value(unsigned gpio)
109 return __gpio_get_value(gpio);
112 EXPORT_SYMBOL(pxa_gpio_get_value);
115 * Set output GPIO level
117 void pxa_gpio_set_value(unsigned gpio, int value)
119 __gpio_set_value(gpio, value);
122 EXPORT_SYMBOL(pxa_gpio_set_value);
125 * Routine to safely enable or disable a clock in the CKEN
127 void __pxa_set_cken(int clock, int enable)
130 local_irq_save(flags);
133 CKEN |= (1 << clock);
135 CKEN &= ~(1 << clock);
137 local_irq_restore(flags);
140 EXPORT_SYMBOL(__pxa_set_cken);
143 * Intel PXA2xx internal register mapping.
145 * Note 1: not all PXA2xx variants implement all those addresses.
147 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
148 * and cache flush area.
150 static struct map_desc standard_io_desc[] __initdata = {
152 .virtual = 0xf2000000,
153 .pfn = __phys_to_pfn(0x40000000),
154 .length = 0x02000000,
157 .virtual = 0xf4000000,
158 .pfn = __phys_to_pfn(0x44000000),
159 .length = 0x00100000,
162 .virtual = 0xf6000000,
163 .pfn = __phys_to_pfn(0x48000000),
164 .length = 0x00100000,
167 .virtual = 0xf8000000,
168 .pfn = __phys_to_pfn(0x4c000000),
169 .length = 0x00100000,
172 .virtual = 0xfa000000,
173 .pfn = __phys_to_pfn(0x50000000),
174 .length = 0x00100000,
177 .virtual = 0xfe000000,
178 .pfn = __phys_to_pfn(0x58000000),
179 .length = 0x00100000,
181 }, { /* UNCACHED_PHYS_0 */
182 .virtual = 0xff000000,
183 .pfn = __phys_to_pfn(0x00000000),
184 .length = 0x00100000,
189 void __init pxa_map_io(void)
191 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
192 get_clk_frequency_khz(1);
196 static struct resource pxamci_resources[] = {
200 .flags = IORESOURCE_MEM,
205 .flags = IORESOURCE_IRQ,
209 static u64 pxamci_dmamask = 0xffffffffUL;
211 struct platform_device pxa_device_mci = {
212 .name = "pxa2xx-mci",
215 .dma_mask = &pxamci_dmamask,
216 .coherent_dma_mask = 0xffffffff,
218 .num_resources = ARRAY_SIZE(pxamci_resources),
219 .resource = pxamci_resources,
222 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
224 pxa_device_mci.dev.platform_data = info;
228 static struct pxa2xx_udc_mach_info pxa_udc_info;
230 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
232 memcpy(&pxa_udc_info, info, sizeof *info);
235 static struct resource pxa2xx_udc_resources[] = {
239 .flags = IORESOURCE_MEM,
244 .flags = IORESOURCE_IRQ,
248 static u64 udc_dma_mask = ~(u32)0;
250 struct platform_device pxa_device_udc = {
251 .name = "pxa2xx-udc",
253 .resource = pxa2xx_udc_resources,
254 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
256 .platform_data = &pxa_udc_info,
257 .dma_mask = &udc_dma_mask,
261 static struct resource pxafb_resources[] = {
265 .flags = IORESOURCE_MEM,
270 .flags = IORESOURCE_IRQ,
274 static u64 fb_dma_mask = ~(u64)0;
276 struct platform_device pxa_device_fb = {
280 .dma_mask = &fb_dma_mask,
281 .coherent_dma_mask = 0xffffffff,
283 .num_resources = ARRAY_SIZE(pxafb_resources),
284 .resource = pxafb_resources,
287 void __init set_pxa_fb_info(struct pxafb_mach_info *info)
289 pxa_device_fb.dev.platform_data = info;
292 void __init set_pxa_fb_parent(struct device *parent_dev)
294 pxa_device_fb.dev.parent = parent_dev;
297 static struct resource pxa_resource_ffuart[] = {
299 .start = __PREG(FFUART),
300 .end = __PREG(FFUART) + 35,
301 .flags = IORESOURCE_MEM,
305 .flags = IORESOURCE_IRQ,
309 struct platform_device pxa_device_ffuart= {
310 .name = "pxa2xx-uart",
312 .resource = pxa_resource_ffuart,
313 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
316 static struct resource pxa_resource_btuart[] = {
318 .start = __PREG(BTUART),
319 .end = __PREG(BTUART) + 35,
320 .flags = IORESOURCE_MEM,
324 .flags = IORESOURCE_IRQ,
328 struct platform_device pxa_device_btuart = {
329 .name = "pxa2xx-uart",
331 .resource = pxa_resource_btuart,
332 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
335 static struct resource pxa_resource_stuart[] = {
337 .start = __PREG(STUART),
338 .end = __PREG(STUART) + 35,
339 .flags = IORESOURCE_MEM,
343 .flags = IORESOURCE_IRQ,
347 struct platform_device pxa_device_stuart = {
348 .name = "pxa2xx-uart",
350 .resource = pxa_resource_stuart,
351 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
354 static struct resource pxa_resource_hwuart[] = {
356 .start = __PREG(HWUART),
357 .end = __PREG(HWUART) + 47,
358 .flags = IORESOURCE_MEM,
362 .flags = IORESOURCE_IRQ,
366 struct platform_device pxa_device_hwuart = {
367 .name = "pxa2xx-uart",
369 .resource = pxa_resource_hwuart,
370 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
373 static struct resource pxai2c_resources[] = {
377 .flags = IORESOURCE_MEM,
381 .flags = IORESOURCE_IRQ,
385 struct platform_device pxa_device_i2c = {
386 .name = "pxa2xx-i2c",
388 .resource = pxai2c_resources,
389 .num_resources = ARRAY_SIZE(pxai2c_resources),
392 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
394 pxa_device_i2c.dev.platform_data = info;
397 static struct resource pxai2s_resources[] = {
401 .flags = IORESOURCE_MEM,
405 .flags = IORESOURCE_IRQ,
409 struct platform_device pxa_device_i2s = {
410 .name = "pxa2xx-i2s",
412 .resource = pxai2s_resources,
413 .num_resources = ARRAY_SIZE(pxai2s_resources),
416 static u64 pxaficp_dmamask = ~(u32)0;
418 struct platform_device pxa_device_ficp = {
422 .dma_mask = &pxaficp_dmamask,
423 .coherent_dma_mask = 0xffffffff,
427 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
429 pxa_device_ficp.dev.platform_data = info;
432 struct platform_device pxa_device_rtc = {
433 .name = "sa1100-rtc",