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   1 /*
   2  * arch/arm/mach-orion5x/rd88f5182-setup.c
   3  *
   4  * Marvell Orion-NAS Reference Design Setup
   5  *
   6  * Maintainer: Ronen Shitrit <rshitrit@marvell.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2.  This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/pci.h>
  17 #include <linux/irq.h>
  18 #include <linux/mtd/physmap.h>
  19 #include <linux/mv643xx_eth.h>
  20 #include <linux/ata_platform.h>
  21 #include <linux/i2c.h>
  22 #include <asm/mach-types.h>
  23 #include <asm/gpio.h>
  24 #include <asm/leds.h>
  25 #include <asm/mach/arch.h>
  26 #include <asm/mach/pci.h>
  27 #include <asm/arch/orion5x.h>
  28 #include "common.h"
  29
  30 /*****************************************************************************
  31  * RD-88F5182 Info
  32  ****************************************************************************/
  33
  34 /*
  35  * 512K NOR flash Device bus boot chip select
  36  */
  37
  38 #define RD88F5182_NOR_BOOT_BASE         0xf4000000
  39 #define RD88F5182_NOR_BOOT_SIZE         SZ_512K
  40
  41 /*
  42  * 16M NOR flash on Device bus chip select 1
  43  */
  44
  45 #define RD88F5182_NOR_BASE              0xfc000000
  46 #define RD88F5182_NOR_SIZE              SZ_16M
  47
  48 /*
  49  * PCI
  50  */
  51
  52 #define RD88F5182_PCI_SLOT0_OFFS        7
  53 #define RD88F5182_PCI_SLOT0_IRQ_A_PIN   7
  54 #define RD88F5182_PCI_SLOT0_IRQ_B_PIN   6
  55
  56 /*
  57  * GPIO Debug LED
  58  */
  59
  60 #define RD88F5182_GPIO_DBG_LED          0
  61
  62 /*****************************************************************************
  63  * 16M NOR Flash on Device bus CS1
  64  ****************************************************************************/
  65
  66 static struct physmap_flash_data rd88f5182_nor_flash_data = {
  67         .width          = 1,
  68 };
  69
  70 static struct resource rd88f5182_nor_flash_resource = {
  71         .flags                  = IORESOURCE_MEM,
  72         .start                  = RD88F5182_NOR_BASE,
  73         .end                    = RD88F5182_NOR_BASE + RD88F5182_NOR_SIZE - 1,
  74 };
  75
  76 static struct platform_device rd88f5182_nor_flash = {
  77         .name                   = "physmap-flash",
  78         .id                     = 0,
  79         .dev            = {
  80                 .platform_data  = &rd88f5182_nor_flash_data,
  81         },
  82         .num_resources          = 1,
  83         .resource               = &rd88f5182_nor_flash_resource,
  84 };
  85
  86 #ifdef CONFIG_LEDS
  87
  88 /*****************************************************************************
  89  * Use GPIO debug led as CPU active indication
  90  ****************************************************************************/
  91
  92 static void rd88f5182_dbgled_event(led_event_t evt)
  93 {
  94         int val;
  95
  96         if (evt == led_idle_end)
  97                 val = 1;
  98         else if (evt == led_idle_start)
  99                 val = 0;
 100         else
 101                 return;
 102
 103         gpio_set_value(RD88F5182_GPIO_DBG_LED, val);
 104 }
 105
 106 static int __init rd88f5182_dbgled_init(void)
 107 {
 108         int pin;
 109
 110         if (machine_is_rd88f5182()) {
 111                 pin = RD88F5182_GPIO_DBG_LED;
 112
 113                 if (gpio_request(pin, "DBGLED") == 0) {
 114                         if (gpio_direction_output(pin, 0) != 0) {
 115                                 printk(KERN_ERR "rd88f5182_dbgled_init failed "
 116                                                 "to set output pin %d\n", pin);
 117                                 gpio_free(pin);
 118                                 return 0;
 119                         }
 120                 } else {
 121                         printk(KERN_ERR "rd88f5182_dbgled_init failed "
 122                                         "to request gpio %d\n", pin);
 123                         return 0;
 124                 }
 125
 126                 leds_event = rd88f5182_dbgled_event;
 127         }
 128
 129         return 0;
 130 }
 131
 132 __initcall(rd88f5182_dbgled_init);
 133
 134 #endif
 135
 136 /*****************************************************************************
 137  * PCI
 138  ****************************************************************************/
 139
 140 void __init rd88f5182_pci_preinit(void)
 141 {
 142         int pin;
 143
 144         /*
 145          * Configure PCI GPIO IRQ pins
 146          */
 147         pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
 148         if (gpio_request(pin, "PCI IntA") == 0) {
 149                 if (gpio_direction_input(pin) == 0) {
 150                         set_irq_type(gpio_to_irq(pin), IRQT_LOW);
 151                 } else {
 152                         printk(KERN_ERR "rd88f5182_pci_preinit faield to "
 153                                         "set_irq_type pin %d\n", pin);
 154                         gpio_free(pin);
 155                 }
 156         } else {
 157                 printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin);
 158         }
 159
 160         pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
 161         if (gpio_request(pin, "PCI IntB") == 0) {
 162                 if (gpio_direction_input(pin) == 0) {
 163                         set_irq_type(gpio_to_irq(pin), IRQT_LOW);
 164                 } else {
 165                         printk(KERN_ERR "rd88f5182_pci_preinit faield to "
 166                                         "set_irq_type pin %d\n", pin);
 167                         gpio_free(pin);
 168                 }
 169         } else {
 170                 printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin);
 171         }
 172 }
 173
 174 static int __init rd88f5182_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 175 {
 176         int irq;
 177
 178         /*
 179          * Check for devices with hard-wired IRQs.
 180          */
 181         irq = orion5x_pci_map_irq(dev, slot, pin);
 182         if (irq != -1)
 183                 return irq;
 184
 185         /*
 186          * PCI IRQs are connected via GPIOs
 187          */
 188         switch (slot - RD88F5182_PCI_SLOT0_OFFS) {
 189         case 0:
 190                 if (pin == 1)
 191                         return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN);
 192                 else
 193                         return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN);
 194         default:
 195                 return -1;
 196         }
 197 }
 198
 199 static struct hw_pci rd88f5182_pci __initdata = {
 200         .nr_controllers = 2,
 201         .preinit        = rd88f5182_pci_preinit,
 202         .swizzle        = pci_std_swizzle,
 203         .setup          = orion5x_pci_sys_setup,
 204         .scan           = orion5x_pci_sys_scan_bus,
 205         .map_irq        = rd88f5182_pci_map_irq,
 206 };
 207
 208 static int __init rd88f5182_pci_init(void)
 209 {
 210         if (machine_is_rd88f5182())
 211                 pci_common_init(&rd88f5182_pci);
 212
 213         return 0;
 214 }
 215
 216 subsys_initcall(rd88f5182_pci_init);
 217
 218 /*****************************************************************************
 219  * Ethernet
 220  ****************************************************************************/
 221
 222 static struct mv643xx_eth_platform_data rd88f5182_eth_data = {
 223         .phy_addr       = 8,
 224         .force_phy_addr = 1,
 225 };
 226
 227 /*****************************************************************************
 228  * RTC DS1338 on I2C bus
 229  ****************************************************************************/
 230 static struct i2c_board_info __initdata rd88f5182_i2c_rtc = {
 231         I2C_BOARD_INFO("ds1338", 0x68),
 232 };
 233
 234 /*****************************************************************************
 235  * Sata
 236  ****************************************************************************/
 237 static struct mv_sata_platform_data rd88f5182_sata_data = {
 238         .n_ports        = 2,
 239 };
 240
 241 /*****************************************************************************
 242  * General Setup
 243  ****************************************************************************/
 244 static void __init rd88f5182_init(void)
 245 {
 246         /*
 247          * Setup basic Orion functions. Need to be called early.
 248          */
 249         orion5x_init();
 250
 251         /*
 252          * Open a special address decode windows for the PCIe WA.
 253          */
 254         orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE,
 255                                 ORION5X_PCIE_WA_SIZE);
 256
 257         /*
 258          * Setup Multiplexing Pins --
 259          * MPP[0] Debug Led (GPIO - Out)
 260          * MPP[1] Debug Led (GPIO - Out)
 261          * MPP[2] N/A
 262          * MPP[3] RTC_Int (GPIO - In)
 263          * MPP[4] GPIO
 264          * MPP[5] GPIO
 265          * MPP[6] PCI_intA (GPIO - In)
 266          * MPP[7] PCI_intB (GPIO - In)
 267          * MPP[8-11] N/A
 268          * MPP[12] SATA 0 presence Indication
 269          * MPP[13] SATA 1 presence Indication
 270          * MPP[14] SATA 0 active Indication
 271          * MPP[15] SATA 1 active indication
 272          * MPP[16-19] Not used
 273          * MPP[20] PCI Clock to MV88F5182
 274          * MPP[21] PCI Clock to mini PCI CON11
 275          * MPP[22] USB 0 over current indication
 276          * MPP[23] USB 1 over current indication
 277          * MPP[24] USB 1 over current enable
 278          * MPP[25] USB 0 over current enable
 279          */
 280
 281         orion5x_write(MPP_0_7_CTRL, 0x00000003);
 282         orion5x_write(MPP_8_15_CTRL, 0x55550000);
 283         orion5x_write(MPP_16_19_CTRL, 0x5555);
 284
 285         orion5x_gpio_set_valid_pins(0x000000fb);
 286
 287         /*
 288          * Configure peripherals.
 289          */
 290         orion5x_ehci0_init();
 291         orion5x_ehci1_init();
 292         orion5x_eth_init(&rd88f5182_eth_data);
 293         orion5x_i2c_init();
 294         orion5x_sata_init(&rd88f5182_sata_data);
 295         orion5x_uart0_init();
 296
 297         orion5x_setup_dev_boot_win(RD88F5182_NOR_BOOT_BASE,
 298                                    RD88F5182_NOR_BOOT_SIZE);
 299
 300         orion5x_setup_dev1_win(RD88F5182_NOR_BASE, RD88F5182_NOR_SIZE);
 301         platform_device_register(&rd88f5182_nor_flash);
 302
 303         i2c_register_board_info(0, &rd88f5182_i2c_rtc, 1);
 304 }
 305
 306 MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design")
 307         /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */
 308         .phys_io        = ORION5X_REGS_PHYS_BASE,
 309         .io_pg_offst    = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
 310         .boot_params    = 0x00000100,
 311         .init_machine   = rd88f5182_init,
 312         .map_io         = orion5x_map_io,
 313         .init_irq       = orion5x_init_irq,
 314         .timer          = &orion5x_timer,
 315 MACHINE_END