dsa: add switch chip cascading support
[safe/jmp/linux-2.6] / arch / arm / mach-orion5x / common.c
1 /*
2  * arch/arm/mach-orion5x/common.c
3  *
4  * Core functions for Marvell Orion 5x SoCs
5  *
6  * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
7  *
8  * This file is licensed under the terms of the GNU General Public
9  * License version 2.  This program is licensed "as is" without any
10  * warranty of any kind, whether express or implied.
11  */
12
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/serial_8250.h>
17 #include <linux/mbus.h>
18 #include <linux/mv643xx_eth.h>
19 #include <linux/mv643xx_i2c.h>
20 #include <linux/ata_platform.h>
21 #include <linux/spi/orion_spi.h>
22 #include <net/dsa.h>
23 #include <asm/page.h>
24 #include <asm/setup.h>
25 #include <asm/timex.h>
26 #include <asm/mach/arch.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/time.h>
29 #include <mach/hardware.h>
30 #include <mach/orion5x.h>
31 #include <plat/ehci-orion.h>
32 #include <plat/mv_xor.h>
33 #include <plat/orion_nand.h>
34 #include <plat/time.h>
35 #include "common.h"
36
37 /*****************************************************************************
38  * I/O Address Mapping
39  ****************************************************************************/
40 static struct map_desc orion5x_io_desc[] __initdata = {
41         {
42                 .virtual        = ORION5X_REGS_VIRT_BASE,
43                 .pfn            = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
44                 .length         = ORION5X_REGS_SIZE,
45                 .type           = MT_DEVICE,
46         }, {
47                 .virtual        = ORION5X_PCIE_IO_VIRT_BASE,
48                 .pfn            = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
49                 .length         = ORION5X_PCIE_IO_SIZE,
50                 .type           = MT_DEVICE,
51         }, {
52                 .virtual        = ORION5X_PCI_IO_VIRT_BASE,
53                 .pfn            = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
54                 .length         = ORION5X_PCI_IO_SIZE,
55                 .type           = MT_DEVICE,
56         }, {
57                 .virtual        = ORION5X_PCIE_WA_VIRT_BASE,
58                 .pfn            = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
59                 .length         = ORION5X_PCIE_WA_SIZE,
60                 .type           = MT_DEVICE,
61         },
62 };
63
64 void __init orion5x_map_io(void)
65 {
66         iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
67 }
68
69
70 /*****************************************************************************
71  * EHCI
72  ****************************************************************************/
73 static struct orion_ehci_data orion5x_ehci_data = {
74         .dram           = &orion5x_mbus_dram_info,
75         .phy_version    = EHCI_PHY_ORION,
76 };
77
78 static u64 ehci_dmamask = 0xffffffffUL;
79
80
81 /*****************************************************************************
82  * EHCI0
83  ****************************************************************************/
84 static struct resource orion5x_ehci0_resources[] = {
85         {
86                 .start  = ORION5X_USB0_PHYS_BASE,
87                 .end    = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
88                 .flags  = IORESOURCE_MEM,
89         }, {
90                 .start  = IRQ_ORION5X_USB0_CTRL,
91                 .end    = IRQ_ORION5X_USB0_CTRL,
92                 .flags  = IORESOURCE_IRQ,
93         },
94 };
95
96 static struct platform_device orion5x_ehci0 = {
97         .name           = "orion-ehci",
98         .id             = 0,
99         .dev            = {
100                 .dma_mask               = &ehci_dmamask,
101                 .coherent_dma_mask      = 0xffffffff,
102                 .platform_data          = &orion5x_ehci_data,
103         },
104         .resource       = orion5x_ehci0_resources,
105         .num_resources  = ARRAY_SIZE(orion5x_ehci0_resources),
106 };
107
108 void __init orion5x_ehci0_init(void)
109 {
110         platform_device_register(&orion5x_ehci0);
111 }
112
113
114 /*****************************************************************************
115  * EHCI1
116  ****************************************************************************/
117 static struct resource orion5x_ehci1_resources[] = {
118         {
119                 .start  = ORION5X_USB1_PHYS_BASE,
120                 .end    = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
121                 .flags  = IORESOURCE_MEM,
122         }, {
123                 .start  = IRQ_ORION5X_USB1_CTRL,
124                 .end    = IRQ_ORION5X_USB1_CTRL,
125                 .flags  = IORESOURCE_IRQ,
126         },
127 };
128
129 static struct platform_device orion5x_ehci1 = {
130         .name           = "orion-ehci",
131         .id             = 1,
132         .dev            = {
133                 .dma_mask               = &ehci_dmamask,
134                 .coherent_dma_mask      = 0xffffffff,
135                 .platform_data          = &orion5x_ehci_data,
136         },
137         .resource       = orion5x_ehci1_resources,
138         .num_resources  = ARRAY_SIZE(orion5x_ehci1_resources),
139 };
140
141 void __init orion5x_ehci1_init(void)
142 {
143         platform_device_register(&orion5x_ehci1);
144 }
145
146
147 /*****************************************************************************
148  * GigE
149  ****************************************************************************/
150 struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
151         .dram           = &orion5x_mbus_dram_info,
152 };
153
154 static struct resource orion5x_eth_shared_resources[] = {
155         {
156                 .start  = ORION5X_ETH_PHYS_BASE + 0x2000,
157                 .end    = ORION5X_ETH_PHYS_BASE + 0x3fff,
158                 .flags  = IORESOURCE_MEM,
159         }, {
160                 .start  = IRQ_ORION5X_ETH_ERR,
161                 .end    = IRQ_ORION5X_ETH_ERR,
162                 .flags  = IORESOURCE_IRQ,
163         },
164 };
165
166 static struct platform_device orion5x_eth_shared = {
167         .name           = MV643XX_ETH_SHARED_NAME,
168         .id             = 0,
169         .dev            = {
170                 .platform_data  = &orion5x_eth_shared_data,
171         },
172         .num_resources  = ARRAY_SIZE(orion5x_eth_shared_resources),
173         .resource       = orion5x_eth_shared_resources,
174 };
175
176 static struct resource orion5x_eth_resources[] = {
177         {
178                 .name   = "eth irq",
179                 .start  = IRQ_ORION5X_ETH_SUM,
180                 .end    = IRQ_ORION5X_ETH_SUM,
181                 .flags  = IORESOURCE_IRQ,
182         },
183 };
184
185 static struct platform_device orion5x_eth = {
186         .name           = MV643XX_ETH_NAME,
187         .id             = 0,
188         .num_resources  = 1,
189         .resource       = orion5x_eth_resources,
190 };
191
192 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
193 {
194         eth_data->shared = &orion5x_eth_shared;
195         orion5x_eth.dev.platform_data = eth_data;
196
197         platform_device_register(&orion5x_eth_shared);
198         platform_device_register(&orion5x_eth);
199 }
200
201
202 /*****************************************************************************
203  * Ethernet switch
204  ****************************************************************************/
205 static struct resource orion5x_switch_resources[] = {
206         {
207                 .start  = 0,
208                 .end    = 0,
209                 .flags  = IORESOURCE_IRQ,
210         },
211 };
212
213 static struct platform_device orion5x_switch_device = {
214         .name           = "dsa",
215         .id             = 0,
216         .num_resources  = 0,
217         .resource       = orion5x_switch_resources,
218 };
219
220 void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
221 {
222         int i;
223
224         if (irq != NO_IRQ) {
225                 orion5x_switch_resources[0].start = irq;
226                 orion5x_switch_resources[0].end = irq;
227                 orion5x_switch_device.num_resources = 1;
228         }
229
230         d->netdev = &orion5x_eth.dev;
231         for (i = 0; i < d->nr_chips; i++)
232                 d->chip[i].mii_bus = &orion5x_eth_shared.dev;
233         orion5x_switch_device.dev.platform_data = d;
234
235         platform_device_register(&orion5x_switch_device);
236 }
237
238
239 /*****************************************************************************
240  * I2C
241  ****************************************************************************/
242 static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
243         .freq_m         = 8, /* assumes 166 MHz TCLK */
244         .freq_n         = 3,
245         .timeout        = 1000, /* Default timeout of 1 second */
246 };
247
248 static struct resource orion5x_i2c_resources[] = {
249         {
250                 .name   = "i2c base",
251                 .start  = I2C_PHYS_BASE,
252                 .end    = I2C_PHYS_BASE + 0x1f,
253                 .flags  = IORESOURCE_MEM,
254         }, {
255                 .name   = "i2c irq",
256                 .start  = IRQ_ORION5X_I2C,
257                 .end    = IRQ_ORION5X_I2C,
258                 .flags  = IORESOURCE_IRQ,
259         },
260 };
261
262 static struct platform_device orion5x_i2c = {
263         .name           = MV64XXX_I2C_CTLR_NAME,
264         .id             = 0,
265         .num_resources  = ARRAY_SIZE(orion5x_i2c_resources),
266         .resource       = orion5x_i2c_resources,
267         .dev            = {
268                 .platform_data  = &orion5x_i2c_pdata,
269         },
270 };
271
272 void __init orion5x_i2c_init(void)
273 {
274         platform_device_register(&orion5x_i2c);
275 }
276
277
278 /*****************************************************************************
279  * SATA
280  ****************************************************************************/
281 static struct resource orion5x_sata_resources[] = {
282         {
283                 .name   = "sata base",
284                 .start  = ORION5X_SATA_PHYS_BASE,
285                 .end    = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
286                 .flags  = IORESOURCE_MEM,
287         }, {
288                 .name   = "sata irq",
289                 .start  = IRQ_ORION5X_SATA,
290                 .end    = IRQ_ORION5X_SATA,
291                 .flags  = IORESOURCE_IRQ,
292         },
293 };
294
295 static struct platform_device orion5x_sata = {
296         .name           = "sata_mv",
297         .id             = 0,
298         .dev            = {
299                 .coherent_dma_mask      = 0xffffffff,
300         },
301         .num_resources  = ARRAY_SIZE(orion5x_sata_resources),
302         .resource       = orion5x_sata_resources,
303 };
304
305 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
306 {
307         sata_data->dram = &orion5x_mbus_dram_info;
308         orion5x_sata.dev.platform_data = sata_data;
309         platform_device_register(&orion5x_sata);
310 }
311
312
313 /*****************************************************************************
314  * SPI
315  ****************************************************************************/
316 static struct orion_spi_info orion5x_spi_plat_data = {
317         .tclk                   = 0,
318         .enable_clock_fix       = 1,
319 };
320
321 static struct resource orion5x_spi_resources[] = {
322         {
323                 .name   = "spi base",
324                 .start  = SPI_PHYS_BASE,
325                 .end    = SPI_PHYS_BASE + 0x1f,
326                 .flags  = IORESOURCE_MEM,
327         },
328 };
329
330 static struct platform_device orion5x_spi = {
331         .name           = "orion_spi",
332         .id             = 0,
333         .dev            = {
334                 .platform_data  = &orion5x_spi_plat_data,
335         },
336         .num_resources  = ARRAY_SIZE(orion5x_spi_resources),
337         .resource       = orion5x_spi_resources,
338 };
339
340 void __init orion5x_spi_init()
341 {
342         platform_device_register(&orion5x_spi);
343 }
344
345
346 /*****************************************************************************
347  * UART0
348  ****************************************************************************/
349 static struct plat_serial8250_port orion5x_uart0_data[] = {
350         {
351                 .mapbase        = UART0_PHYS_BASE,
352                 .membase        = (char *)UART0_VIRT_BASE,
353                 .irq            = IRQ_ORION5X_UART0,
354                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
355                 .iotype         = UPIO_MEM,
356                 .regshift       = 2,
357                 .uartclk        = 0,
358         }, {
359         },
360 };
361
362 static struct resource orion5x_uart0_resources[] = {
363         {
364                 .start          = UART0_PHYS_BASE,
365                 .end            = UART0_PHYS_BASE + 0xff,
366                 .flags          = IORESOURCE_MEM,
367         }, {
368                 .start          = IRQ_ORION5X_UART0,
369                 .end            = IRQ_ORION5X_UART0,
370                 .flags          = IORESOURCE_IRQ,
371         },
372 };
373
374 static struct platform_device orion5x_uart0 = {
375         .name                   = "serial8250",
376         .id                     = PLAT8250_DEV_PLATFORM,
377         .dev                    = {
378                 .platform_data  = orion5x_uart0_data,
379         },
380         .resource               = orion5x_uart0_resources,
381         .num_resources          = ARRAY_SIZE(orion5x_uart0_resources),
382 };
383
384 void __init orion5x_uart0_init(void)
385 {
386         platform_device_register(&orion5x_uart0);
387 }
388
389
390 /*****************************************************************************
391  * UART1
392  ****************************************************************************/
393 static struct plat_serial8250_port orion5x_uart1_data[] = {
394         {
395                 .mapbase        = UART1_PHYS_BASE,
396                 .membase        = (char *)UART1_VIRT_BASE,
397                 .irq            = IRQ_ORION5X_UART1,
398                 .flags          = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
399                 .iotype         = UPIO_MEM,
400                 .regshift       = 2,
401                 .uartclk        = 0,
402         }, {
403         },
404 };
405
406 static struct resource orion5x_uart1_resources[] = {
407         {
408                 .start          = UART1_PHYS_BASE,
409                 .end            = UART1_PHYS_BASE + 0xff,
410                 .flags          = IORESOURCE_MEM,
411         }, {
412                 .start          = IRQ_ORION5X_UART1,
413                 .end            = IRQ_ORION5X_UART1,
414                 .flags          = IORESOURCE_IRQ,
415         },
416 };
417
418 static struct platform_device orion5x_uart1 = {
419         .name                   = "serial8250",
420         .id                     = PLAT8250_DEV_PLATFORM1,
421         .dev                    = {
422                 .platform_data  = orion5x_uart1_data,
423         },
424         .resource               = orion5x_uart1_resources,
425         .num_resources          = ARRAY_SIZE(orion5x_uart1_resources),
426 };
427
428 void __init orion5x_uart1_init(void)
429 {
430         platform_device_register(&orion5x_uart1);
431 }
432
433
434 /*****************************************************************************
435  * XOR engine
436  ****************************************************************************/
437 static struct resource orion5x_xor_shared_resources[] = {
438         {
439                 .name   = "xor low",
440                 .start  = ORION5X_XOR_PHYS_BASE,
441                 .end    = ORION5X_XOR_PHYS_BASE + 0xff,
442                 .flags  = IORESOURCE_MEM,
443         }, {
444                 .name   = "xor high",
445                 .start  = ORION5X_XOR_PHYS_BASE + 0x200,
446                 .end    = ORION5X_XOR_PHYS_BASE + 0x2ff,
447                 .flags  = IORESOURCE_MEM,
448         },
449 };
450
451 static struct platform_device orion5x_xor_shared = {
452         .name           = MV_XOR_SHARED_NAME,
453         .id             = 0,
454         .num_resources  = ARRAY_SIZE(orion5x_xor_shared_resources),
455         .resource       = orion5x_xor_shared_resources,
456 };
457
458 static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
459
460 static struct resource orion5x_xor0_resources[] = {
461         [0] = {
462                 .start  = IRQ_ORION5X_XOR0,
463                 .end    = IRQ_ORION5X_XOR0,
464                 .flags  = IORESOURCE_IRQ,
465         },
466 };
467
468 static struct mv_xor_platform_data orion5x_xor0_data = {
469         .shared         = &orion5x_xor_shared,
470         .hw_id          = 0,
471         .pool_size      = PAGE_SIZE,
472 };
473
474 static struct platform_device orion5x_xor0_channel = {
475         .name           = MV_XOR_NAME,
476         .id             = 0,
477         .num_resources  = ARRAY_SIZE(orion5x_xor0_resources),
478         .resource       = orion5x_xor0_resources,
479         .dev            = {
480                 .dma_mask               = &orion5x_xor_dmamask,
481                 .coherent_dma_mask      = DMA_64BIT_MASK,
482                 .platform_data          = (void *)&orion5x_xor0_data,
483         },
484 };
485
486 static struct resource orion5x_xor1_resources[] = {
487         [0] = {
488                 .start  = IRQ_ORION5X_XOR1,
489                 .end    = IRQ_ORION5X_XOR1,
490                 .flags  = IORESOURCE_IRQ,
491         },
492 };
493
494 static struct mv_xor_platform_data orion5x_xor1_data = {
495         .shared         = &orion5x_xor_shared,
496         .hw_id          = 1,
497         .pool_size      = PAGE_SIZE,
498 };
499
500 static struct platform_device orion5x_xor1_channel = {
501         .name           = MV_XOR_NAME,
502         .id             = 1,
503         .num_resources  = ARRAY_SIZE(orion5x_xor1_resources),
504         .resource       = orion5x_xor1_resources,
505         .dev            = {
506                 .dma_mask               = &orion5x_xor_dmamask,
507                 .coherent_dma_mask      = DMA_64BIT_MASK,
508                 .platform_data          = (void *)&orion5x_xor1_data,
509         },
510 };
511
512 void __init orion5x_xor_init(void)
513 {
514         platform_device_register(&orion5x_xor_shared);
515
516         /*
517          * two engines can't do memset simultaneously, this limitation
518          * satisfied by removing memset support from one of the engines.
519          */
520         dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
521         dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
522         platform_device_register(&orion5x_xor0_channel);
523
524         dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
525         dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
526         dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
527         platform_device_register(&orion5x_xor1_channel);
528 }
529
530
531 /*****************************************************************************
532  * Time handling
533  ****************************************************************************/
534 int orion5x_tclk;
535
536 int __init orion5x_find_tclk(void)
537 {
538         u32 dev, rev;
539
540         orion5x_pcie_id(&dev, &rev);
541         if (dev == MV88F6183_DEV_ID &&
542             (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
543                 return 133333333;
544
545         return 166666667;
546 }
547
548 static void orion5x_timer_init(void)
549 {
550         orion5x_tclk = orion5x_find_tclk();
551         orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
552 }
553
554 struct sys_timer orion5x_timer = {
555         .init = orion5x_timer_init,
556 };
557
558
559 /*****************************************************************************
560  * General
561  ****************************************************************************/
562 /*
563  * Identify device ID and rev from PCIe configuration header space '0'.
564  */
565 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
566 {
567         orion5x_pcie_id(dev, rev);
568
569         if (*dev == MV88F5281_DEV_ID) {
570                 if (*rev == MV88F5281_REV_D2) {
571                         *dev_name = "MV88F5281-D2";
572                 } else if (*rev == MV88F5281_REV_D1) {
573                         *dev_name = "MV88F5281-D1";
574                 } else if (*rev == MV88F5281_REV_D0) {
575                         *dev_name = "MV88F5281-D0";
576                 } else {
577                         *dev_name = "MV88F5281-Rev-Unsupported";
578                 }
579         } else if (*dev == MV88F5182_DEV_ID) {
580                 if (*rev == MV88F5182_REV_A2) {
581                         *dev_name = "MV88F5182-A2";
582                 } else {
583                         *dev_name = "MV88F5182-Rev-Unsupported";
584                 }
585         } else if (*dev == MV88F5181_DEV_ID) {
586                 if (*rev == MV88F5181_REV_B1) {
587                         *dev_name = "MV88F5181-Rev-B1";
588                 } else if (*rev == MV88F5181L_REV_A1) {
589                         *dev_name = "MV88F5181L-Rev-A1";
590                 } else {
591                         *dev_name = "MV88F5181(L)-Rev-Unsupported";
592                 }
593         } else if (*dev == MV88F6183_DEV_ID) {
594                 if (*rev == MV88F6183_REV_B0) {
595                         *dev_name = "MV88F6183-Rev-B0";
596                 } else {
597                         *dev_name = "MV88F6183-Rev-Unsupported";
598                 }
599         } else {
600                 *dev_name = "Device-Unknown";
601         }
602 }
603
604 void __init orion5x_init(void)
605 {
606         char *dev_name;
607         u32 dev, rev;
608
609         orion5x_id(&dev, &rev, &dev_name);
610         printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
611
612         orion5x_eth_shared_data.t_clk = orion5x_tclk;
613         orion5x_spi_plat_data.tclk = orion5x_tclk;
614         orion5x_uart0_data[0].uartclk = orion5x_tclk;
615         orion5x_uart1_data[0].uartclk = orion5x_tclk;
616
617         /*
618          * Setup Orion address map
619          */
620         orion5x_setup_cpu_mbus_bridge();
621
622         /*
623          * Don't issue "Wait for Interrupt" instruction if we are
624          * running on D0 5281 silicon.
625          */
626         if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
627                 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
628                 disable_hlt();
629         }
630 }
631
632 /*
633  * Many orion-based systems have buggy bootloader implementations.
634  * This is a common fixup for bogus memory tags.
635  */
636 void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
637                             char **from, struct meminfo *meminfo)
638 {
639         for (; t->hdr.size; t = tag_next(t))
640                 if (t->hdr.tag == ATAG_MEM &&
641                     (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
642                      t->u.mem.start & ~PAGE_MASK)) {
643                         printk(KERN_WARNING
644                                "Clearing invalid memory bank %dKB@0x%08x\n",
645                                t->u.mem.size / 1024, t->u.mem.start);
646                         t->hdr.tag = 0;
647                 }
648 }