2 * arch/arm/mach-orion5x/common.c
4 * Core functions for Marvell Orion 5x SoCs
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/serial_8250.h>
17 #include <linux/mbus.h>
18 #include <linux/mv643xx_eth.h>
19 #include <linux/mv643xx_i2c.h>
20 #include <linux/ata_platform.h>
21 #include <linux/spi/orion_spi.h>
24 #include <asm/setup.h>
25 #include <asm/timex.h>
26 #include <asm/mach/arch.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/time.h>
29 #include <mach/hardware.h>
30 #include <mach/orion5x.h>
31 #include <plat/ehci-orion.h>
32 #include <plat/mv_xor.h>
33 #include <plat/orion_nand.h>
34 #include <plat/orion5x_wdt.h>
35 #include <plat/time.h>
38 /*****************************************************************************
40 ****************************************************************************/
41 static struct map_desc orion5x_io_desc[] __initdata = {
43 .virtual = ORION5X_REGS_VIRT_BASE,
44 .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
45 .length = ORION5X_REGS_SIZE,
48 .virtual = ORION5X_PCIE_IO_VIRT_BASE,
49 .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
50 .length = ORION5X_PCIE_IO_SIZE,
53 .virtual = ORION5X_PCI_IO_VIRT_BASE,
54 .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
55 .length = ORION5X_PCI_IO_SIZE,
58 .virtual = ORION5X_PCIE_WA_VIRT_BASE,
59 .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
60 .length = ORION5X_PCIE_WA_SIZE,
65 void __init orion5x_map_io(void)
67 iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
71 /*****************************************************************************
73 ****************************************************************************/
74 static struct orion_ehci_data orion5x_ehci_data = {
75 .dram = &orion5x_mbus_dram_info,
76 .phy_version = EHCI_PHY_ORION,
79 static u64 ehci_dmamask = 0xffffffffUL;
82 /*****************************************************************************
84 ****************************************************************************/
85 static struct resource orion5x_ehci0_resources[] = {
87 .start = ORION5X_USB0_PHYS_BASE,
88 .end = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
89 .flags = IORESOURCE_MEM,
91 .start = IRQ_ORION5X_USB0_CTRL,
92 .end = IRQ_ORION5X_USB0_CTRL,
93 .flags = IORESOURCE_IRQ,
97 static struct platform_device orion5x_ehci0 = {
101 .dma_mask = &ehci_dmamask,
102 .coherent_dma_mask = 0xffffffff,
103 .platform_data = &orion5x_ehci_data,
105 .resource = orion5x_ehci0_resources,
106 .num_resources = ARRAY_SIZE(orion5x_ehci0_resources),
109 void __init orion5x_ehci0_init(void)
111 platform_device_register(&orion5x_ehci0);
115 /*****************************************************************************
117 ****************************************************************************/
118 static struct resource orion5x_ehci1_resources[] = {
120 .start = ORION5X_USB1_PHYS_BASE,
121 .end = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
122 .flags = IORESOURCE_MEM,
124 .start = IRQ_ORION5X_USB1_CTRL,
125 .end = IRQ_ORION5X_USB1_CTRL,
126 .flags = IORESOURCE_IRQ,
130 static struct platform_device orion5x_ehci1 = {
131 .name = "orion-ehci",
134 .dma_mask = &ehci_dmamask,
135 .coherent_dma_mask = 0xffffffff,
136 .platform_data = &orion5x_ehci_data,
138 .resource = orion5x_ehci1_resources,
139 .num_resources = ARRAY_SIZE(orion5x_ehci1_resources),
142 void __init orion5x_ehci1_init(void)
144 platform_device_register(&orion5x_ehci1);
148 /*****************************************************************************
150 ****************************************************************************/
151 struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
152 .dram = &orion5x_mbus_dram_info,
155 static struct resource orion5x_eth_shared_resources[] = {
157 .start = ORION5X_ETH_PHYS_BASE + 0x2000,
158 .end = ORION5X_ETH_PHYS_BASE + 0x3fff,
159 .flags = IORESOURCE_MEM,
161 .start = IRQ_ORION5X_ETH_ERR,
162 .end = IRQ_ORION5X_ETH_ERR,
163 .flags = IORESOURCE_IRQ,
167 static struct platform_device orion5x_eth_shared = {
168 .name = MV643XX_ETH_SHARED_NAME,
171 .platform_data = &orion5x_eth_shared_data,
173 .num_resources = ARRAY_SIZE(orion5x_eth_shared_resources),
174 .resource = orion5x_eth_shared_resources,
177 static struct resource orion5x_eth_resources[] = {
180 .start = IRQ_ORION5X_ETH_SUM,
181 .end = IRQ_ORION5X_ETH_SUM,
182 .flags = IORESOURCE_IRQ,
186 static struct platform_device orion5x_eth = {
187 .name = MV643XX_ETH_NAME,
190 .resource = orion5x_eth_resources,
193 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
195 eth_data->shared = &orion5x_eth_shared;
196 orion5x_eth.dev.platform_data = eth_data;
198 platform_device_register(&orion5x_eth_shared);
199 platform_device_register(&orion5x_eth);
203 /*****************************************************************************
205 ****************************************************************************/
206 static struct resource orion5x_switch_resources[] = {
210 .flags = IORESOURCE_IRQ,
214 static struct platform_device orion5x_switch_device = {
218 .resource = orion5x_switch_resources,
221 void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
224 orion5x_switch_resources[0].start = irq;
225 orion5x_switch_resources[0].end = irq;
226 orion5x_switch_device.num_resources = 1;
229 d->mii_bus = &orion5x_eth_shared.dev;
230 d->netdev = &orion5x_eth.dev;
231 orion5x_switch_device.dev.platform_data = d;
233 platform_device_register(&orion5x_switch_device);
237 /*****************************************************************************
239 ****************************************************************************/
240 static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
241 .freq_m = 8, /* assumes 166 MHz TCLK */
243 .timeout = 1000, /* Default timeout of 1 second */
246 static struct resource orion5x_i2c_resources[] = {
249 .start = I2C_PHYS_BASE,
250 .end = I2C_PHYS_BASE + 0x1f,
251 .flags = IORESOURCE_MEM,
254 .start = IRQ_ORION5X_I2C,
255 .end = IRQ_ORION5X_I2C,
256 .flags = IORESOURCE_IRQ,
260 static struct platform_device orion5x_i2c = {
261 .name = MV64XXX_I2C_CTLR_NAME,
263 .num_resources = ARRAY_SIZE(orion5x_i2c_resources),
264 .resource = orion5x_i2c_resources,
266 .platform_data = &orion5x_i2c_pdata,
270 void __init orion5x_i2c_init(void)
272 platform_device_register(&orion5x_i2c);
276 /*****************************************************************************
278 ****************************************************************************/
279 static struct resource orion5x_sata_resources[] = {
282 .start = ORION5X_SATA_PHYS_BASE,
283 .end = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
284 .flags = IORESOURCE_MEM,
287 .start = IRQ_ORION5X_SATA,
288 .end = IRQ_ORION5X_SATA,
289 .flags = IORESOURCE_IRQ,
293 static struct platform_device orion5x_sata = {
297 .coherent_dma_mask = 0xffffffff,
299 .num_resources = ARRAY_SIZE(orion5x_sata_resources),
300 .resource = orion5x_sata_resources,
303 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
305 sata_data->dram = &orion5x_mbus_dram_info;
306 orion5x_sata.dev.platform_data = sata_data;
307 platform_device_register(&orion5x_sata);
311 /*****************************************************************************
313 ****************************************************************************/
314 static struct orion_spi_info orion5x_spi_plat_data = {
316 .enable_clock_fix = 1,
319 static struct resource orion5x_spi_resources[] = {
322 .start = SPI_PHYS_BASE,
323 .end = SPI_PHYS_BASE + 0x1f,
324 .flags = IORESOURCE_MEM,
328 static struct platform_device orion5x_spi = {
332 .platform_data = &orion5x_spi_plat_data,
334 .num_resources = ARRAY_SIZE(orion5x_spi_resources),
335 .resource = orion5x_spi_resources,
338 void __init orion5x_spi_init()
340 platform_device_register(&orion5x_spi);
344 /*****************************************************************************
346 ****************************************************************************/
347 static struct plat_serial8250_port orion5x_uart0_data[] = {
349 .mapbase = UART0_PHYS_BASE,
350 .membase = (char *)UART0_VIRT_BASE,
351 .irq = IRQ_ORION5X_UART0,
352 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
360 static struct resource orion5x_uart0_resources[] = {
362 .start = UART0_PHYS_BASE,
363 .end = UART0_PHYS_BASE + 0xff,
364 .flags = IORESOURCE_MEM,
366 .start = IRQ_ORION5X_UART0,
367 .end = IRQ_ORION5X_UART0,
368 .flags = IORESOURCE_IRQ,
372 static struct platform_device orion5x_uart0 = {
373 .name = "serial8250",
374 .id = PLAT8250_DEV_PLATFORM,
376 .platform_data = orion5x_uart0_data,
378 .resource = orion5x_uart0_resources,
379 .num_resources = ARRAY_SIZE(orion5x_uart0_resources),
382 void __init orion5x_uart0_init(void)
384 platform_device_register(&orion5x_uart0);
388 /*****************************************************************************
390 ****************************************************************************/
391 static struct plat_serial8250_port orion5x_uart1_data[] = {
393 .mapbase = UART1_PHYS_BASE,
394 .membase = (char *)UART1_VIRT_BASE,
395 .irq = IRQ_ORION5X_UART1,
396 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
404 static struct resource orion5x_uart1_resources[] = {
406 .start = UART1_PHYS_BASE,
407 .end = UART1_PHYS_BASE + 0xff,
408 .flags = IORESOURCE_MEM,
410 .start = IRQ_ORION5X_UART1,
411 .end = IRQ_ORION5X_UART1,
412 .flags = IORESOURCE_IRQ,
416 static struct platform_device orion5x_uart1 = {
417 .name = "serial8250",
418 .id = PLAT8250_DEV_PLATFORM1,
420 .platform_data = orion5x_uart1_data,
422 .resource = orion5x_uart1_resources,
423 .num_resources = ARRAY_SIZE(orion5x_uart1_resources),
426 void __init orion5x_uart1_init(void)
428 platform_device_register(&orion5x_uart1);
432 /*****************************************************************************
434 ****************************************************************************/
435 struct mv_xor_platform_shared_data orion5x_xor_shared_data = {
436 .dram = &orion5x_mbus_dram_info,
439 static struct resource orion5x_xor_shared_resources[] = {
442 .start = ORION5X_XOR_PHYS_BASE,
443 .end = ORION5X_XOR_PHYS_BASE + 0xff,
444 .flags = IORESOURCE_MEM,
447 .start = ORION5X_XOR_PHYS_BASE + 0x200,
448 .end = ORION5X_XOR_PHYS_BASE + 0x2ff,
449 .flags = IORESOURCE_MEM,
453 static struct platform_device orion5x_xor_shared = {
454 .name = MV_XOR_SHARED_NAME,
457 .platform_data = &orion5x_xor_shared_data,
459 .num_resources = ARRAY_SIZE(orion5x_xor_shared_resources),
460 .resource = orion5x_xor_shared_resources,
463 static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
465 static struct resource orion5x_xor0_resources[] = {
467 .start = IRQ_ORION5X_XOR0,
468 .end = IRQ_ORION5X_XOR0,
469 .flags = IORESOURCE_IRQ,
473 static struct mv_xor_platform_data orion5x_xor0_data = {
474 .shared = &orion5x_xor_shared,
476 .pool_size = PAGE_SIZE,
479 static struct platform_device orion5x_xor0_channel = {
482 .num_resources = ARRAY_SIZE(orion5x_xor0_resources),
483 .resource = orion5x_xor0_resources,
485 .dma_mask = &orion5x_xor_dmamask,
486 .coherent_dma_mask = DMA_64BIT_MASK,
487 .platform_data = (void *)&orion5x_xor0_data,
491 static struct resource orion5x_xor1_resources[] = {
493 .start = IRQ_ORION5X_XOR1,
494 .end = IRQ_ORION5X_XOR1,
495 .flags = IORESOURCE_IRQ,
499 static struct mv_xor_platform_data orion5x_xor1_data = {
500 .shared = &orion5x_xor_shared,
502 .pool_size = PAGE_SIZE,
505 static struct platform_device orion5x_xor1_channel = {
508 .num_resources = ARRAY_SIZE(orion5x_xor1_resources),
509 .resource = orion5x_xor1_resources,
511 .dma_mask = &orion5x_xor_dmamask,
512 .coherent_dma_mask = DMA_64BIT_MASK,
513 .platform_data = (void *)&orion5x_xor1_data,
517 void __init orion5x_xor_init(void)
519 platform_device_register(&orion5x_xor_shared);
522 * two engines can't do memset simultaneously, this limitation
523 * satisfied by removing memset support from one of the engines.
525 dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
526 dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
527 platform_device_register(&orion5x_xor0_channel);
529 dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
530 dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
531 dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
532 platform_device_register(&orion5x_xor1_channel);
536 /*****************************************************************************
538 ****************************************************************************/
539 static struct orion5x_wdt_platform_data orion5x_wdt_data = {
543 static struct platform_device orion5x_wdt_device = {
544 .name = "orion5x_wdt",
547 .platform_data = &orion5x_wdt_data,
552 void __init orion5x_wdt_init(void)
554 orion5x_wdt_data.tclk = orion5x_tclk;
555 platform_device_register(&orion5x_wdt_device);
559 /*****************************************************************************
561 ****************************************************************************/
564 int __init orion5x_find_tclk(void)
568 orion5x_pcie_id(&dev, &rev);
569 if (dev == MV88F6183_DEV_ID &&
570 (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
576 static void orion5x_timer_init(void)
578 orion5x_tclk = orion5x_find_tclk();
579 orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
582 struct sys_timer orion5x_timer = {
583 .init = orion5x_timer_init,
587 /*****************************************************************************
589 ****************************************************************************/
591 * Identify device ID and rev from PCIe configuration header space '0'.
593 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
595 orion5x_pcie_id(dev, rev);
597 if (*dev == MV88F5281_DEV_ID) {
598 if (*rev == MV88F5281_REV_D2) {
599 *dev_name = "MV88F5281-D2";
600 } else if (*rev == MV88F5281_REV_D1) {
601 *dev_name = "MV88F5281-D1";
602 } else if (*rev == MV88F5281_REV_D0) {
603 *dev_name = "MV88F5281-D0";
605 *dev_name = "MV88F5281-Rev-Unsupported";
607 } else if (*dev == MV88F5182_DEV_ID) {
608 if (*rev == MV88F5182_REV_A2) {
609 *dev_name = "MV88F5182-A2";
611 *dev_name = "MV88F5182-Rev-Unsupported";
613 } else if (*dev == MV88F5181_DEV_ID) {
614 if (*rev == MV88F5181_REV_B1) {
615 *dev_name = "MV88F5181-Rev-B1";
616 } else if (*rev == MV88F5181L_REV_A1) {
617 *dev_name = "MV88F5181L-Rev-A1";
619 *dev_name = "MV88F5181(L)-Rev-Unsupported";
621 } else if (*dev == MV88F6183_DEV_ID) {
622 if (*rev == MV88F6183_REV_B0) {
623 *dev_name = "MV88F6183-Rev-B0";
625 *dev_name = "MV88F6183-Rev-Unsupported";
628 *dev_name = "Device-Unknown";
632 void __init orion5x_init(void)
637 orion5x_id(&dev, &rev, &dev_name);
638 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
640 orion5x_eth_shared_data.t_clk = orion5x_tclk;
641 orion5x_spi_plat_data.tclk = orion5x_tclk;
642 orion5x_uart0_data[0].uartclk = orion5x_tclk;
643 orion5x_uart1_data[0].uartclk = orion5x_tclk;
646 * Setup Orion address map
648 orion5x_setup_cpu_mbus_bridge();
651 * Don't issue "Wait for Interrupt" instruction if we are
652 * running on D0 5281 silicon.
654 if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
655 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
660 * Register watchdog driver
666 * Many orion-based systems have buggy bootloader implementations.
667 * This is a common fixup for bogus memory tags.
669 void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
670 char **from, struct meminfo *meminfo)
672 for (; t->hdr.size; t = tag_next(t))
673 if (t->hdr.tag == ATAG_MEM &&
674 (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
675 t->u.mem.start & ~PAGE_MASK)) {
677 "Clearing invalid memory bank %dKB@0x%08x\n",
678 t->u.mem.size / 1024, t->u.mem.start);