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   1 /*
   2  * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
   3  * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 51 Franklin Street, Fifth Floor,
  17  * Boston, MA  02110-1301, USA.
  18  */
  19
  20 #include <linux/dma-mapping.h>
  21 #include <linux/module.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/serial.h>
  24 #include <linux/gpio.h>
  25 #include <mach/hardware.h>
  26 #include <mach/irqs.h>
  27 #include <mach/common.h>
  28 #include <mach/imx-uart.h>
  29
  30 #include "devices.h"
  31
  32 static struct resource uart0[] = {
  33         {
  34                 .start = UART1_BASE_ADDR,
  35                 .end = UART1_BASE_ADDR + 0x0B5,
  36                 .flags = IORESOURCE_MEM,
  37         }, {
  38                 .start = MXC_INT_UART1,
  39                 .end = MXC_INT_UART1,
  40                 .flags = IORESOURCE_IRQ,
  41         },
  42 };
  43
  44 struct platform_device mxc_uart_device0 = {
  45         .name = "imx-uart",
  46         .id = 0,
  47         .resource = uart0,
  48         .num_resources = ARRAY_SIZE(uart0),
  49 };
  50
  51 static struct resource uart1[] = {
  52         {
  53                 .start = UART2_BASE_ADDR,
  54                 .end = UART2_BASE_ADDR + 0x0B5,
  55                 .flags = IORESOURCE_MEM,
  56         }, {
  57                 .start = MXC_INT_UART2,
  58                 .end = MXC_INT_UART2,
  59                 .flags = IORESOURCE_IRQ,
  60         },
  61 };
  62
  63 struct platform_device mxc_uart_device1 = {
  64         .name = "imx-uart",
  65         .id = 1,
  66         .resource = uart1,
  67         .num_resources = ARRAY_SIZE(uart1),
  68 };
  69
  70 static struct resource uart2[] = {
  71         {
  72                 .start = UART3_BASE_ADDR,
  73                 .end = UART3_BASE_ADDR + 0x0B5,
  74                 .flags = IORESOURCE_MEM,
  75         }, {
  76                 .start = MXC_INT_UART3,
  77                 .end = MXC_INT_UART3,
  78                 .flags = IORESOURCE_IRQ,
  79         },
  80 };
  81
  82 struct platform_device mxc_uart_device2 = {
  83         .name = "imx-uart",
  84         .id = 2,
  85         .resource = uart2,
  86         .num_resources = ARRAY_SIZE(uart2),
  87 };
  88
  89 #ifdef CONFIG_ARCH_MX31
  90 static struct resource uart3[] = {
  91         {
  92                 .start = UART4_BASE_ADDR,
  93                 .end = UART4_BASE_ADDR + 0x0B5,
  94                 .flags = IORESOURCE_MEM,
  95         }, {
  96                 .start = MXC_INT_UART4,
  97                 .end = MXC_INT_UART4,
  98                 .flags = IORESOURCE_IRQ,
  99         },
 100 };
 101
 102 struct platform_device mxc_uart_device3 = {
 103         .name = "imx-uart",
 104         .id = 3,
 105         .resource = uart3,
 106         .num_resources = ARRAY_SIZE(uart3),
 107 };
 108
 109 static struct resource uart4[] = {
 110         {
 111                 .start = UART5_BASE_ADDR,
 112                 .end = UART5_BASE_ADDR + 0x0B5,
 113                 .flags = IORESOURCE_MEM,
 114         }, {
 115                 .start = MXC_INT_UART5,
 116                 .end = MXC_INT_UART5,
 117                 .flags = IORESOURCE_IRQ,
 118         },
 119 };
 120
 121 struct platform_device mxc_uart_device4 = {
 122         .name = "imx-uart",
 123         .id = 4,
 124         .resource = uart4,
 125         .num_resources = ARRAY_SIZE(uart4),
 126 };
 127 #endif /* CONFIG_ARCH_MX31 */
 128
 129 /* GPIO port description */
 130 static struct mxc_gpio_port imx_gpio_ports[] = {
 131         [0] = {
 132                 .chip.label = "gpio-0",
 133                 .base = IO_ADDRESS(GPIO1_BASE_ADDR),
 134                 .irq = MXC_INT_GPIO1,
 135                 .virtual_irq_start = MXC_GPIO_IRQ_START,
 136         },
 137         [1] = {
 138                 .chip.label = "gpio-1",
 139                 .base = IO_ADDRESS(GPIO2_BASE_ADDR),
 140                 .irq = MXC_INT_GPIO2,
 141                 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
 142         },
 143         [2] = {
 144                 .chip.label = "gpio-2",
 145                 .base = IO_ADDRESS(GPIO3_BASE_ADDR),
 146                 .irq = MXC_INT_GPIO3,
 147                 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
 148         }
 149 };
 150
 151 int __init mxc_register_gpios(void)
 152 {
 153         return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
 154 }
 155
 156 static struct resource mxc_w1_master_resources[] = {
 157         {
 158                 .start = OWIRE_BASE_ADDR,
 159                 .end   = OWIRE_BASE_ADDR + SZ_4K - 1,
 160                 .flags = IORESOURCE_MEM,
 161         },
 162 };
 163
 164 struct platform_device mxc_w1_master_device = {
 165         .name = "mxc_w1",
 166         .id = 0,
 167         .num_resources = ARRAY_SIZE(mxc_w1_master_resources),
 168         .resource = mxc_w1_master_resources,
 169 };
 170
 171 static struct resource mxc_nand_resources[] = {
 172         {
 173                 .start  = 0, /* runtime dependent */
 174                 .end    = 0,
 175                 .flags  = IORESOURCE_MEM
 176         }, {
 177                 .start  = MXC_INT_NANDFC,
 178                 .end    = MXC_INT_NANDFC,
 179                 .flags  = IORESOURCE_IRQ
 180         },
 181 };
 182
 183 struct platform_device mxc_nand_device = {
 184         .name = "mxc_nand",
 185         .id = 0,
 186         .num_resources = ARRAY_SIZE(mxc_nand_resources),
 187         .resource = mxc_nand_resources,
 188 };
 189
 190 static struct resource mxc_i2c0_resources[] = {
 191         {
 192                 .start = I2C_BASE_ADDR,
 193                 .end = I2C_BASE_ADDR + SZ_4K - 1,
 194                 .flags = IORESOURCE_MEM,
 195         },
 196         {
 197                 .start = MXC_INT_I2C,
 198                 .end = MXC_INT_I2C,
 199                 .flags = IORESOURCE_IRQ,
 200         },
 201 };
 202
 203 struct platform_device mxc_i2c_device0 = {
 204         .name = "imx-i2c",
 205         .id = 0,
 206         .num_resources = ARRAY_SIZE(mxc_i2c0_resources),
 207         .resource = mxc_i2c0_resources,
 208 };
 209
 210 static struct resource mxc_i2c1_resources[] = {
 211         {
 212                 .start = I2C2_BASE_ADDR,
 213                 .end = I2C2_BASE_ADDR + SZ_4K - 1,
 214                 .flags = IORESOURCE_MEM,
 215         },
 216         {
 217                 .start = MXC_INT_I2C2,
 218                 .end = MXC_INT_I2C2,
 219                 .flags = IORESOURCE_IRQ,
 220         },
 221 };
 222
 223 struct platform_device mxc_i2c_device1 = {
 224         .name = "imx-i2c",
 225         .id = 1,
 226         .num_resources = ARRAY_SIZE(mxc_i2c1_resources),
 227         .resource = mxc_i2c1_resources,
 228 };
 229
 230 static struct resource mxc_i2c2_resources[] = {
 231         {
 232                 .start = I2C3_BASE_ADDR,
 233                 .end = I2C3_BASE_ADDR + SZ_4K - 1,
 234                 .flags = IORESOURCE_MEM,
 235         },
 236         {
 237                 .start = MXC_INT_I2C3,
 238                 .end = MXC_INT_I2C3,
 239                 .flags = IORESOURCE_IRQ,
 240         },
 241 };
 242
 243 struct platform_device mxc_i2c_device2 = {
 244         .name = "imx-i2c",
 245         .id = 2,
 246         .num_resources = ARRAY_SIZE(mxc_i2c2_resources),
 247         .resource = mxc_i2c2_resources,
 248 };
 249
 250 #ifdef CONFIG_ARCH_MX31
 251 static struct resource mxcsdhc0_resources[] = {
 252         {
 253                 .start = MMC_SDHC1_BASE_ADDR,
 254                 .end = MMC_SDHC1_BASE_ADDR + SZ_16K - 1,
 255                 .flags = IORESOURCE_MEM,
 256         }, {
 257                 .start = MXC_INT_MMC_SDHC1,
 258                 .end = MXC_INT_MMC_SDHC1,
 259                 .flags = IORESOURCE_IRQ,
 260         },
 261 };
 262
 263 static struct resource mxcsdhc1_resources[] = {
 264         {
 265                 .start = MMC_SDHC2_BASE_ADDR,
 266                 .end = MMC_SDHC2_BASE_ADDR + SZ_16K - 1,
 267                 .flags = IORESOURCE_MEM,
 268         }, {
 269                 .start = MXC_INT_MMC_SDHC2,
 270                 .end = MXC_INT_MMC_SDHC2,
 271                 .flags = IORESOURCE_IRQ,
 272         },
 273 };
 274
 275 struct platform_device mxcsdhc_device0 = {
 276         .name = "mxc-mmc",
 277         .id = 0,
 278         .num_resources = ARRAY_SIZE(mxcsdhc0_resources),
 279         .resource = mxcsdhc0_resources,
 280 };
 281
 282 struct platform_device mxcsdhc_device1 = {
 283         .name = "mxc-mmc",
 284         .id = 1,
 285         .num_resources = ARRAY_SIZE(mxcsdhc1_resources),
 286         .resource = mxcsdhc1_resources,
 287 };
 288
 289 static struct resource rnga_resources[] = {
 290         {
 291                 .start = RNGA_BASE_ADDR,
 292                 .end = RNGA_BASE_ADDR + 0x28,
 293                 .flags = IORESOURCE_MEM,
 294         },
 295 };
 296
 297 struct platform_device mxc_rnga_device = {
 298         .name = "mxc_rnga",
 299         .id = -1,
 300         .num_resources = 1,
 301         .resource = rnga_resources,
 302 };
 303 #endif /* CONFIG_ARCH_MX31 */
 304
 305 /* i.MX31 Image Processing Unit */
 306
 307 /* The resource order is important! */
 308 static struct resource mx3_ipu_rsrc[] = {
 309         {
 310                 .start = IPU_CTRL_BASE_ADDR,
 311                 .end = IPU_CTRL_BASE_ADDR + 0x5F,
 312                 .flags = IORESOURCE_MEM,
 313         }, {
 314                 .start = IPU_CTRL_BASE_ADDR + 0x88,
 315                 .end = IPU_CTRL_BASE_ADDR + 0xB3,
 316                 .flags = IORESOURCE_MEM,
 317         }, {
 318                 .start = MXC_INT_IPU_SYN,
 319                 .end = MXC_INT_IPU_SYN,
 320                 .flags = IORESOURCE_IRQ,
 321         }, {
 322                 .start = MXC_INT_IPU_ERR,
 323                 .end = MXC_INT_IPU_ERR,
 324                 .flags = IORESOURCE_IRQ,
 325         },
 326 };
 327
 328 struct platform_device mx3_ipu = {
 329         .name = "ipu-core",
 330         .id = -1,
 331         .num_resources = ARRAY_SIZE(mx3_ipu_rsrc),
 332         .resource = mx3_ipu_rsrc,
 333 };
 334
 335 static struct resource fb_resources[] = {
 336         {
 337                 .start  = IPU_CTRL_BASE_ADDR + 0xB4,
 338                 .end    = IPU_CTRL_BASE_ADDR + 0x1BF,
 339                 .flags  = IORESOURCE_MEM,
 340         },
 341 };
 342
 343 struct platform_device mx3_fb = {
 344         .name           = "mx3_sdc_fb",
 345         .id             = -1,
 346         .num_resources  = ARRAY_SIZE(fb_resources),
 347         .resource       = fb_resources,
 348         .dev            = {
 349                 .coherent_dma_mask = 0xffffffff,
 350        },
 351 };
 352
 353 static struct resource otg_resources[] = {
 354         {
 355                 .start  = OTG_BASE_ADDR,
 356                 .end    = OTG_BASE_ADDR + 0x1ff,
 357                 .flags  = IORESOURCE_MEM,
 358         }, {
 359                 .start  = MXC_INT_USB3,
 360                 .end    = MXC_INT_USB3,
 361                 .flags  = IORESOURCE_IRQ,
 362         },
 363 };
 364
 365 static u64 otg_dmamask = DMA_BIT_MASK(32);
 366
 367 /* OTG gadget device */
 368 struct platform_device mxc_otg_udc_device = {
 369         .name           = "fsl-usb2-udc",
 370         .id             = -1,
 371         .dev            = {
 372                 .dma_mask               = &otg_dmamask,
 373                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 374         },
 375         .resource       = otg_resources,
 376         .num_resources  = ARRAY_SIZE(otg_resources),
 377 };
 378
 379 #ifdef CONFIG_ARCH_MX35
 380 static struct resource mxc_fec_resources[] = {
 381         {
 382                 .start  = MXC_FEC_BASE_ADDR,
 383                 .end    = MXC_FEC_BASE_ADDR + 0xfff,
 384                 .flags  = IORESOURCE_MEM
 385         }, {
 386                 .start  = MXC_INT_FEC,
 387                 .end    = MXC_INT_FEC,
 388                 .flags  = IORESOURCE_IRQ
 389         },
 390 };
 391
 392 struct platform_device mxc_fec_device = {
 393         .name = "fec",
 394         .id = 0,
 395         .num_resources = ARRAY_SIZE(mxc_fec_resources),
 396         .resource = mxc_fec_resources,
 397 };
 398 #endif
 399
 400 static int mx3_devices_init(void)
 401 {
 402         if (cpu_is_mx31()) {
 403                 mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR;
 404                 mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff;
 405                 mxc_register_device(&mxc_rnga_device, NULL);
 406         }
 407         if (cpu_is_mx35()) {
 408                 mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR;
 409                 mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff;
 410         }
 411
 412         return 0;
 413 }
 414
 415 subsys_initcall(mx3_devices_init);