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   1 /*
   2  *  linux/arch/arm/mach-footbridge/common.c
   3  *
   4  *  Copyright (C) 1998-2000 Russell King, Dave Gilbert.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/module.h>
  11 #include <linux/types.h>
  12 #include <linux/mm.h>
  13 #include <linux/ioport.h>
  14 #include <linux/list.h>
  15 #include <linux/init.h>
  16 #include <linux/io.h>
  17 #include <linux/spinlock.h>
  18
  19 #include <asm/pgtable.h>
  20 #include <asm/page.h>
  21 #include <asm/irq.h>
  22 #include <asm/mach-types.h>
  23 #include <asm/setup.h>
  24 #include <asm/hardware/dec21285.h>
  25
  26 #include <asm/mach/irq.h>
  27 #include <asm/mach/map.h>
  28
  29 #include "common.h"
  30
  31 unsigned int mem_fclk_21285 = 50000000;
  32
  33 EXPORT_SYMBOL(mem_fclk_21285);
  34
  35 static int __init parse_tag_memclk(const struct tag *tag)
  36 {
  37         mem_fclk_21285 = tag->u.memclk.fmemclk;
  38         return 0;
  39 }
  40
  41 __tagtable(ATAG_MEMCLK, parse_tag_memclk);
  42
  43 /*
  44  * Footbridge IRQ translation table
  45  *  Converts from our IRQ numbers into FootBridge masks
  46  */
  47 static const int fb_irq_mask[] = {
  48         IRQ_MASK_UART_RX,       /*  0 */
  49         IRQ_MASK_UART_TX,       /*  1 */
  50         IRQ_MASK_TIMER1,        /*  2 */
  51         IRQ_MASK_TIMER2,        /*  3 */
  52         IRQ_MASK_TIMER3,        /*  4 */
  53         IRQ_MASK_IN0,           /*  5 */
  54         IRQ_MASK_IN1,           /*  6 */
  55         IRQ_MASK_IN2,           /*  7 */
  56         IRQ_MASK_IN3,           /*  8 */
  57         IRQ_MASK_DOORBELLHOST,  /*  9 */
  58         IRQ_MASK_DMA1,          /* 10 */
  59         IRQ_MASK_DMA2,          /* 11 */
  60         IRQ_MASK_PCI,           /* 12 */
  61         IRQ_MASK_SDRAMPARITY,   /* 13 */
  62         IRQ_MASK_I2OINPOST,     /* 14 */
  63         IRQ_MASK_PCI_ABORT,     /* 15 */
  64         IRQ_MASK_PCI_SERR,      /* 16 */
  65         IRQ_MASK_DISCARD_TIMER, /* 17 */
  66         IRQ_MASK_PCI_DPERR,     /* 18 */
  67         IRQ_MASK_PCI_PERR,      /* 19 */
  68 };
  69
  70 static void fb_mask_irq(unsigned int irq)
  71 {
  72         *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)];
  73 }
  74
  75 static void fb_unmask_irq(unsigned int irq)
  76 {
  77         *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)];
  78 }
  79
  80 static struct irq_chip fb_chip = {
  81         .ack    = fb_mask_irq,
  82         .mask   = fb_mask_irq,
  83         .unmask = fb_unmask_irq,
  84 };
  85
  86 static void __init __fb_init_irq(void)
  87 {
  88         unsigned int irq;
  89
  90         /*
  91          * setup DC21285 IRQs
  92          */
  93         *CSR_IRQ_DISABLE = -1;
  94         *CSR_FIQ_DISABLE = -1;
  95
  96         for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) {
  97                 set_irq_chip(irq, &fb_chip);
  98                 set_irq_handler(irq, handle_level_irq);
  99                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 100         }
 101 }
 102
 103 void __init footbridge_init_irq(void)
 104 {
 105         __fb_init_irq();
 106
 107         if (!footbridge_cfn_mode())
 108                 return;
 109
 110         if (machine_is_ebsa285())
 111                 /* The following is dependent on which slot
 112                  * you plug the Southbridge card into.  We
 113                  * currently assume that you plug it into
 114                  * the right-hand most slot.
 115                  */
 116                 isa_init_irq(IRQ_PCI);
 117
 118         if (machine_is_cats())
 119                 isa_init_irq(IRQ_IN2);
 120
 121         if (machine_is_netwinder())
 122                 isa_init_irq(IRQ_IN3);
 123 }
 124
 125 /*
 126  * Common mapping for all systems.  Note that the outbound write flush is
 127  * commented out since there is a "No Fix" problem with it.  Not mapping
 128  * it means that we have extra bullet protection on our feet.
 129  */
 130 static struct map_desc fb_common_io_desc[] __initdata = {
 131         {
 132                 .virtual        = ARMCSR_BASE,
 133                 .pfn            = __phys_to_pfn(DC21285_ARMCSR_BASE),
 134                 .length         = ARMCSR_SIZE,
 135                 .type           = MT_DEVICE,
 136         }, {
 137                 .virtual        = XBUS_BASE,
 138                 .pfn            = __phys_to_pfn(0x40000000),
 139                 .length         = XBUS_SIZE,
 140                 .type           = MT_DEVICE,
 141         }
 142 };
 143
 144 /*
 145  * The mapping when the footbridge is in host mode.  We don't map any of
 146  * this when we are in add-in mode.
 147  */
 148 static struct map_desc ebsa285_host_io_desc[] __initdata = {
 149 #if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST)
 150         {
 151                 .virtual        = PCIMEM_BASE,
 152                 .pfn            = __phys_to_pfn(DC21285_PCI_MEM),
 153                 .length         = PCIMEM_SIZE,
 154                 .type           = MT_DEVICE,
 155         }, {
 156                 .virtual        = PCICFG0_BASE,
 157                 .pfn            = __phys_to_pfn(DC21285_PCI_TYPE_0_CONFIG),
 158                 .length         = PCICFG0_SIZE,
 159                 .type           = MT_DEVICE,
 160         }, {
 161                 .virtual        = PCICFG1_BASE,
 162                 .pfn            = __phys_to_pfn(DC21285_PCI_TYPE_1_CONFIG),
 163                 .length         = PCICFG1_SIZE,
 164                 .type           = MT_DEVICE,
 165         }, {
 166                 .virtual        = PCIIACK_BASE,
 167                 .pfn            = __phys_to_pfn(DC21285_PCI_IACK),
 168                 .length         = PCIIACK_SIZE,
 169                 .type           = MT_DEVICE,
 170         }, {
 171                 .virtual        = PCIO_BASE,
 172                 .pfn            = __phys_to_pfn(DC21285_PCI_IO),
 173                 .length         = PCIO_SIZE,
 174                 .type           = MT_DEVICE,
 175         },
 176 #endif
 177 };
 178
 179 void __init footbridge_map_io(void)
 180 {
 181         /*
 182          * Set up the common mapping first; we need this to
 183          * determine whether we're in host mode or not.
 184          */
 185         iotable_init(fb_common_io_desc, ARRAY_SIZE(fb_common_io_desc));
 186
 187         /*
 188          * Now, work out what we've got to map in addition on this
 189          * platform.
 190          */
 191         if (footbridge_cfn_mode())
 192                 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
 193 }
 194
 195 #ifdef CONFIG_FOOTBRIDGE_ADDIN
 196
 197 /*
 198  * These two functions convert virtual addresses to PCI addresses and PCI
 199  * addresses to virtual addresses.  Note that it is only legal to use these
 200  * on memory obtained via get_zeroed_page or kmalloc.
 201  */
 202 unsigned long __virt_to_bus(unsigned long res)
 203 {
 204         WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
 205
 206         return (res - PAGE_OFFSET) + (*CSR_PCISDRAMBASE & 0xfffffff0);
 207 }
 208 EXPORT_SYMBOL(__virt_to_bus);
 209
 210 unsigned long __bus_to_virt(unsigned long res)
 211 {
 212         res -= (*CSR_PCISDRAMBASE & 0xfffffff0);
 213         res += PAGE_OFFSET;
 214
 215         WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory);
 216
 217         return res;
 218 }
 219 EXPORT_SYMBOL(__bus_to_virt);
 220
 221 #endif