1 <?xml version="1.0" encoding="UTF-8"?>
2 <!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
3 "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
5 <book id="libataDevGuide">
7 <title>libATA Developer's Guide</title>
11 <firstname>Jeff</firstname>
12 <surname>Garzik</surname>
17 <year>2003-2006</year>
18 <holder>Jeff Garzik</holder>
23 The contents of this file are subject to the Open
24 Software License version 1.1 that can be found at
25 <ulink url="http://www.opensource.org/licenses/osl-1.1.txt">http://www.opensource.org/licenses/osl-1.1.txt</ulink> and is included herein
30 Alternatively, the contents of this file may be used under the terms
31 of the GNU General Public License version 2 (the "GPL") as distributed
32 in the kernel source COPYING file, in which case the provisions of
33 the GPL are applicable instead of the above. If you wish to allow
34 the use of your version of this file only under the terms of the
35 GPL and not to allow others to use your version of this file under
36 the OSL, indicate your decision by deleting the provisions above and
37 replace them with the notice and other provisions required by the GPL.
38 If you do not delete the provisions above, a recipient may use your
39 version of this file under either the OSL or the GPL.
47 <chapter id="libataIntroduction">
48 <title>Introduction</title>
50 libATA is a library used inside the Linux kernel to support ATA host
51 controllers and devices. libATA provides an ATA driver API, class
52 transports for ATA and ATAPI devices, and SCSI<->ATA translation
53 for ATA devices according to the T10 SAT specification.
56 This Guide documents the libATA driver API, library functions, library
57 internals, and a couple sample ATA low-level drivers.
61 <chapter id="libataDriverApi">
62 <title>libata Driver API</title>
64 struct ata_port_operations is defined for every low-level libata
65 hardware driver, and it controls how the low-level driver
66 interfaces with the ATA and SCSI layers.
69 FIS-based drivers will hook into the system with ->qc_prep() and
70 ->qc_issue() high-level hooks. Hardware which behaves in a manner
71 similar to PCI IDE hardware may utilize several generic helpers,
72 defining at a bare minimum the bus I/O addresses of the ATA shadow
76 <title>struct ata_port_operations</title>
78 <sect2><title>Disable ATA port</title>
80 void (*port_disable) (struct ata_port *);
84 Called from ata_bus_probe() error path, as well as when
85 unregistering from the SCSI module (rmmod, hot unplug).
86 This function should do whatever needs to be done to take the
87 port out of use. In most cases, ata_port_disable() can be used
91 Called from ata_bus_probe() on a failed probe.
92 Called from ata_scsi_release().
97 <sect2><title>Post-IDENTIFY device configuration</title>
99 void (*dev_config) (struct ata_port *, struct ata_device *);
103 Called after IDENTIFY [PACKET] DEVICE is issued to each device
104 found. Typically used to apply device-specific fixups prior to
105 issue of SET FEATURES - XFER MODE, and prior to operation.
108 This entry may be specified as NULL in ata_port_operations.
113 <sect2><title>Set PIO/DMA mode</title>
115 void (*set_piomode) (struct ata_port *, struct ata_device *);
116 void (*set_dmamode) (struct ata_port *, struct ata_device *);
117 void (*post_set_mode) (struct ata_port *);
118 unsigned int (*mode_filter) (struct ata_port *, struct ata_device *, unsigned int);
122 Hooks called prior to the issue of SET FEATURES - XFER MODE
123 command. The optional ->mode_filter() hook is called when libata
124 has built a mask of the possible modes. This is passed to the
125 ->mode_filter() function which should return a mask of valid modes
126 after filtering those unsuitable due to hardware limits. It is not
127 valid to use this interface to add modes.
130 dev->pio_mode and dev->dma_mode are guaranteed to be valid when
131 ->set_piomode() and when ->set_dmamode() is called. The timings for
132 any other drive sharing the cable will also be valid at this point.
133 That is the library records the decisions for the modes of each
134 drive on a channel before it attempts to set any of them.
138 called unconditionally, after the SET FEATURES - XFER MODE
139 command completes successfully.
143 ->set_piomode() is always called (if present), but
144 ->set_dma_mode() is only called if DMA is possible.
149 <sect2><title>Taskfile read/write</title>
151 void (*sff_tf_load) (struct ata_port *ap, struct ata_taskfile *tf);
152 void (*sff_tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
156 ->tf_load() is called to load the given taskfile into hardware
157 registers / DMA buffers. ->tf_read() is called to read the
158 hardware registers / DMA buffers, to obtain the current set of
159 taskfile register values.
160 Most drivers for taskfile-based hardware (PIO or MMIO) use
161 ata_sff_tf_load() and ata_sff_tf_read() for these hooks.
166 <sect2><title>PIO data read/write</title>
168 void (*sff_data_xfer) (struct ata_device *, unsigned char *, unsigned int, int);
172 All bmdma-style drivers must implement this hook. This is the low-level
173 operation that actually copies the data bytes during a PIO data
175 Typically the driver will choose one of ata_sff_data_xfer_noirq(),
176 ata_sff_data_xfer(), or ata_sff_data_xfer32().
181 <sect2><title>ATA command execute</title>
183 void (*sff_exec_command)(struct ata_port *ap, struct ata_taskfile *tf);
187 causes an ATA command, previously loaded with
188 ->tf_load(), to be initiated in hardware.
189 Most drivers for taskfile-based hardware use ata_sff_exec_command()
195 <sect2><title>Per-cmd ATAPI DMA capabilities filter</title>
197 int (*check_atapi_dma) (struct ata_queued_cmd *qc);
201 Allow low-level driver to filter ATA PACKET commands, returning a status
202 indicating whether or not it is OK to use DMA for the supplied PACKET
206 This hook may be specified as NULL, in which case libata will
207 assume that atapi dma can be supported.
212 <sect2><title>Read specific ATA shadow registers</title>
214 u8 (*sff_check_status)(struct ata_port *ap);
215 u8 (*sff_check_altstatus)(struct ata_port *ap);
219 Reads the Status/AltStatus ATA shadow register from
220 hardware. On some hardware, reading the Status register has
221 the side effect of clearing the interrupt condition.
222 Most drivers for taskfile-based hardware use
223 ata_sff_check_status() for this hook.
228 <sect2><title>Select ATA device on bus</title>
230 void (*sff_dev_select)(struct ata_port *ap, unsigned int device);
234 Issues the low-level hardware command(s) that causes one of N
235 hardware devices to be considered 'selected' (active and
236 available for use) on the ATA bus. This generally has no
237 meaning on FIS-based devices.
240 Most drivers for taskfile-based hardware use
241 ata_sff_dev_select() for this hook.
246 <sect2><title>Private tuning method</title>
248 void (*set_mode) (struct ata_port *ap);
252 By default libata performs drive and controller tuning in
253 accordance with the ATA timing rules and also applies blacklists
254 and cable limits. Some controllers need special handling and have
255 custom tuning rules, typically raid controllers that use ATA
256 commands but do not actually do drive timing.
261 This hook should not be used to replace the standard controller
262 tuning logic when a controller has quirks. Replacing the default
263 tuning logic in that case would bypass handling for drive and
264 bridge quirks that may be important to data reliability. If a
265 controller needs to filter the mode selection it should use the
266 mode_filter hook instead.
272 <sect2><title>Control PCI IDE BMDMA engine</title>
274 void (*bmdma_setup) (struct ata_queued_cmd *qc);
275 void (*bmdma_start) (struct ata_queued_cmd *qc);
276 void (*bmdma_stop) (struct ata_port *ap);
277 u8 (*bmdma_status) (struct ata_port *ap);
281 When setting up an IDE BMDMA transaction, these hooks arm
282 (->bmdma_setup), fire (->bmdma_start), and halt (->bmdma_stop)
283 the hardware's DMA engine. ->bmdma_status is used to read the standard
284 PCI IDE DMA Status register.
288 These hooks are typically either no-ops, or simply not implemented, in
292 Most legacy IDE drivers use ata_bmdma_setup() for the bmdma_setup()
293 hook. ata_bmdma_setup() will write the pointer to the PRD table to
294 the IDE PRD Table Address register, enable DMA in the DMA Command
295 register, and call exec_command() to begin the transfer.
298 Most legacy IDE drivers use ata_bmdma_start() for the bmdma_start()
299 hook. ata_bmdma_start() will write the ATA_DMA_START flag to the DMA
303 Many legacy IDE drivers use ata_bmdma_stop() for the bmdma_stop()
304 hook. ata_bmdma_stop() clears the ATA_DMA_START flag in the DMA
308 Many legacy IDE drivers use ata_bmdma_status() as the bmdma_status() hook.
313 <sect2><title>High-level taskfile hooks</title>
315 void (*qc_prep) (struct ata_queued_cmd *qc);
316 int (*qc_issue) (struct ata_queued_cmd *qc);
320 Higher-level hooks, these two hooks can potentially supercede
321 several of the above taskfile/DMA engine hooks. ->qc_prep is
322 called after the buffers have been DMA-mapped, and is typically
323 used to populate the hardware's DMA scatter-gather table.
324 Most drivers use the standard ata_qc_prep() helper function, but
325 more advanced drivers roll their own.
328 ->qc_issue is used to make a command active, once the hardware
329 and S/G tables have been prepared. IDE BMDMA drivers use the
330 helper function ata_qc_issue_prot() for taskfile protocol-based
331 dispatch. More advanced drivers implement their own ->qc_issue.
334 ata_qc_issue_prot() calls ->tf_load(), ->bmdma_setup(), and
335 ->bmdma_start() as necessary to initiate a transfer.
340 <sect2><title>Exception and probe handling (EH)</title>
342 void (*eng_timeout) (struct ata_port *ap);
343 void (*phy_reset) (struct ata_port *ap);
347 Deprecated. Use ->error_handler() instead.
351 void (*freeze) (struct ata_port *ap);
352 void (*thaw) (struct ata_port *ap);
356 ata_port_freeze() is called when HSM violations or some other
357 condition disrupts normal operation of the port. A frozen port
358 is not allowed to perform any operation until the port is
359 thawed, which usually follows a successful reset.
363 The optional ->freeze() callback can be used for freezing the port
364 hardware-wise (e.g. mask interrupt and stop DMA engine). If a
365 port cannot be frozen hardware-wise, the interrupt handler
366 must ack and clear interrupts unconditionally while the port
370 The optional ->thaw() callback is called to perform the opposite of ->freeze():
371 prepare the port for normal operation once again. Unmask interrupts,
372 start DMA engine, etc.
376 void (*error_handler) (struct ata_port *ap);
380 ->error_handler() is a driver's hook into probe, hotplug, and recovery
381 and other exceptional conditions. The primary responsibility of an
382 implementation is to call ata_do_eh() or ata_bmdma_drive_eh() with a set
383 of EH hooks as arguments:
387 'prereset' hook (may be NULL) is called during an EH reset, before any other actions
392 'postreset' hook (may be NULL) is called after the EH reset is performed. Based on
393 existing conditions, severity of the problem, and hardware capabilities,
397 Either 'softreset' (may be NULL) or 'hardreset' (may be NULL) will be
398 called to perform the low-level EH reset.
402 void (*post_internal_cmd) (struct ata_queued_cmd *qc);
406 Perform any hardware-specific actions necessary to finish processing
407 after executing a probe-time or EH-time command via ata_exec_internal().
412 <sect2><title>Hardware interrupt handling</title>
414 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *);
415 void (*irq_clear) (struct ata_port *);
419 ->irq_handler is the interrupt handling routine registered with
420 the system, by libata. ->irq_clear is called during probe just
421 before the interrupt handler is registered, to be sure hardware
425 The second argument, dev_instance, should be cast to a pointer
426 to struct ata_host_set.
429 Most legacy IDE drivers use ata_sff_interrupt() for the
430 irq_handler hook, which scans all ports in the host_set,
431 determines which queued command was active (if any), and calls
432 ata_sff_host_intr(ap,qc).
435 Most legacy IDE drivers use ata_sff_irq_clear() for the
436 irq_clear() hook, which simply clears the interrupt and error
437 flags in the DMA status register.
442 <sect2><title>SATA phy read/write</title>
444 int (*scr_read) (struct ata_port *ap, unsigned int sc_reg,
446 int (*scr_write) (struct ata_port *ap, unsigned int sc_reg,
451 Read and write standard SATA phy registers. Currently only used
452 if ->phy_reset hook called the sata_phy_reset() helper function.
453 sc_reg is one of SCR_STATUS, SCR_CONTROL, SCR_ERROR, or SCR_ACTIVE.
458 <sect2><title>Init and shutdown</title>
460 int (*port_start) (struct ata_port *ap);
461 void (*port_stop) (struct ata_port *ap);
462 void (*host_stop) (struct ata_host_set *host_set);
466 ->port_start() is called just after the data structures for each
467 port are initialized. Typically this is used to alloc per-port
468 DMA buffers / tables / rings, enable DMA engines, and similar
469 tasks. Some drivers also use this entry point as a chance to
470 allocate driver-private memory for ap->private_data.
473 Many drivers use ata_port_start() as this hook or call
474 it from their own port_start() hooks. ata_port_start()
475 allocates space for a legacy IDE PRD table and returns.
478 ->port_stop() is called after ->host_stop(). It's sole function
479 is to release DMA/memory resources, now that they are no longer
480 actively being used. Many drivers also free driver-private
481 data from port at this time.
484 ->host_stop() is called after all ->port_stop() calls
485 have completed. The hook must finalize hardware shutdown, release DMA
486 and other resources, etc.
487 This hook may be specified as NULL, in which case it is not called.
495 <chapter id="libataEH">
496 <title>Error handling</title>
499 This chapter describes how errors are handled under libata.
500 Readers are advised to read SCSI EH
501 (Documentation/scsi/scsi_eh.txt) and ATA exceptions doc first.
504 <sect1><title>Origins of commands</title>
506 In libata, a command is represented with struct ata_queued_cmd
507 or qc. qc's are preallocated during port initialization and
508 repetitively used for command executions. Currently only one
509 qc is allocated per port but yet-to-be-merged NCQ branch
510 allocates one for each tag and maps each qc to NCQ tag 1-to-1.
513 libata commands can originate from two sources - libata itself
514 and SCSI midlayer. libata internal commands are used for
515 initialization and error handling. All normal blk requests
516 and commands for SCSI emulation are passed as SCSI commands
517 through queuecommand callback of SCSI host template.
521 <sect1><title>How commands are issued</title>
525 <varlistentry><term>Internal commands</term>
528 First, qc is allocated and initialized using
529 ata_qc_new_init(). Although ata_qc_new_init() doesn't
530 implement any wait or retry mechanism when qc is not
531 available, internal commands are currently issued only during
532 initialization and error recovery, so no other command is
533 active and allocation is guaranteed to succeed.
536 Once allocated qc's taskfile is initialized for the command to
537 be executed. qc currently has two mechanisms to notify
538 completion. One is via qc->complete_fn() callback and the
539 other is completion qc->waiting. qc->complete_fn() callback
540 is the asynchronous path used by normal SCSI translated
541 commands and qc->waiting is the synchronous (issuer sleeps in
542 process context) path used by internal commands.
545 Once initialization is complete, host_set lock is acquired
546 and the qc is issued.
551 <varlistentry><term>SCSI commands</term>
554 All libata drivers use ata_scsi_queuecmd() as
555 hostt->queuecommand callback. scmds can either be simulated
556 or translated. No qc is involved in processing a simulated
557 scmd. The result is computed right away and the scmd is
561 For a translated scmd, ata_qc_new_init() is invoked to
562 allocate a qc and the scmd is translated into the qc. SCSI
563 midlayer's completion notification function pointer is stored
567 qc->complete_fn() callback is used for completion
568 notification. ATA commands use ata_scsi_qc_complete() while
569 ATAPI commands use atapi_qc_complete(). Both functions end up
570 calling qc->scsidone to notify upper layer when the qc is
571 finished. After translation is completed, the qc is issued
575 Note that SCSI midlayer invokes hostt->queuecommand while
576 holding host_set lock, so all above occur while holding
585 <sect1><title>How commands are processed</title>
587 Depending on which protocol and which controller are used,
588 commands are processed differently. For the purpose of
589 discussion, a controller which uses taskfile interface and all
590 standard callbacks is assumed.
593 Currently 6 ATA command protocols are used. They can be
594 sorted into the following four categories according to how
599 <varlistentry><term>ATA NO DATA or DMA</term>
602 ATA_PROT_NODATA and ATA_PROT_DMA fall into this category.
603 These types of commands don't require any software
604 intervention once issued. Device will raise interrupt on
610 <varlistentry><term>ATA PIO</term>
613 ATA_PROT_PIO is in this category. libata currently
614 implements PIO with polling. ATA_NIEN bit is set to turn
615 off interrupt and pio_task on ata_wq performs polling and
621 <varlistentry><term>ATAPI NODATA or DMA</term>
624 ATA_PROT_ATAPI_NODATA and ATA_PROT_ATAPI_DMA are in this
625 category. packet_task is used to poll BSY bit after
626 issuing PACKET command. Once BSY is turned off by the
627 device, packet_task transfers CDB and hands off processing
628 to interrupt handler.
633 <varlistentry><term>ATAPI PIO</term>
636 ATA_PROT_ATAPI is in this category. ATA_NIEN bit is set
637 and, as in ATAPI NODATA or DMA, packet_task submits cdb.
638 However, after submitting cdb, further processing (data
639 transfer) is handed off to pio_task.
646 <sect1><title>How commands are completed</title>
648 Once issued, all qc's are either completed with
649 ata_qc_complete() or time out. For commands which are handled
650 by interrupts, ata_host_intr() invokes ata_qc_complete(), and,
651 for PIO tasks, pio_task invokes ata_qc_complete(). In error
652 cases, packet_task may also complete commands.
655 ata_qc_complete() does the following.
662 DMA memory is unmapped.
668 ATA_QCFLAG_ACTIVE is clared from qc->flags.
674 qc->complete_fn() callback is invoked. If the return value of
675 the callback is not zero. Completion is short circuited and
676 ata_qc_complete() returns.
682 __ata_qc_complete() is called, which does
687 qc->flags is cleared to zero.
693 ap->active_tag and qc->tag are poisoned.
699 qc->waiting is claread & completed (in that order).
705 qc is deallocated by clearing appropriate bit in ap->qactive.
716 So, it basically notifies upper layer and deallocates qc. One
717 exception is short-circuit path in #3 which is used by
721 For all non-ATAPI commands, whether it fails or not, almost
722 the same code path is taken and very little error handling
723 takes place. A qc is completed with success status if it
724 succeeded, with failed status otherwise.
727 However, failed ATAPI commands require more handling as
728 REQUEST SENSE is needed to acquire sense data. If an ATAPI
729 command fails, ata_qc_complete() is invoked with error status,
730 which in turn invokes atapi_qc_complete() via
731 qc->complete_fn() callback.
734 This makes atapi_qc_complete() set scmd->result to
735 SAM_STAT_CHECK_CONDITION, complete the scmd and return 1. As
736 the sense data is empty but scmd->result is CHECK CONDITION,
737 SCSI midlayer will invoke EH for the scmd, and returning 1
738 makes ata_qc_complete() to return without deallocating the qc.
739 This leads us to ata_scsi_error() with partially completed qc.
744 <sect1><title>ata_scsi_error()</title>
746 ata_scsi_error() is the current transportt->eh_strategy_handler()
747 for libata. As discussed above, this will be entered in two
748 cases - timeout and ATAPI error completion. This function
749 calls low level libata driver's eng_timeout() callback, the
750 standard callback for which is ata_eng_timeout(). It checks
751 if a qc is active and calls ata_qc_timeout() on the qc if so.
752 Actual error handling occurs in ata_qc_timeout().
755 If EH is invoked for timeout, ata_qc_timeout() stops BMDMA and
756 completes the qc. Note that as we're currently in EH, we
757 cannot call scsi_done. As described in SCSI EH doc, a
758 recovered scmd should be either retried with
759 scsi_queue_insert() or finished with scsi_finish_command().
760 Here, we override qc->scsidone with scsi_finish_command() and
761 calls ata_qc_complete().
764 If EH is invoked due to a failed ATAPI qc, the qc here is
765 completed but not deallocated. The purpose of this
766 half-completion is to use the qc as place holder to make EH
767 code reach this place. This is a bit hackish, but it works.
770 Once control reaches here, the qc is deallocated by invoking
771 __ata_qc_complete() explicitly. Then, internal qc for REQUEST
772 SENSE is issued. Once sense data is acquired, scmd is
773 finished by directly invoking scsi_finish_command() on the
774 scmd. Note that as we already have completed and deallocated
775 the qc which was associated with the scmd, we don't need
776 to/cannot call ata_qc_complete() again.
781 <sect1><title>Problems with the current EH</title>
787 Error representation is too crude. Currently any and all
788 error conditions are represented with ATA STATUS and ERROR
789 registers. Errors which aren't ATA device errors are treated
790 as ATA device errors by setting ATA_ERR bit. Better error
791 descriptor which can properly represent ATA and other
792 errors/exceptions is needed.
798 When handling timeouts, no action is taken to make device
799 forget about the timed out command and ready for new commands.
805 EH handling via ata_scsi_error() is not properly protected
806 from usual command processing. On EH entrance, the device is
807 not in quiescent state. Timed out commands may succeed or
808 fail any time. pio_task and atapi_task may still be running.
814 Too weak error recovery. Devices / controllers causing HSM
815 mismatch errors and other errors quite often require reset to
816 return to known state. Also, advanced error handling is
817 necessary to support features like NCQ and hotplug.
823 ATA errors are directly handled in the interrupt handler and
824 PIO errors in pio_task. This is problematic for advanced
825 error handling for the following reasons.
828 First, advanced error handling often requires context and
829 internal qc execution.
832 Second, even a simple failure (say, CRC error) needs
833 information gathering and could trigger complex error handling
834 (say, resetting & reconfiguring). Having multiple code
835 paths to gather information, enter EH and trigger actions
839 Third, scattered EH code makes implementing low level drivers
840 difficult. Low level drivers override libata callbacks. If
841 EH is scattered over several places, each affected callbacks
842 should perform its part of error handling. This can be error
851 <chapter id="libataExt">
852 <title>libata Library</title>
853 !Edrivers/ata/libata-core.c
856 <chapter id="libataInt">
857 <title>libata Core Internals</title>
858 !Idrivers/ata/libata-core.c
861 <chapter id="libataScsiInt">
862 <title>libata SCSI translation/emulation</title>
863 !Edrivers/ata/libata-scsi.c
864 !Idrivers/ata/libata-scsi.c
867 <chapter id="ataExceptions">
868 <title>ATA errors and exceptions</title>
871 This chapter tries to identify what error/exception conditions exist
872 for ATA/ATAPI devices and describe how they should be handled in
873 implementation-neutral way.
877 The term 'error' is used to describe conditions where either an
878 explicit error condition is reported from device or a command has
883 The term 'exception' is either used to describe exceptional
884 conditions which are not errors (say, power or hotplug events), or
885 to describe both errors and non-error exceptional conditions. Where
886 explicit distinction between error and exception is necessary, the
887 term 'non-error exception' is used.
891 <title>Exception categories</title>
893 Exceptions are described primarily with respect to legacy
894 taskfile + bus master IDE interface. If a controller provides
895 other better mechanism for error reporting, mapping those into
896 categories described below shouldn't be difficult.
900 In the following sections, two recovery actions - reset and
901 reconfiguring transport - are mentioned. These are described
902 further in <xref linkend="exrec"/>.
905 <sect2 id="excatHSMviolation">
906 <title>HSM violation</title>
908 This error is indicated when STATUS value doesn't match HSM
909 requirement during issuing or excution any ATA/ATAPI command.
913 <title>Examples</title>
917 ATA_STATUS doesn't contain !BSY && DRDY && !DRQ while trying
924 !BSY && !DRQ during PIO data transfer.
930 DRQ on command completion.
936 !BSY && ERR after CDB tranfer starts but before the
937 last byte of CDB is transferred. ATA/ATAPI standard states
938 that "The device shall not terminate the PACKET command
939 with an error before the last byte of the command packet has
940 been written" in the error outputs description of PACKET
941 command and the state diagram doesn't include such
949 In these cases, HSM is violated and not much information
950 regarding the error can be acquired from STATUS or ERROR
951 register. IOW, this error can be anything - driver bug,
952 faulty device, controller and/or cable.
956 As HSM is violated, reset is necessary to restore known state.
957 Reconfiguring transport for lower speed might be helpful too
958 as transmission errors sometimes cause this kind of errors.
962 <sect2 id="excatDevErr">
963 <title>ATA/ATAPI device error (non-NCQ / non-CHECK CONDITION)</title>
966 These are errors detected and reported by ATA/ATAPI devices
967 indicating device problems. For this type of errors, STATUS
968 and ERROR register values are valid and describe error
969 condition. Note that some of ATA bus errors are detected by
970 ATA/ATAPI devices and reported using the same mechanism as
971 device errors. Those cases are described later in this
976 For ATA commands, this type of errors are indicated by !BSY
977 && ERR during command execution and on completion.
980 <para>For ATAPI commands,</para>
986 !BSY && ERR && ABRT right after issuing PACKET
987 indicates that PACKET command is not supported and falls in
994 !BSY && ERR(==CHK) && !ABRT after the last
995 byte of CDB is transferred indicates CHECK CONDITION and
996 doesn't fall in this category.
1002 !BSY && ERR(==CHK) && ABRT after the last byte
1003 of CDB is transferred *probably* indicates CHECK CONDITION and
1004 doesn't fall in this category.
1011 Of errors detected as above, the followings are not ATA/ATAPI
1012 device errors but ATA bus errors and should be handled
1013 according to <xref linkend="excatATAbusErr"/>.
1019 <term>CRC error during data transfer</term>
1022 This is indicated by ICRC bit in the ERROR register and
1023 means that corruption occurred during data transfer. Upto
1024 ATA/ATAPI-7, the standard specifies that this bit is only
1025 applicable to UDMA transfers but ATA/ATAPI-8 draft revision
1026 1f says that the bit may be applicable to multiword DMA and
1033 <term>ABRT error during data transfer or on completion</term>
1036 Upto ATA/ATAPI-7, the standard specifies that ABRT could be
1037 set on ICRC errors and on cases where a device is not able
1038 to complete a command. Combined with the fact that MWDMA
1039 and PIO transfer errors aren't allowed to use ICRC bit upto
1040 ATA/ATAPI-7, it seems to imply that ABRT bit alone could
1041 indicate tranfer errors.
1044 However, ATA/ATAPI-8 draft revision 1f removes the part
1045 that ICRC errors can turn on ABRT. So, this is kind of
1046 gray area. Some heuristics are needed here.
1054 ATA/ATAPI device errors can be further categorized as follows.
1060 <term>Media errors</term>
1063 This is indicated by UNC bit in the ERROR register. ATA
1064 devices reports UNC error only after certain number of
1065 retries cannot recover the data, so there's nothing much
1066 else to do other than notifying upper layer.
1069 READ and WRITE commands report CHS or LBA of the first
1070 failed sector but ATA/ATAPI standard specifies that the
1071 amount of transferred data on error completion is
1072 indeterminate, so we cannot assume that sectors preceding
1073 the failed sector have been transferred and thus cannot
1074 complete those sectors successfully as SCSI does.
1080 <term>Media changed / media change requested error</term>
1083 <<TODO: fill here>>
1088 <varlistentry><term>Address error</term>
1091 This is indicated by IDNF bit in the ERROR register.
1092 Report to upper layer.
1097 <varlistentry><term>Other errors</term>
1100 This can be invalid command or parameter indicated by ABRT
1101 ERROR bit or some other error condition. Note that ABRT
1102 bit can indicate a lot of things including ICRC and Address
1103 errors. Heuristics needed.
1111 Depending on commands, not all STATUS/ERROR bits are
1112 applicable. These non-applicable bits are marked with
1113 "na" in the output descriptions but upto ATA/ATAPI-7
1114 no definition of "na" can be found. However,
1115 ATA/ATAPI-8 draft revision 1f describes "N/A" as
1121 <varlistentry><term>3.2.3.3a N/A</term>
1124 A keyword the indicates a field has no defined value in
1125 this standard and should not be checked by the host or
1126 device. N/A fields should be cleared to zero.
1134 So, it seems reasonable to assume that "na" bits are
1135 cleared to zero by devices and thus need no explicit masking.
1140 <sect2 id="excatATAPIcc">
1141 <title>ATAPI device CHECK CONDITION</title>
1144 ATAPI device CHECK CONDITION error is indicated by set CHK bit
1145 (ERR bit) in the STATUS register after the last byte of CDB is
1146 transferred for a PACKET command. For this kind of errors,
1147 sense data should be acquired to gather information regarding
1148 the errors. REQUEST SENSE packet command should be used to
1153 Once sense data is acquired, this type of errors can be
1154 handled similary to other SCSI errors. Note that sense data
1155 may indicate ATA bus error (e.g. Sense Key 04h HARDWARE ERROR
1156 && ASC/ASCQ 47h/00h SCSI PARITY ERROR). In such
1157 cases, the error should be considered as an ATA bus error and
1158 handled according to <xref linkend="excatATAbusErr"/>.
1163 <sect2 id="excatNCQerr">
1164 <title>ATA device error (NCQ)</title>
1167 NCQ command error is indicated by cleared BSY and set ERR bit
1168 during NCQ command phase (one or more NCQ commands
1169 outstanding). Although STATUS and ERROR registers will
1170 contain valid values describing the error, READ LOG EXT is
1171 required to clear the error condition, determine which command
1172 has failed and acquire more information.
1176 READ LOG EXT Log Page 10h reports which tag has failed and
1177 taskfile register values describing the error. With this
1178 information the failed command can be handled as a normal ATA
1179 command error as in <xref linkend="excatDevErr"/> and all
1180 other in-flight commands must be retried. Note that this
1181 retry should not be counted - it's likely that commands
1182 retried this way would have completed normally if it were not
1183 for the failed command.
1187 Note that ATA bus errors can be reported as ATA device NCQ
1188 errors. This should be handled as described in <xref
1189 linkend="excatATAbusErr"/>.
1193 If READ LOG EXT Log Page 10h fails or reports NQ, we're
1194 thoroughly screwed. This condition should be treated
1195 according to <xref linkend="excatHSMviolation"/>.
1200 <sect2 id="excatATAbusErr">
1201 <title>ATA bus error</title>
1204 ATA bus error means that data corruption occurred during
1205 transmission over ATA bus (SATA or PATA). This type of errors
1213 ICRC or ABRT error as described in <xref linkend="excatDevErr"/>.
1219 Controller-specific error completion with error information
1220 indicating transmission error.
1226 On some controllers, command timeout. In this case, there may
1227 be a mechanism to determine that the timeout is due to
1234 Unknown/random errors, timeouts and all sorts of weirdities.
1241 As described above, transmission errors can cause wide variety
1242 of symptoms ranging from device ICRC error to random device
1243 lockup, and, for many cases, there is no way to tell if an
1244 error condition is due to transmission error or not;
1245 therefore, it's necessary to employ some kind of heuristic
1246 when dealing with errors and timeouts. For example,
1247 encountering repetitive ABRT errors for known supported
1248 command is likely to indicate ATA bus error.
1252 Once it's determined that ATA bus errors have possibly
1253 occurred, lowering ATA bus transmission speed is one of
1254 actions which may alleviate the problem. See <xref
1255 linkend="exrecReconf"/> for more information.
1260 <sect2 id="excatPCIbusErr">
1261 <title>PCI bus error</title>
1264 Data corruption or other failures during transmission over PCI
1265 (or other system bus). For standard BMDMA, this is indicated
1266 by Error bit in the BMDMA Status register. This type of
1267 errors must be logged as it indicates something is very wrong
1268 with the system. Resetting host controller is recommended.
1273 <sect2 id="excatLateCompletion">
1274 <title>Late completion</title>
1277 This occurs when timeout occurs and the timeout handler finds
1278 out that the timed out command has completed successfully or
1279 with error. This is usually caused by lost interrupts. This
1280 type of errors must be logged. Resetting host controller is
1286 <sect2 id="excatUnknown">
1287 <title>Unknown error (timeout)</title>
1290 This is when timeout occurs and the command is still
1291 processing or the host and device are in unknown state. When
1292 this occurs, HSM could be in any valid or invalid state. To
1293 bring the device to known state and make it forget about the
1294 timed out command, resetting is necessary. The timed out
1295 command may be retried.
1299 Timeouts can also be caused by transmission errors. Refer to
1300 <xref linkend="excatATAbusErr"/> for more details.
1305 <sect2 id="excatHoplugPM">
1306 <title>Hotplug and power management exceptions</title>
1309 <<TODO: fill here>>
1317 <title>EH recovery actions</title>
1320 This section discusses several important recovery actions.
1323 <sect2 id="exrecClr">
1324 <title>Clearing error condition</title>
1327 Many controllers require its error registers to be cleared by
1328 error handler. Different controllers may have different
1333 For SATA, it's strongly recommended to clear at least SError
1334 register during error handling.
1338 <sect2 id="exrecRst">
1339 <title>Reset</title>
1342 During EH, resetting is necessary in the following cases.
1349 HSM is in unknown or invalid state
1355 HBA is in unknown or invalid state
1361 EH needs to make HBA/device forget about in-flight commands
1367 HBA/device behaves weirdly
1374 Resetting during EH might be a good idea regardless of error
1375 condition to improve EH robustness. Whether to reset both or
1376 either one of HBA and device depends on situation but the
1377 following scheme is recommended.
1384 When it's known that HBA is in ready state but ATA/ATAPI
1385 device is in unknown state, reset only device.
1391 If HBA is in unknown state, reset both HBA and device.
1398 HBA resetting is implementation specific. For a controller
1399 complying to taskfile/BMDMA PCI IDE, stopping active DMA
1400 transaction may be sufficient iff BMDMA state is the only HBA
1401 context. But even mostly taskfile/BMDMA PCI IDE complying
1402 controllers may have implementation specific requirements and
1403 mechanism to reset themselves. This must be addressed by
1408 OTOH, ATA/ATAPI standard describes in detail ways to reset
1414 <varlistentry><term>PATA hardware reset</term>
1417 This is hardware initiated device reset signalled with
1418 asserted PATA RESET- signal. There is no standard way to
1419 initiate hardware reset from software although some
1420 hardware provides registers that allow driver to directly
1421 tweak the RESET- signal.
1426 <varlistentry><term>Software reset</term>
1429 This is achieved by turning CONTROL SRST bit on for at
1430 least 5us. Both PATA and SATA support it but, in case of
1431 SATA, this may require controller-specific support as the
1432 second Register FIS to clear SRST should be transmitted
1433 while BSY bit is still set. Note that on PATA, this resets
1434 both master and slave devices on a channel.
1439 <varlistentry><term>EXECUTE DEVICE DIAGNOSTIC command</term>
1442 Although ATA/ATAPI standard doesn't describe exactly, EDD
1443 implies some level of resetting, possibly similar level
1444 with software reset. Host-side EDD protocol can be handled
1445 with normal command processing and most SATA controllers
1446 should be able to handle EDD's just like other commands.
1447 As in software reset, EDD affects both devices on a PATA
1451 Although EDD does reset devices, this doesn't suit error
1452 handling as EDD cannot be issued while BSY is set and it's
1453 unclear how it will act when device is in unknown/weird
1459 <varlistentry><term>ATAPI DEVICE RESET command</term>
1462 This is very similar to software reset except that reset
1463 can be restricted to the selected device without affecting
1464 the other device sharing the cable.
1469 <varlistentry><term>SATA phy reset</term>
1472 This is the preferred way of resetting a SATA device. In
1473 effect, it's identical to PATA hardware reset. Note that
1474 this can be done with the standard SCR Control register.
1475 As such, it's usually easier to implement than software
1484 One more thing to consider when resetting devices is that
1485 resetting clears certain configuration parameters and they
1486 need to be set to their previous or newly adjusted values
1491 Parameters affected are.
1498 CHS set up with INITIALIZE DEVICE PARAMETERS (seldomly used)
1504 Parameters set with SET FEATURES including transfer mode setting
1510 Block count set with SET MULTIPLE MODE
1516 Other parameters (SET MAX, MEDIA LOCK...)
1523 ATA/ATAPI standard specifies that some parameters must be
1524 maintained across hardware or software reset, but doesn't
1525 strictly specify all of them. Always reconfiguring needed
1526 parameters after reset is required for robustness. Note that
1527 this also applies when resuming from deep sleep (power-off).
1531 Also, ATA/ATAPI standard requires that IDENTIFY DEVICE /
1532 IDENTIFY PACKET DEVICE is issued after any configuration
1533 parameter is updated or a hardware reset and the result used
1534 for further operation. OS driver is required to implement
1535 revalidation mechanism to support this.
1540 <sect2 id="exrecReconf">
1541 <title>Reconfigure transport</title>
1544 For both PATA and SATA, a lot of corners are cut for cheap
1545 connectors, cables or controllers and it's quite common to see
1546 high transmission error rate. This can be mitigated by
1547 lowering transmission speed.
1551 The following is a possible scheme Jeff Garzik suggested.
1556 If more than $N (3?) transmission errors happen in 15 minutes,
1561 if SATA, decrease SATA PHY speed. if speed cannot be decreased,
1566 decrease UDMA xfer speed. if at UDMA0, switch to PIO4,
1571 decrease PIO xfer speed. if at PIO3, complain, but continue
1583 <chapter id="PiixInt">
1584 <title>ata_piix Internals</title>
1585 !Idrivers/ata/ata_piix.c
1588 <chapter id="SILInt">
1589 <title>sata_sil Internals</title>
1590 !Idrivers/ata/sata_sil.c
1593 <chapter id="libataThanks">
1594 <title>Thanks</title>
1596 The bulk of the ATA knowledge comes thanks to long conversations with
1597 Andre Hedrick (www.linux-ide.org), and long hours pondering the ATA
1598 and SCSI specifications.
1601 Thanks to Alan Cox for pointing out similarities
1602 between SATA and SCSI, and in general for motivation to hack on
1606 libata's device detection
1607 method, ata_pio_devchk, and in general all the early probing was
1608 based on extensive study of Hale Landis's probe/reset code in his
1609 ATADRVR driver (www.ata-atapi.com).